Precision Low Power Single-Supply JFET Amplifier AD8627/AD8626/AD8625 FEATURES PIN CONFIGURATIONS 8-Lead SOIC (R-8 Suffix) 2 +IN 3 GENERAL DESCRIPTION The AD862x is a precision JFET input amplifier. It features true single-supply operation, low power consumption, and rail-to-rail output. The outputs remain stable with capacitive loads of over 500 pF; the supply current is less than 630 µA/amp. Applications for the AD862x include photodiode transimpedance amplification, ATE reference level drivers, battery management, both line powered and portable instrumentation, and remote sensor signal conditioning including automotive sensors. 7 V+ AD8627 V– 4 6 OUT 5 OUT A 1 V– 2 +IN 3 5 V+ AD8627 4 –IN NC NC = NO CONNECT 8-Lead SOIC (R-8 Suffix) APPLICATIONS Photodiode amplifiers ATE Line-powered/battery-powered instrumentation Industrial controls Automotive sensors Precision filters Audio 8 NC NC 1 –IN 5-Lead SC70 (KS Suffix) OUT A 1 –IN A 8 V+ 2 +IN A 3 8-Lead MSOP (RM-Suffix) 7 OUT B AD8626 V– 4 6 –IN B 5 OUT A –IN A +IN A V– 14 OUT D –IN A 2 13 –IN D AD8625 4 5 V+ OUT B –IN B +IN B 14-Lead TSSOP (RU-Suffix) OUT A 1 V+ 4 8 AD8626 +IN B 14-Lead SOIC (R-Suffix) +IN A 3 1 12 +IN D 11 V– +IN B 5 10 +IN C –IN B 6 9 –IN C OUT B 7 8 OUT C OUT A –IN A +IN A V+ +IN B –IN B OUT B 1 14 AD8625 7 8 OUT D –IN D +IN D V– +IN C –IN C OUT C 03023-B-001 SC70 package Very low IB: 1 pA max Single-supply operation: 5 V to 26 V Dual-supply operation: ±2.5 V to ±13 V Rail-to-rail output Low supply current: 630 µA/amp typ Low offset voltage: 500 µV max Unity gain stable No phase reversal Figure 1. The AD862x’s ability to swing nearly rail-to-rail at the input and rail-to-rail at the output enables it to be used to buffer CMOS DACs, ASICs, and other wide output swing devices in single-supply systems. The 5 MHz bandwidth and low offset are ideal for precision filters. The AD862x is fully specified over the industrial temperature range. (–40° to +85°) The AD8627 is available in both 5-lead SC70 and 8-lead SOIC surface-mount packages. The SC70 packaged parts are available in tape and reel only. The AD8626 is available in an MSOP package. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. AD8627/AD8626/AD8625 TABLE OF CONTENTS AD8627/AD8626/AD8625–Specifications ................................... 3 Minimizing Input Current ........................................................ 15 Electrical Characteristics ............................................................. 3 Photodiode Preamplifier Application...................................... 15 Electrical Characteristics ............................................................. 4 Output Amplifier for Digital-to-Analog Converters............. 15 Absolute Maximum Ratings............................................................ 5 Eight-Pole Sallen Key Low-Pass Filter..................................... 16 Typical Performance Characteristics– AD8627/AD8626/AD8625.............................................................. 6 Outline Dimensions ....................................................................... 18 Ordering Guide .......................................................................... 19 Applications..................................................................................... 13 REVISION HISTORY 1/04—Data sheet changed from Rev. A to Rev. B Change to General Description ......................................................... 1 Change to Figure 10 ............................................................................ 7 Change to Figure13 ............................................................................. 7 Change to Figure 37 .......................................................................... 11 Changes to Figure 38......................................................................... 12 Change to Output Amplifier for DACs section ............................. 15 Updated Outline Dimensions .......................................................... 19 10/03—Data sheet changed from Rev. 0 to Rev. A Addition of two new parts……………………………………. Universal Change to General Description………………………………………. ... 1 Changes to Pin Configurations…………………....................................... 1 Change to Specifications table…………………………………………. . 3 Changes to Figure 31……………………………................................... .... 10 Changes to Figure 32……………………………..................................... .. 11 Changes to Figure 38…………………………….................................... ... 12 Changes to Figure 46…………………………….................................... ... 16 Changes to Figure 47……………………………..................................... .. 16 Changes to Figure 49……………………………..................................... .. 17 Updated Outline Dimensions…………………………………………..18 Changes to Ordering Guide…………………........................................ .. 19 Rev. B | Page 2 of 20 AD8627/AD8626/AD8625 AD8627/AD8626/AD8625–SPECIFICATIONS ELECTRICAL CHARACTERISTICS Table 1. @VS = 5 V, VCM = 1.5 V, TA = 25°C, unless otherwise noted. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Conditions Min VOS Typ Max Unit 0.05 0.5 1.2 1 60 0.5 25 3 87 230 2.5 mV mV pA pA pA pA V dB V/mV µV/°C ±10 V V V V mA −40°C < TA < +85°C Input Bias Current IB 0.25 –40°C < TA < +85°C Input Offset Current IOS –40°C < TA < +85°C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage High CMRR AVO ∆VOS/∆T VCM = 0 V to 2.5 V RL = 10 kΩ, VO = 0.5 V to 4.5 V –40°C < TA < +85°C VOH IL = 2 mA, –40°C < TA < +85°C Output Voltage Low 0 66 100 4.92 4.90 VOL 0.075 0.08 IL = 2 mA, –40°C < TA < +85°C Output Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier IOUT PSRR ISY VS = 5 V to 26 V 80 104 630 –40°C < TA < +85°C DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density Channel Separation SR GBP ØM en p-p en in Cs 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz f = 1 kHz Rev. B | Page 3 of 20 785 800 dB µA µA 5 5 60 V/µs MHz Degrees 1.9 17.5 0.4 104 µV p-p nV/√Hz fA/√Hz dB AD8627/AD8626/AD8625 ELECTRICAL CHARACTERISTICS Table 2. @VS = ±13 V; VCM = 0 V; TA = 25°C, unless otherwise noted. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Conditions Min VOS Typ Max Unit 0.35 0.75 1.35 1 60 0.5 25 +11 105 310 2.5 mV mV pA pA pA pA V dB V/mV µV/°C ±15 V V V V mA –40°C < TA < +85°C Input Bias Current IB 0.25 –40°C < TA < +85°C Input Offset Current IOS –40°C < TA < +85°C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier CMRR AVO ∆VOS/∆T VOH VOH VOL VOL IOUT PSRR ISY VCM = –13 V to +10 V RL = 10 kΩ, VO = –11 V to +11 V –40°C < TA < +85°C IL = 2 mA, –40°C < TA < +85°C –13 76 150 +12.92 +12.91 –12.92 –12.91 IL = 2 mA, –40°C < TA < +85°C VS = ± 2.5 V to ± 13 V 80 104 710 –40°C < TA < +85°C DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density Channel Separation SR GBP ØM en p-p en in Cs 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz f = 1 kHz Rev. B | Page 4 of 20 850 900 dB µA µA 5 5 60 V/µs MHz Degrees 2.5 16 0.5 105 µV p-p nV/√Hz fA/√Hz dB AD8627/AD8626/AD8625 ABSOLUTE MAXIMUM RATINGS Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply at 25°C, unless otherwise noted. Table 3. Stress Ratings Parameter Supply Voltage Input Voltage Differential Input Voltage Output Short Circuit Duration Storage Temperature Range, R Package Operating Temperature Range Junction Temperature Range, R Package Lead Temperature Range (Soldering, 60 sec) Rating 27 V VS– to VS+ ± Supply Voltage Indefinite –65°C to + 125°C –40°C to + 85°C –65°C to 150°C 300°C Table 4. Package Type 5-Lead SC70 (KS) 8-Lead MSOP (RM) 8-Lead SOIC (R) 14-Lead SOIC (R) 14-Lead TSSOP (RU) 1 θJA 1 376 210 158 120 180 θJC 126 45 43 36 35 Unit °C/W °C/W °C/W °C/W °C/W θJA is specified for worst case conditions when devices are soldered in circuit boards for surface-mount packages. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. B | Page 5 of 20 AD8627/AD8626/AD8625 TYPICAL PERFORMANCE CHARACTERISTICS–AD8627/AD8626/AD8625 16 VSY = ±12V TA = 25°C VSY = +3.5V/–1.5V 14 20 NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 25 15 10 12 10 8 6 4 –600 –200 –400 0 200 400 03023-B-005 2 0 600 0 1 2 50 12 VSY = ±13V 40 6 7 8 9 10 VSY = ±13V TA = 25°C 6 4 03023-B-003 0 1 2 3 4 5 6 7 8 9 20 10 0 –10 –20 –30 03023-B-006 8 2 –40 –50 –15.0–12.5–10.0 –7.5 –5.0 –2.5 0 2.5 VCM (V) 10 OFFSET VOLTAGE (µV/°C) 5.0 7.5 10.0 12.5 15.0 Figure 6. Input Bias Current vs. VCM Figure 3. Offset Voltage Drift 0 18 VSY = +3.5V/–1.5V –0.1 14 –0.2 INPUT BIAS CURRENT (pA) 16 12 10 8 6 4 03023-B-004 NUMBER OF AMPLIFIERS 5 30 INPUT BIAS CURRENT (pA) NUMBER OF AMPLIFIERS 10 2 0 4 Figure 5. Offset Voltage Drift Figure 2. Input Offset Voltage 0 3 OFFSET VOLTAGE (µV/°C) VOLTAGE (µV) –400 –300 –200 –100 0 100 200 VSY = ±13V TA = 25°C –0.3 –0.4 –0.5 –0.6 –0.7 03023-B-007 0 03023-B-002 5 –0.8 –0.9 –15.0–12.5–10.0 –7.5 –5.0 –2.5 0 2.5 VCM (V) 300 VOLTAGE (µV) Figure 4. Input Offset Voltage 5.0 7.5 10.0 12.5 15.0 Figure 7. Input Bias Current vs. VCM Rev. B | Page 6 of 20 AD8627/AD8626/AD8625 500 100 VSY = 5V 10 1 0.1 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 300 200 100 0 –100 –200 –300 03023-B-011 INPUT OFFSET VOLTAGE (µV) 400 03023-B-008 INPUT BIAS CURRENT (pA) VSY = ±13V VCM = 0V –400 –500 –1 150 0 1 2 3 4 VCM (V) Figure 8. Input Bias Current vs. Temperature Figure 11. Input Offset Voltage vs. VCM 10M 2.0 VSY = +5V OR ±5V 0.5 0 –0.5 –1.0 –1.5 –4 –3 –2 –1 0 1 2 3 5 VSY = ±13V VSY = +5V 100k 10k 0.1 5 1 10 LOAD RESISTANCE (kΩ) VCM (V) Figure 9. Input Bias Current vs. VCM 1000 Figure 12. Open-Loop Gain vs. Load Resistance 1000 VSY = ±13V a 800 OPEN-LOOP GAIN (V/mV) d 700 600 500 400 300 200 100 03023-B-010 INPUT OFFSET VOLTAGE (µV) 900 0 –100 –15 100 –12 –9 –6 –3 0 3 6 9 12 b 100 c e 10 a. VSY = ±13V, VO = ±11V, RL = 10kΩ b. VSY = ±13V, VO = ±11V, RL = 2kΩ c. VSY = +5V, VO = +0.5V/+4.5V, RL = 2kΩ d. VSY = +5V, VO = +0.5V/+4.5V, RL = 10kΩ e. VSY = +5V, VO = +0.5V/+4.5V, RL = 600Ω 1 –40 15 VCM (V) Figure 10. Input Offset Voltage vs. VCM 25 95 TEMPERATURE (°C) Figure 13. Open-Loop Gain vs. Temperature Rev. B | Page 7 of 20 03023-B-013 –2.0 –5 1M 03023-B-012 OPEN-LOOP GAIN (V/V) 1.0 03023-B-009 INPUT BIAS CURRENT (pA) 1.5 125 AD8627/AD8626/AD8625 600 10k VSY = ±13V VSY = ±13V OFFSET VOLTAGE (µV) 400 VSY OUTPUT VOLTAGE (mV) 500 RL = 10kΩ 300 200 RL = 100kΩ 100 0 RL = 600Ω –100 1k 100 VOL 10 VOH –300 –400 –15 –10 –5 0 5 OUTPUT VOLTAGE (V) 10 1 0.001 15 Figure 14. Input Error Voltage vs. Output Voltage for Resistive Loads 250 RL = 1kΩ 200 03023-B-017 03023-B-014 –200 0.01 0.1 1 LOAD CURRENT (mA) 10 100 Figure 17. Output Saturation Voltage vs. Load Current 10k VSY = ±5V VSY = 5V RL = 100kΩ RL = 10kΩ 100 50 0 RL = 10kΩ –50 RL = 1kΩ –100 NEG RAIL –150 1k 100 VOL 10 –250 0 50 100 150 200 250 OUTPUT VOLTAGE FROM SUPPLY RAILS (mV) 1 0.001 300 Figure 15. Input Error Voltage vs. Output Voltage within 300 mV of Supply Rails 0.1 1 LOAD CURRENT (mA) 10 100 Figure 18. Output Saturation Voltage vs. Load Current 70 800 VSY = ±13V RL = 2kΩ CL = 40pF 60 700 +125°C 50 600 +25°C 500 –55°C 315 270 225 40 180 GAIN GAIN (dB) QUIESCENT CURRENT (µA) 0.01 400 300 30 135 20 90 PHASE 10 45 0 –0 PHASE (Degrees) –200 03023-B-018 03023-B-015 VOH 200 03023-B-016 –10 100 0 0 4 8 12 16 20 TOTAL SUPPLY VOLTAGE (V) 24 –45 –20 –90 –30 10k 28 Figure 16. Quiescent Current vs. Supply Voltage at Different Temperatures Rev. B | Page 8 of 20 100k 1M FREQUENCY (Hz) 10M –135 50M Figure 19. Open-Loop Gain and Phase Margin vs. Frequency 03023-B-019 INPUT VOLTAGE (µV) 150 VSY OUTPUT VOLTAGE (mV) POS RAIL AD8627/AD8626/AD8625 140 180 80 30 135 20 90 PHASE 10 45 0 –0 –45 –20 –90 –30 10k 100k 1M FREQUENCY (Hz) –135 50M 10M 60 40 20 0 –10 –20 –40 –60 1k 10k Figure 20. Open Loop Gain and Phase Margin vs. Frequency 100k FREQUENCY (Hz) 1M 10M Figure 23. CMRR vs. Frequency 70 140 VSY = ±13V 60 RL = 2kΩ CL = 40pF 50 120 VSY = 5V 100 40 80 30 CMRR (dB) GAIN (dB) G = 100 20 G = 10 10 0 60 40 20 0 G=1 –20 –30 1k 10k 100k 1M FREQUENCY (Hz) 10M –40 –60 1k 50M Figure 21. Closed-Loop Gain vs. Frequency 50 10k 100k FREQUENCY (Hz) 1M 10M Figure 24. CMRR vs. Frequency 70 60 03023-B-024 –20 03023-B-021 –10 140 VSY = 5V RL = 2kΩ CL = 40pF 120 VSY = ±13V 100 40 80 G = 100 +PSRR PSRR (dB) 30 20 G = 10 10 0 60 40 –PSRR 20 0 G=1 –20 –20 –30 1k 10k 100k 1M FREQUENCY (Hz) 10M 03023-B-025 –10 03023-B-022 GAIN (dB) GAIN (dB) GAIN 100 03023-B-023 40 VSY = ±13V 120 CMRR (dB) 50 315 VSY = 5V RL = 2kΩ 270 CL = 40pF 225 PHASE (Degrees) 60 03023-B-020 70 –40 –60 1k 50M Figure 22. Closed-Loop Gain vs. Frequency 10k 100k FREQUENCY (Hz) Figure 25. PSRR vs. Frequency Rev. B | Page 9 of 20 1M 10M AD8627/AD8626/AD8625 140 VSY = ±13V INPUT VSY = 5V 120 VOLTAGE (10V/DIV) 100 PSRR (dB) 80 60 40 +PSRR 20 –PSRR OUTPUT 0 03023-B-026 03023-B-029 –20 –40 –60 1k 10k 100k FREQUENCY (Hz) 1M TIME (400µs/DIV) 10M Figure 29. No Phase Reversal Figure 26. PSRR vs. Frequency 270 15 VSY = ±13V 10 240 TS + (1%) OUTPUT SWING (V) 180 150 120 90 G = 10 0 TS – (0.1%) –5 TS – (1%) –10 03023-B-027 G = 100 30 10k TS + (0.1%) G=1 60 0 1k 5 100k 1M FREQUENCY (Hz) 10M –15 100M 0 Figure 27. Output Impedance vs. Frequency 1.0 1.5 SETTLING TIME (µs) 2.0 2.5 Figure 30. Output Swing and Error vs. Settling Time 300 70 240 VS = ±13V RL = 10kΩ 60 VIN = 100mV p-p AV = +1 210 50 VSY = 5V OVERSHOOT (%) 270 180 150 120 90 G = 10 40 OS– 30 OS+ 20 G=1 60 G = 100 30 0 1k 10k 10 03023-B-028 ZOUT (Ω) 0.5 100k 1M FREQUENCY (Hz) 10M 0 10 100M Figure 28. Output Impedance vs. Frequency 03023-B-031 ZOUT (Ω) 210 03023-B-030 300 100 CAPACITANCE (pF) Figure 31. Small Signal Overshoot vs. Load Capacitance Rev. B | Page 10 of 20 1k AD8627/AD8626/AD8625 56 70 VS = ±2.5V RL = 10kΩ 60 VIN = 100mV p-p AV = +1 42 VOLTAGE (nV) 50 OVERSHOOT (%) VSY = ±13V 49 40 30 35 19.7nV/ Hz 28 21 OS+ 20 14 03023-B-032 10 0 10 100 CAPACITANCE (pF) 03023-B-035 OS– 7 0 0 1k 1 2 3 4 5 6 FREQUENCY (kHz) 7 8 9 10 8 9 10 Figure 35. Voltage Noise Density Figure 32. Small Signal Overshoot vs. Load Capacitance 56 VSY = ±3V AVO = 100,000V/V VSY = 5V 42 VOLTAGE (nV) VOLTAGE (50mV/DIV) 49 0 35 16.7nV/ Hz 28 21 03023-B-036 03023-B-033 14 7 0 TIME (1s/DIV) 0 Figure 33. 0.1 Hz to 10 Hz Noise 2 3 4 5 6 FREQUENCY (kHz) 7 Figure 36. Voltage Noise Density –40 VSY = ±2.5V AVO = 100,000V/V –50 NOISE (dB) –60 0 –70 VSY = ±5V, VIN = 9V p-p –80 VSY = ±13V, VIN = 18V p-p –90 –110 10 TIME (1s/DIV) 100 1k FREQUENCY (Hz) 03023-B-037 VSY = ±2.5V, VIN = 4.5V p-p –100 03023-B-034 VOLTAGE (50mV/DIV) 1 10k 100k Figure 37. Total Harmonic Distortion + Noise vs. Frequency Figure 34. 0.1 Hz to 10 Hz Noise Rev. B | Page 11 of 20 AD8627/AD8626/AD8625 20kΩ 2kΩ VIN 2kΩ 2kΩ –80 –90 VIN = 9V p-p VIN = 4.5V p-p VIN = 18V p-p –110 –120 –130 –140 03023-B-049 GAIN (dB) –100 –150 –160 10 100 1k 10k FREQUENCY (Hz) 100k Figure 38. Channel Separation Rev. B | Page 12 of 20 AD8627/AD8626/AD8625 APPLICATIONS VOLTAGE (2V/DIV) INPUT 03023-B-038 OUTPUT TIME (2µs/DIV) Figure 39. Unity Gain Follower Response to 0 V to 4 V Step VSY = 5V INPUT OUTPUT 03023-B-039 The AD862x will not experience phase reversal with input signals close to the positive rail, as shown in Figure 29. For input voltages greater than +VSY, a resistor in series with the AD862x’s noninverting input prevents phase reversal at the expense of greater input voltage noise. This current limiting resistor should also be used if there is a possibility of the input voltage exceeding the positive supply by more than 300 mV, or if an input voltage is applied to the AD862x when ±VSY = 0. Either of these conditions will damage the amplifier if the condition exists for more than 10 seconds. A 100 kΩ resistor allows the amplifier to withstand up to 10 V of continuous overvoltage, while increasing the input voltage noise by a negligible amount. VSY = 5V VOLTAGE (2V/DIV) The AD862x is one of the smallest and most economical JFETs offered. It has true single-supply capability and has an input voltage range that extends below the negative rail, allowing the part to accommodate input signals below ground. The rail-to-rail output of the AD862x provides the maximum dynamic range in many applications. To provide a low offset, low noise, high impedance input stage, the AD862x uses n-channel JFETs The input common-mode voltage extends from 0.2 V below –VS to 2 V below +VS. Driving the input of the amplifier, configured in unity gain buffer, closer than 2 V to the positive rail causes an increase in common-mode voltage error, as illustrated in Figure 15, and a loss of amplifier bandwidth. This loss of bandwidth causes the rounding of the output waveforms shown in Figure 39 and Figure 40, which have inputs that are 1 V and 0 V from +VS, respectively. TIME (2µs/DIV) Figure 40. Unity Gain Follower Response to 0 V to 5 V Step Rev. B | Page 13 of 20 AD8627/AD8626/AD8625 The AD862x can safely withstand input voltages 15 V below VSY if the total voltage between the positive supply and the input terminal is less than 26 V. Figure 41 through Figure 43 show the AD862x in different configurations accommodating signals close to the negative rail. The amplifier input stage typically maintains picoamp-level input currents across that input voltage range. 20kΩ 10kΩ +5V 0V –10mV –30mV 20kΩ VSY = 5V +5V VOLTAGE (10mV/DIV) 10kΩ 0V –2.5V VOLTAGE (1V/DIV) 03023-B-042 VSY = 5V, 0V TIME (2µs/DIV) 03023-B-040 Figure 43. Gain of Two Inverter Response to 20 mV Step, Centered 20 mV below Ground TIME (2µs/DIV) Figure 41. Gain of Two Inverter Response to 2.5 V Step, Centered –1.25 V below Ground The AD862x has a unique bipolar rail-to-rail output stage that swings within 5 mV of the rail when up to 2 mA of current is drawn. At larger loads, the drop-out voltage increases as shown in Figure 17 and Figure 18. The AD862x’s wide bandwidth and fast slew rate allows it to be used with faster signals than previous single-supply JFETs. Figure 44 shows the response of AD862x, configured in unity gain, to a VIN of 20 V p-p at 50 kHz. The FPBW of the part is close to 100 kHz. 60mV 20mV 0V The AD862x is designed for 16 nV/√Hz wideband input voltage noise and maintains low noise performance to low frequencies, as shown in Figure 35. This noise performance, along with the AD862x’s low input current and current noise, means that the AD862x contributes negligible noise for applications with large source resistances. 5V 600Ω VOLTAGE (5V/DIV) VOLTAGE (10mV/DIV) VSY = ±13V RL = 600Ω 03023-B-043 03023-B-041 VSY = 5V RL = 600Ω TIME (2µs/DIV) TIME (5µs/DIV) Figure 42. Unity Gain Follower Response to 40 mV Step, Centered 40 mV above Ground Figure 44. Unity Gain Follower Response to 20 V, 50 kHz Input Signal Rev. B | Page 14 of 20 AD8627/AD8626/AD8625 MINIMIZING INPUT CURRENT The resulting output voltage error, VE, is equal to The AD862x is designed for mounting on PC boards. Maintaining picoampere resolution in those environments requires a lot of care. Both the board and the amplifier’s package have finite resistance. Voltage differences between the input pins and other pins as well as PC board metal traces may cause parasitic currents larger than the AD862x’s input current, unless special precautions are taken. For proper board layout to ensure the best result, refer to the ADI website for proper layout seminar material. Two common methods of minimizing parasitic leakages that should be used are guarding of the input lines and maintaining adequate insulation resistance. Contaminants such as solder flux on the board’s surface and the amplifier’s package can greatly reduce the insulation resistance between the input pin and traces with supply or signal voltages. Both the package and the board must be kept clean and dry. PHOTODIODE PREAMPLIFIER APPLICATION The low input current and offset voltage levels of the AD862x, together with its low voltage noise, make this amplifier an excellent choice for preamplifiers used in sensitive photodiode applications. In a typical photovoltaic preamp circuit, shown in Figure 45, the output of the amplifier is equal to VOUT = − ID(Rf) = − R p(P)Rf where: ID = photodiode signal current (A) Rp = photodiode sensitivity (A/W) Rf = value of the feedback resistor, in Ω P = light power incident to photodiode surface, in W The amplifier’s input current, IB, contributes an output voltage error proportional to the value of the feedback resistor. The offset voltage error, VOS, causes a small current error due to the photodiode’s finite shunt resistance, RD. ⎛ Rf VE = ⎜⎜ 1 + ⎝ RD ⎞ ⎟VOS + Rf(I B ) ⎟ ⎠ A shunt resistance on the order of 100 MΩ is typical for a small photodiode. Resistance RD is a junction resistance that typically drops by a factor of two for every 10°C rise in temperature. In the AD862x, both the offset voltage and drift are low, which helps minimize these errors. With IB values of 1 pA and VOS of 50 mV, VE for Figure 45 is very negligible. Also, the circuit in Figure 45 results in an SNR value of 95 dB for a signal bandwidth of 30 kHz. CF 5pF PHOTODIODE VOS RF 1.5MΩ OUTPUT RD 100MΩ IB C4 I 15pF B AD8627 03023-B-044 The AD862x is guaranteed to 1 pA max input current with a ±13 V supply voltage at room temperature. Careful attention to how the amplifier is used will maintain or possibly better this performance. The amplifier’s operating temperature should be kept as low as possible. Like other JFET input amplifiers, the AD862x’s input current doubles for every 10°C rise in junction temperature, as illustrated in Figure 8. On-chip power dissipation raises the device operating temperature, causing an increase in input current. Reducing supply voltage to cut power dissipation reduces the AD862x’s input current. Heavy output loads can also increase chip temperature; maintaining a minimum load resistance of 1 kΩ is recommended. Figure 45. A Photodiode Model Showing DC Error OUTPUT AMPLIFIER FOR DIGITAL-TO-ANALOG CONVERTERS Many system designers use amplifiers as buffers on the output of amplifiers to increase the DAC’s output driving capability. The high resolution current output DACs need high precision amplifiers on their output as current to voltage converters (I/V). Additionally, many DACs operate with a single supply of 5 V. In a single-supply application, selection of a suitable op amp may be more difficult because the output swing of the amplifier does not usually include the negative rail, in this case AGND. This can result in some degradation of the DAC’s specified performance unless the application does not use codes near zero. The selected op amp needs to have very low offset voltage—for a 14-bit DAC, the DAC LSB is 300 µV with a 5 V reference—to eliminate the need for output offset trims. Input bias current should also be very low because the bias current multiplied by the DAC output impedance (about 10 kΩ in some cases) adds to the zero code error. Rail-to-rail input and output performance is desired. For fast settling, the slew rate of the op amp should not impede the settling time of the DAC. Output impedance of the DAC is constant and code independent, but in order to minimize gain errors, the input impedance of the output amplifier should be as high as possible. The AD862x, with very high input impedance, IB of 1 pA, and fast slew rate, is an ideal amplifier for these types of applications. A typical configuration with a popular DAC is shown in Figure 46. In these situations, the amplifier adds another time constant to the system, increasing the settling time of the output. The AD862x, with 5 MHz of BW, helps in achieving a faster effective settling time of the combined DAC and amplifier. Rev. B | Page 15 of 20 AD8627/AD8626/AD8625 2.5V 5V 10µF EIGHT-POLE SALLEN KEY LOW-PASS FILTER 0.1µF 0.1µF 5V SERIAL INTERFACE VDD VREFF* VREFS * CS DIN SCLK AD8627 AD5551/AD5552 UNIPOLAR OUTPUT OUT DGND 03023-B-045 LDAC* AGND *AD5552 ONLY Figure 46. Unipolar Output In applications with full 4-quadrant multiplying capability or a bipolar output swing, the circuit in Figure 47 can be used. In this circuit, the first and second amplifiers provide a total gain of 2, which increases the output voltage span to 20 V. Biasing the external amplifier with a 10 V offset from the reference voltage results in a full 4-quadrant multiplying circuit. The AD862x’s high input impedance and dc precision make it a great selection for active filters. Due to the very low bias current of the AD862x, high value resistors can be used to construct low frequency filters. The AD862x’s picoamp-level input currents contribute minimal dc errors. Figure 49 shows an example, a 10 Hz, 8-pole Sallen Key filter constructed using the AD862x. Different numbers of the AD862x can be used depending on the desired response, which is shown in Figure 48. The high value used for R1 minimizes interaction with signal source resistance. Pole placement in this version of the filter minimizes the Q associated with the lower pole section of the filter. This eliminates any peaking of the noise contribution of resistors in the preceding sections, minimizing the inherent output voltage noise of the filter. 1.2 V4 10kΩ +13V VOLTAGE (V) 10kΩ V2 10V VREF 5kΩ V3 0.8 1/2 AD8626 VOUT V1 0.4 ADR01 –10V < VOUT < +10V VREFX RFBX 0 0.1 ONE CHANNEL AD5544 VSS AGNDF 1 10 100 FREQUENCY (Hz) AGNDX 1/2 AD8626 DIGITAL INTERFACE CONNECTIONS OMITTED FOR CLARITY 03023-B-046 VDD 03023-B-047 –13V Figure 47. 4-Quadrant Multiplying Application Circuit Rev. B | Page 16 of 20 Figure 48. Frequency Response Output at Different Stages of the Low-Pass Filter 1k AD8627/AD8626/AD8625 C1 100µF V3 VIN R2 162.3kΩ VDD 3 4 U1 1 2 D C2 96.19µF D C3 100µF R10 V1 191.4kΩ 1/4 11 AD8625 R5 191.4kΩ R3 25kΩ R11 286.5kΩ U2 VEE C5 100µF V2 1/4 AD8625 C4 69.14µF R7 286.5kΩ R4 25kΩ V3 R9 815.8kΩ 1/4 AD8625 C6 30.86µF C7 100µF R12 815.8kΩ U3 D V4 D R6 25kΩ U4 1/4 AD8625 C8 3.805µF D R8 25kΩ Figure 49. 10 Hz, 8-Pole Sallen Key Low-Pass Filter Rev. B | Page 17 of 20 03023-B-048 R1 162.3kΩ AD8627/AD8626/AD8625 OUTLINE DIMENSIONS 8.75 (0.3445) 8.55 (0.3366) 2.00 BSC 5 4 1.25 BSC 4.00 (0.1575) 3.80 (0.1496) 2.10 BSC 1 2 8 1 7 6.20 (0.2441) 5.80 (0.2283) 3 PIN 1 1.27 (0.0500) BSC 0.65 BSC 1.00 0.90 0.70 0.25 (0.0098) 0.10 (0.0039) 1.10 MAX 0.22 0.08 0.30 0.15 0.10 MAX 14 0.46 0.36 0.26 8° 4° 0° SEATING PLANE 0.51 (0.0201) 0.31 (0.0122) COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-203AA Figure 50. 5-Lead Plastic Surface-Mount Package [SC70] (KS-5) Dimensions shown in millimeters 5 4 5.10 5.00 4.90 6.20 (0.2440) 5.80 (0.2284) 14 1.27 (0.0500) BSC 0.50 (0.0196) × 45° 0.25 (0.0099) 1.75 (0.0688) 1.35 (0.0532) 0.25 (0.0098) 0.10 (0.0040) 8 4.50 4.40 4.30 6.40 BSC 1 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) Figure 53. 14-Lead Standard Small Outline Package [SOIC] Narrow Body (R-14) Dimensions shown in millimeters and (inches) 5.00 (0.1968) 4.80 (0.1890) 8 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MS-012AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 0.10 COPLANARITY 4.00 (0.1574) 3.80 (0.1497) 1 0.50 (0.0197) × 45° 0.25 (0.0098) 1.75 (0.0689) 1.35 (0.0531) 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) 7 PIN 1 COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 1.05 1.00 0.80 0.65 BSC 1.20 MAX 0.15 0.05 0.30 0.19 0.20 0.09 SEATING COPLANARITY PLANE 0.10 8° 0° COMPLIANT TO JEDEC STANDARDS MO-153AB-1 Figure 51. 8-Lead Standard Small Outline Package [SOIC] Narrow Body (R-8) Figure 54. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters 3.00 BSC 8 5 4.90 BSC 3.00 BSC 4 PIN 1 0.65 BSC 1.10 MAX 0.15 0.00 0.38 0.22 COPLANARITY 0.10 0.23 0.08 8° 0° 0.80 0.60 0.40 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-187AA Figure 52. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Rev. B | Page 18 of 20 0.75 0.60 0.45 AD8627/AD8626/AD8625 ORDERING GUIDE Model AD8627AKS-REEL AD8627AKS-REEL7 AD8627AKS-R2 AD8627AR AD8627AR-REEL AD8627AR-REEL7 AD8626ARM-REEL AD8626ARM-R2 AD8626AR AD8626AR-REEL AD8626AR-REEL7 AD8625ARU AD8625ARU-REEL AD8625AR AD8625AR-REEL AD8625AR-REEL7 Temperature Range –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C Package Description 5-Lead SC70 5-Lead SC70 5-Lead SC70 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 14-Lead TSSOP 14-Lead TSSOP 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC Rev. B | Page 19 of 20 Package Option KS-5 KS-5 KS-5 R-8 R-8 R-8 RM-8 RM-8 R-8 R-8 R-8 RU-14 RU-14 R-14 R-14 R-14 Branding B9A B9A B9A BJA BJA AD8627/AD8626/AD8625 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C03023-0-1/04(B) Rev. B | Page 20 of 20