BCcomponents DATA SHEET Class 1, NP0 low voltage 10, 16, 25 and 50 V Surface mount multilayer chip capacitors Product specification Supersedes data of 3rd May 2001 File under BCcomponents, BC06 2001 Jun 13 BCcomponents Product specification Surface mount multilayer chip capacitors FEATURES QUICK REFERENCE DATA • Ultra stable class 1 dielectric • Six standard sizes • High capacitance per unit volume • Supplied in tape on reel or bulk in a polythene bag • For high frequency applications • Ni-barrier terminations. APPLICATIONS • Consumer electronics Class 1, NP0 low voltage 10, 16, 25 and 50 V DESCRIPTION Rated voltage UR (DC) VALUE 10 V; 16 V; 25 V; 50 V Capacitance range, for size code: 0402 0.5 to 150 pF 0603 0.5 pF to 1 nF 0805 0.5 pF to 1.5 nF 1206 1.5 pF to 3.3 nF 1210 22 pF to 5.6 nF 1 nF to .010 µF 1812 Tolerance on capacitance: • Telecommunications C ≥ 10 pF ±2%; ±5%; ±10% • Automotive C < 10 pF ±0.5 pF; ±0.25 pF; ±0.1 pF • Data processing. Test voltage (DC) for 1 minute Climatic category (IEC 68) 2.5 × UR 55/125/56 DESCRIPTION The capacitor consists of a rectangular block of ceramic dielectric in which a number of interleaved precious metal electrodes are contained. This structure gives rise to a high capacitance per unit volume. The inner electrodes are connected to the two terminations by silver dipping with a barrier layer of plated nickel and finally covered with a layer of plated tin (NiSn). A cross section of the structure is shown in Fig.1. terminations electrodes JW115 ceramic material Fig.1 Construction of a multilayer chip capacitor. 2001 Jun 13 2 BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V MECHANICAL DATA W T MB MB JW114 L For dimensions see Table 1. Fig.2 Component outline. Physical dimensions Table 1 Capacitor dimensions; see Fig.2 SIZE CODE L T W MIN. MAX. MB Dimensions in millimetres 0402 1.0 ±0.05 0.5 ±0.05 0.45 0.55 0.25 +0.05/−0.10 0603 1.6 ±0.10 0.8 ±0.07 0.73 0.87 0.40 ±0.15 0805 2.0 ±0.15 1.25 ±0.15 0.50 1.35 0.50 ±0.20 1206 3.2 ±0.15 1.6 ±0.15 0.50 1.75 0.60 ±0.20 1210 3.2 ±0.30 2.5 ±0.20 0.50 1.80 0.75 ±0.25 1812 4.5 ±0.40 3.2 ±0.30 0.50 1.80 0.75 ±0.25 0402 0.040 ±0.002 0.020 ±0.002 0.018 0.022 0.010 ±0.006 0603 0.063 ±0.004 0.030 ±0.004 0.029 0.035 0.015 ±0.006 0805 0.080 ±0.006 0.050 ±0.006 0.020 0.053 0.020 ±0.008 1206 0.125 ±0.006 0.063 ±0.006 0.020 0.069 0.025 ±0.008 1210 0.125 ±0.012 0.100 ±0.008 0.020 0.072 0.030 ±0.010 1812 0.180 ±0.015 0.125 ±0.012 0.020 0.072 0.030 ±0.010 Dimensions in inches 2001 Jun 13 3 BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V SELECTION CHART FOR 10 AND 16 V C (pF) 0.5 1.0 1.2 1.5 1.8 2.2 2.7 3.3 3.9 4.7 5.6 6.8 8.2 10 12 15 18 22 27 33 39 47 56 68 82 100 120 150 180 220 270 330 390 470 560 680 820 1000 1200 1500 1800 2200 2700 3300 3900 4700 5600 6800 8200 10000 10 V 0402 0603 0805 16 V 1206 1210 1812 N(1) 0402 0603 1206 1210 1812 N(1) A(1) A(1) S(1) S(1) B(1) B(1) C(1) C(1) B(1) B(1) C(1) D(1) Note 1. For thickness classification, see “Thickness classification and packaging quantities”. 2001 Jun 13 0805 4 C(1) D(1) BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V Thickness classification and packaging quantities 8 mm TAPE WIDTH AMOUNT PER REEL THICKNESS CLASSIFICATION (mm) A= B= C= D= S= N= 0.65 +0.05/−0.15 0.85 +0.05/−0.15 1.00 +0.05/−0.15 1.20 +0.15/−0.15 0.80 ±0.07 0.50 ±0.05 12 mm TAPE WIDTH AMOUNT PER REEL ∅180 mm; 7"; note 1 0402 0603 0805 1210 1812 PAPER PAPER PAPER PAPER 1206 BLISTER BLISTER BLISTER − − − − − 10000 − − − − 4000 − 4000 4000 − − − − − 4000 − − − − − − 3000 − − − − − 3000 − − − − − − 1000 − − Note 1. A 13" reel is available on request. ORDERING INFORMATION FOR 10 AND 16 V Components may be ordered by using either a simple 14-digit clear text code, or BCcomponents 12NC. Clear text code EXAMPLE: 0402N101J100NT SIZE CODE 0402 1206 0603 1210 0805 1812 DIELECTRIC N = COG (NP0) CAPACITANCE (pF) two significant digits followed by the number of zeros: 101 = 100 102 = 1000 152 = 1500 103 = 10000 TOLERANCE VOLTAGE B = ±0.1 pF G = ±2% 100 = 10 V C = ±0.25 pF J = ±5% 160 = 16 V D = ±0.50 pF K = ±10% TECHNOLOGY N = noble metal PACKAGING T = 7" reel/paper G = 13" reel/paper P = 7" reel/blister L = 13" reel/blister B = bulk/ polythene bag Ordering code 12NC 2 2 5 2 XX X X X XX X Dielectric and Tolerance 00 NP0 Ni ±0.1 pF 01 NP0 Ni ±0.25 pF 02 NP0 Ni ±0.5 pF 03 NP0 Ni ±2% 04 NP0 Ni ±5% 05 NP0 Ni ±10% 07 Y5V Ni ±20% 08 Y5V Ni −20/+80% 10 X7R Ni ±5% 11 X7R Ni ±10% 12 X7R Ni ±20% Multiplier 1 10 2 100 3 1 000 4 10 000 5 100 000 6 1 000 000 7 others: 10 000 000 NP0: 0.01 8 0.10 9 1.00 Capacitance (pF) Size 1 0402 2 0603 3 0805 4 1206 5 1210 6 1808 7 1812 two significant digits of capacitance value Packaging 0 1 2 3 4 Rated voltage 1 10 V 2 16 V 3 25 V 4 50 V 5 100 V 6 200 V 7 500 V 8 1000 V 9 others (1) Refer to chapter “Selection chart for 10 and 16 V”. 2001 Jun 13 JW129 5 bulk paper: ∅180 mm; 7" paper: ∅330 mm; 13" blister: ∅180 mm; 7" blister: ∅330 mm; 13" BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V SELECTION CHART FOR 25 AND 50 V C (pF) 0.5 1.0 1.2 1.5 1.8 2.2 2.7 3.3 3.9 4.7 5.6 6.8 8.2 10 12 15 18 22 27 33 39 47 56 68 82 100 120 150 180 220 270 330 390 470 560 680 820 1000 1200 1500 1800 2200 2700 3300 3900 4700 5600 6800 8200 10000 25 V 0402 0603 0805 50 V 1206 1210 1812 0402 0603 1206 1210 1812 N(1) N(1) A(1) A(1) S(1) S(1) B(1) B(1) C(1) B(1) B(1) B(1) D(1) C(1) D(1) Note 1. For thickness classification, see “Thickness classification and packaging quantities”. 2001 Jun 13 0805 6 C(1) BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V Thickness classification and packaging quantities 8 mm TAPE WIDTH AMOUNT PER REEL THICKNESS CLASSIFICATION (mm) A= B= C= D= S= N= 0.65 +0.05/−0.15 0.85 +0.05/−0.15 1.00 +0.05/−0.15 1.20 +0.15/−0.15 0.80 ±0.07 0.50 ±0.05 12 mm TAPE WIDTH AMOUNT PER REEL ∅180 mm; 7"; note 1 0402 0603 0805 1210 1812 PAPER PAPER PAPER PAPER 1206 BLISTER BLISTER BLISTER − − − − − 10000 − − − − 4000 − 4000 4000 − − − − − 4000 − − − − − − 3000 − − − − − 3000 − − − − − 1000 1000 − − Note 1. A 13" reel is available on request. ORDERING INFORMATION FOR 25 AND 50 V Components may be ordered by using either a simple 14-digit clear text code, or BCcomponents 12NC. Clear text code EXAMPLE: 0402N100J250NT SIZE CODE 0402 1206 0603 1210 0805 1812 DIELECTRIC N = COG (NP0) CAPACITANCE two significant digits followed by the number of zeros: 101 = 100 102 = 1000 152 = 1500 103 = 10000 TOLERANCE VOLTAGE B = ±0.1 pF G = ±2% 250 = 25 V C = ±0.25 pF J = ±5% 500 = 50 V D = ±0.50 pF K = ±10% TECHNOLOGY N = noble metal PACKAGING T = 7" reel/paper G = 13" reel/paper P = 7" reel/blister L = 13" reel/blister B = bulk/ polythene bag Ordering code 12NC 2 2 5 2 XX X X X XX X Dielectric and Tolerance 00 NP0 Ni ±0.1 pF 01 NP0 Ni ±0.25 pF 02 NP0 Ni ±0.5 pF 03 NP0 Ni ±2% 04 NP0 Ni ±5% 05 NP0 Ni ±10% 07 Y5V Ni ±20% 08 Y5V Ni −20/+80% 10 X7R Ni ±5% 11 X7R Ni ±10% 12 X7R Ni ±20% Multiplier 1 10 2 100 3 1 000 4 10 000 5 100 000 6 1 000 000 7 others: 10 000 000 NP0: 0.01 8 0.10 9 1.00 Capacitance (pF) Size 1 0402 2 0603 3 0805 4 1206 5 1210 6 1808 7 1812 Rated voltage 1 10 V 2 16 V 3 25 V 4 50 V two significant digits of capacitance value Packaging 5 6 7 8 9 0 1 2 3 4 100 V 200 V 500 V 1000 V others JW129 (1) Refer to chapter “Selection chart for 25 and 50 V”. 2001 Jun 13 7 bulk paper: ∅180 mm; 7" paper: ∅330 mm; 13" blister: ∅180 mm; 7" blister: ∅330 mm; 13" BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V ELECTRICAL CHARACTERISTICS Class 1 capacitors; NP0 dielectric; NiSn terminations Unless otherwise stated all electrical values apply at an ambient temperature of 20 ±1 °C, an atmospheric pressure of 86 to 106 kPa, and a relative humidity of 63 to 67%. DESCRIPTION VALUE Capacitance range, for size code: 0402 0.5 to 150 pF 0603 0.5 pF to 1 nF 0805 0.5 pF to 1.5 nF 1206 1.5 pF to 3.3 nF 1210 22 pF to 5.6 nF 1 nF to .010 µF 1812 Tolerance on capacitance: C ≥ 10 pF ±2%; ±5%; ±10% C < 10 pF ±0.1 pF; ±0.5 pF; ±0.25 pF Q: C ≥ 30 pF Q ≥ 1000 C < 30 pF Q ≥ 400 + 20C 100 GΩ min. or 1000 ΩF min., whichever is less Insulation resistance after 1 minute at UR (DC) ±30 × 10−6/K Temperature coefficient Ageing 2001 Jun 13 not applicable 8 BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V PACKAGING General information Tape on reel For the combination carrier/cover tape no electrostatic behaviour is observed (relative humidity ≥30%). The products do not stick to the cover tape. Packaging conforms fully with “IEC 60286-3”, “EIA 481-1” and “JIS C0806” industrial standards. The technical and thermal properties of polycarbonate tapes are excellent, so there is no change in dimensions as a function of time. The peel off force is very stable as a function of time and temperature, and it is defined as 0.1 to 0.7 N at a peel-off speed of 120 mm/minute. Multilayer Chip Capacitors are supplied on tape on reel or bulk in a polythene bag. For MLCCs with a product thickness of <1 mm, paper tape is preferred. MLCCs with a product thickness of ≥1 mm, are supplied in blister tape. CARRIER TAPE Polycarbonate. Table 2 Properties of carrier tape PARAMETER WIDTH 8.1 ±0.2 mm 12 ±0.2 mm Thickness 190 to 280 µm 240 ±20 µm Tensile strength at break >60 N/mm2 >60 N/mm2 Elongation at break 100 to 150% 100 to 150% Surface resistance >1012 Ω/sq. >1012 Ω/sq. COVER TAPE Polyester (antistatic). Table 3 Properties of cover tape PARAMETER WIDTH 5.5 ±0.1 mm 9.5 ±0.1 mm Breaking force ≥10.7 N ≥17.6 N Elongation at break ≥63% ≥63% Surface resistance <1010 Ω/sq. <1010 Ω/sq. Softening point 71 ±5 °C 71 ±5 °C Thickness 62 µm 62 µm 2001 Jun 13 9 BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V Paper tape specifications T1 P0 P2 D0 E F W B0 A0 P1 JW120 T2 For dimensions see Table 4. Fig.3 Paper tape. Table 4 Dimensions of paper tape for relevant product size, in millimetres; see Fig.3 PRODUCT SIZE CODE SYMBOL 0402 0603 0805 1206 SIZE TOL. SIZE TOL. SIZE TOL. SIZE TOL. A0 0.62 ±0.05 1.10 ±0.05 1.65 ±0.05 2.0 ±0.1 B0 1.12 ±0.05 1.90 ±0.05 2.40 ±0.05 3.5 ±0.1 W 8.0 ±0.2 8.0 ±0.3 8.0 ±0.2 8.0 ±0.2 E 1.75 ±0.1 1.75 ±0.1 1.75 ±0.1 1.75 ±0.1 F 3.5 ±0.05 3.5 ±0.05 3.5 ±0.05 3.5 ±0.05 D0 1.5 +0.1/-0 1.5 +0.1/−0 1.5 +0.1/−0 1.5 +0.1/−0 P0; note 1 4 ±0.05 4 ±0.1 4 ±0.05 4 ±0.05 P1 2 ±0.05 4 ±0.1 4 ±0.1 4 ±0.1 P2 2 ±0.05 2 ±0.05 2 ±0.05 2 ±0.05 T1 max 0.6 ±0.05 1.05 ±0.05 0.95 ±0.05 0.95 ±0.05 T2 max 0.62 ±0.05 1.2 ±0.05 0.95 ±0.05 0.95 ±0.05 Note 1. P0 pitch tolerance over any 10 pitches is ±0.2 mm. 2001 Jun 13 10 BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V Blister tape specifications P0 K0 D0 T P2 E F cover tape W B0 JW119 A0 T1 D1 T2 P1 direction of unreeling K0: so chosen that the orientation of the component cannot change. For dimensions see Table 5. Fig.4 Blister tape. Table 5 Dimensions of blister tape for relevant product size code, in millimetres; see Fig.4 DIMENSION PRODUCT SIZE CODE 0805 1206 1210 1812 TOLERANCE A0 nominal clearance; note 1 0.20 0.30 0.30 0.40 − B0 nominal clearance; note 1 0.20 0.30 0.30 0.40 − K0 minimum clearance; note 1 0.05 0.05 0.05 0.05 W 8.0 8.0 8.0 E 1.75 1.75 1.75 1.75 ±0.1 F 3.5 3.5 3.5 5.5 ±0.05 1.5 1.5 +0.1/−0.0 1.5 +0.1/−0.0 D0 1.5 1.5 12.0 − ±0.3 ≥1 ≥1 ≥1 P0; note 2 4 4 4 4 P1 4 4 4 8 ±0.1 P2 2 2 2 2 ±0.05 D1 ±0.1 Tmax 0.3 − − − − T1 cover tape 0.05 − − − − T2 2.0 − − − − Notes 1. Typical capacitor displacement in pocket. 2. P0 pitch tolerance over any 10 pitches is ±0.2 mm. 2001 Jun 13 11 BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V Reel specifications D A C JW121 B Dimensions in mm. For dimensions see Table 6. Fig.5 Reel. Table 6 Reel dimensions and tape width for relevant chip size; see Fig.5 8 mm TAPE WIDTH DIMENSION (mm) ∅180 mm; 7"; note 1 0402 A B C D 13.0 ±1.0 9.0 ±1.0 178.0 ±1.0 60.5 ±1.0 0603 13.0 ±1.0 9.0 ±1.0 178.0 ±1.0 60.5 ±1.0 0805 13.0 ±1.0 9.0 ±1.0 178.0 ±1.0 60.5 ±1.0 Note 1. A 13" reel is available on request. Properties of reel Material: polystyrene Surface resistance: <1010 Ω/sq. 2001 Jun 13 12 mm TAPE WIDTH 12 1206 13.0 ±0.5 9.0 ±0.5 178.0 ±1.0 60.5 ±1.0 1210 13.0 ±1.0 9.0 ±1.0 178.0 ±1.0 60.5 ±1.0 1812 13.0 ±1.0 13.5 ±1.0 178.0 ±1.0 80.0 ±1.0 BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V Leader/trailer tape specification leader end cover tape only empty compartments with cover tape trailer end trailer (max. 260 mm) leader 120 40 mm 400 mm JW125 Fig.6 Leader/trailer tape. Table 7 Leader/trailer tape data DESCRIPTION VALUE Minimum length of empty compartments at leader end ≥400 mm of which a minimum 240 mm of empty compartments are covered with cover tape and 120 ±40 mm cover tape only Minimum length of empty compartments at trailer end 208 mm or 260 mm. If the length is 260 mm an extra product is placed at 208 mm to mark this position. 2001 Jun 13 13 BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V METHOD OF MOUNTING AND DIMENSIONS OF SOLDER LANDS An improper combination of soldering, substrate and chip size can lead to a damaging of the component. The risk increases with the chip size and with temperature fluctuations (>100 °C). Therefore, it is advised to use the smallest possible size and follow the dimensional recommendations given in Tables 8 and 9 for reflow and wave soldering. More detailed information is available on request. For normal use the capacitors may be mounted on printed-circuit boards or ceramic substrates by applying wave soldering, reflow soldering (including vapour phase soldering) or conductive adhesive in accordance with CECC 00802 classification A. For advised soldering profiles see Figs 7, 8 and 9. 300 JW122 10 s T ( C) 260 C 245 C 250 10 s 215 C 200 40 s 180 C 150 130 C 100 2 K/s 50 0 0 50 100 150 200 250 t (s) Typical values (solid line). Process limits (dotted lines). Fig.7 Reflow soldering. 2001 Jun 13 14 BCcomponents Product specification Surface mount multilayer chip capacitors 300 Class 1, NP0 low voltage 10, 16, 25 and 50 V 10 s T JW123 ( C) 250 235 C to 260 C 200 second wave 5 K/s first wave 2 K/s 200 K/s 150 100 C to 130 C forced cooling 100 2 K/s 50 0 0 50 100 150 200 250 t (s) Typical values (solid line). Process limits (dotted lines). The capacitors may be soldered twice in accordance with this method if desired. Fig.8 Double wave soldering. 300 JW124 T ( C) 250 20 to 40 s 215 C 200 180 C 150 forced cooling 130 C external preheating 100 C 100 internal preheating, e.g. by infrared, max. 2 K/s 50 0 0 50 100 150 200 250 t (s) Typical values (solid line). Process limits (dotted line). Fig.9 Vapour phase soldering. 2001 Jun 13 15 BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V D E C B A F G preferred direction during wave soldering solder land / solder paste pattern solder resist pattern occupied area tracks JW117 E = available track area under the MLCC. Fig.10 Recommended dimensions of solder lands. Table 8 Reflow soldering; for dimensions also see Fig.10 FOOTPRINT DIMENSIONS (mm) A B C D E F G PLACEMENT ACCURACY (mm) 0402 1.5 0.5 0.5 0.5 0.10 1.75 0.95 ±0.15 0603 2.3 0.7 0.8 0.9 0.26 2.7 1.5 ±0.15 0603 2.3 0.5 0.9 0.9 0.0 2.7 1.5 0805 2.8 0.9 0.95 1.4 0.45 3.2 2.1 1206 4.0 2.0 1.0 1.8 1.4 4.4 2.5 ±0.25 1210 4.0 2.0 1.0 2.7 1.4 4.4 3.4 ±0.25 1808 5.4 3.3 1.05 2.3 2.7 5.8 2.9 1812 5.4 3.3 1.05 3.5 2.7 5.8 4.1 SIZE CODE Table 9 PROCESSING REMARKS IR or hot plate soldering ceramic substrate only ±0.25 ±0.25 ±0.25 ±0.25 Wave soldering (no dummy tracks allowed for ≥500 V); for dimensions also see Fig.10 FOOTPRINT DIMENSIONS (mm) SIZE CODE PROPOSED NUMBER AND DIMENSIONS OF DUMMY TRACKS (mm) PLACEMENT ACCURACY (mm) A B C D E F G 0603 2.4 1.0 0.7 0.8 0.2 3.0 1.9 1 × (0.2 × 0.8) ±0.10 0603 2.7 0.9 0.9 0.8 0.0 3.2 2.1 1 × (0.3 × 0.8) ±0.25 0805 3.2 1.4 0.9 1.3 0.36 4.1 2.5 1 × (0.3 × 1.3) ±0.15 0805 3.4 1.3 1.05 1.3 0.2 4.3 2.7 1 × (0.2 × 1.3) ±0.25 1206 4.8 2.3 1.25 1.7 1.25 5.9 3.2 3 × (0.25 × 1.7) ±0.25 1210 5.3 2.3 1.5 2.6 1.25 6.3 4.2 3 × (0.25 × 2.6) ±0.25 2001 Jun 13 16 BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V TEST CONDITIONS IN STATIC SOLDER BATH PARAMETER DESCRIPTION Solderability 95% covered with smooth and bright solder coating CECC requirement: 235 ±5 °C for 2 ±0.5 s IEC requirement: 215 ±3 °C for 3 ±0.3 s Resistance to leaching 10% of the metallization of the edges of the head face may be missing (inner electrodes are not visible) 2001 Jun 13 260 ±5 °C for 30 ±1 s 17 BCcomponents Product specification Surface mount multilayer chip capacitors Class 1, NP0 low voltage 10, 16, 25 and 50 V TESTS AND REQUIREMENTS Table 10 Test procedures and requirements TEST PROCEDURE Visual and mechanical REQUIREMENTS no visible damage dimensions in accordance with specification Capacitance C ≤ 1000 pF, 1.0 ±0.2 Vrms; f = 1 MHz ±10% C > 1000 pF, 1.0 ±0.2 Vrms; f = 1 kHz ±10% Q value shall not exceed the limits given in the detailed specification C ≤ 1000 pF, 1.0 ±0.2 Vrms; f = 1 MHz ±10% ≥30 pF: Q ≥ 1000 <30 pF: Q ≥ 400 + 20C C > 1000 pF, 1.0 ±0.2 Vrms; f = 1 kHz ±10% Dielectric strength 250% of rated voltage for 1 to 5 s, charge and discharge current less than 50 mA no visible damage or flash-over during test Insulation resistance at UR (DC) for max. 60 s ±5 s 100 GΩ min. or 1000 ΩF min., whichever is less Temperature coefficient with no electrical load: −55 to 125 °C at Tamb = 25 °C 30 × 10−6/°C Bending test the middle part of the substrate shall be pressurized by means of the pressurizing rod at a rate of about 1 mm per second until the deflection becomes 1 mm and then the pressure shall be maintained for 5 ±1s measurement after 24 ±2 hours at room temperature no visible damage Solderability 230 ±5 °C for 2 ±0.5 s; solder: SN63A 95% min. coverage of entire metallized area Resistance to soldering heat 260 ±5 °C for 10 ±1 s; solder: SN63A; measurement after 24 ±2 hours at room temperature no visible damage ∆C/C: ±5.0 max. or ±0.5 pF max., whichever is greater this capacitance change means the change of capacitance under specified flexure of substrate from the capacitance measured before the test ∆C/C: ±2.5% max. or ±0.25 pF max., whichever is greater DF, Rins and dielectric strength to meet initial requirements 10% max. leaching on each edge Temperature cycle −55 to 125 °C; 5 cycles in the following sequence: −55 °C −3/+0 for 30 ±3 minutes; room temperature for 2 to 3 minutes; 125 °C +3/−0 for 30 ±3 minutes; room temperature for 2 to 3 minutes measurement after 24 ±2 hours at room temperature 2001 Jun 13 18 no visible damage ∆C/C: ±2.5% max. or ±0.25 pF max., whichever is greater DF, Rins and dielectric strength to meet initial requirements BCcomponents Product specification Surface mount multilayer chip capacitors TEST Humidity test (damp heat steady state) Class 1, NP0 low voltage 10, 16, 25 and 50 V PROCEDURE 40 ±2 °C; 90 to 95% RH for 1000 +24/−0 hours UR applied; measurement after 24 ±2 hours at room temperature REQUIREMENTS no visual damage ∆C/C: ±2.0% max. or ±1 pF max., whichever is greater Q: ≥ 30 pF Q ≥ 350 10 pF ≤ C < 30 pF, Q ≥ 275 + 2.5C < 10 pF, Q ≥ 200 +10C Rins: 10 GΩ min. or 100 ΩF min. whichever is less Humidity load (damp heat) 40 ±2 °C; 90 to 95% RH for 1000 +24/−0 hours UR applied; measurement after 24 ±2 hours at room temperature no visual damage ∆C/C: 7.5% max. or ±0.75 pF max., whichever is greater Q: ≥ 30 pF, Q ≥ 200 C < 30 pF, Q ≥ 100 + 10/3C Rins: 500 MΩ min. or 25 ΩF min. whichever is less Adhesive strength of termination pressurizing force 1 kg (10 N) for 10 ±1 s no visible damage Vibration resistance frequency: 10 to 55 to 10 Hz/min.; total amplitude: 1.5 mm test time: 6 hours (2 hours each in 3 mutually perpendicular directions) no visible damage or removal of the terminations High temperature load (endurance) 125 ±3 °C; 200% of rated voltage for 1000 +24/−0 hours; measurement after 24 ±2 hours at room temperature no visual damage ∆C/C: ±2% max. or 1 pF max., whichever is greater Q: ≥ 30 pF, Q ≥ 350 10 pF ≤ C < 30 pF, Q ≥ 275 + 2.5C C < 10 pF, Q ≥ 200 + 10C Rins: 1 GΩ min. or 50 ΩF min. whichever is less 2001 Jun 13 19