RT9203/A Preliminary Dual Regulators - Synchronous Buck PWM DC-DC and Linear Controller General Description The RT9203/A is a dual-output power controllers designed for high performance graphics cards and personal computers. The IC integrates a synchronous buck controller, a linear controller and protection functions into a small 8-pin package. The RT9203/A uses an internal compensated voltage mode PWM control for simplying design. An internal 0.8V reference allows the output voltage to be precisely regulated to meet low output voltage requirement. A fixed 300kHz oscillation frequency reduces the component size for saving board area. The RT9203/A also features over voltage protection (OVP) and under voltage lock-out (UVLO). Applications PC Motherboard Cable Modems, Set-Top-Box, and DSL Modems DSP and Core Communications Processor Supplies Memory Power Supplies Personal Computer Peripherals Industrial Power Supplies 5V Input DC-DC Regulators Low Voltage Distributed Power Supplies Graphic Cards Features Operates at 5V 0.8V Internal Reference Drives Two N-channel MOSFET Voltage Mode PWM Control Fast Transient Response Fixed 300kHz Oscillator Frequency Dynamic 0~100% Duty Cycle Internal PWM Loop Compensation Internal Soft-Start Adaptive Non-overlapping Gate Driver Over-voltage Protection Uses Lower MOSFET Pin Configurations Part Number Pin Configurations RT9203/ACS (Plastic SOP-8) TOP VIEW BOOT 1 8 FB UGATE 2 7 FBL GND 3 6 DRV 5 VCC LGATE 4 Ordering Information RT9203/A Package Type S : SOP-8 Operating Temperature Range C : Commercial Standard UVP : Hiccup Mode UVP : Latch Mode DS9203/A-04 May 2003 www.richtek.com 1 www.richtek.com 2 C6 1µF 3.4V VOUT2 = 0.8*(1+R1/R2) VOUT2 Q1 2SD180 2 + 5V CE5 470 µF C4 10n F R1 390 DRV LGATE UGATE BOOT VCC 5 1 4 2 C1 1µF GND 3 R4 < 1K 8 RT9203/A FB 7 FBL 6 R2 < 1K R2 120 0.8V 100 µF + CE1 5V R4 200 C3 0.1µF D1 1N5819 R3 200 G2 5 6 7 8 pha se C2 1µF + L2 5µH CE2 680 µF Be Careful during La you t L1 1µH VOUT1 = 0.8V*(1+R3/R4) D2 D2 D1 G1 S2 D1 S1 C7 10n F 4 3 2 1 PHKD6N02LT pha se 5V C5 1µF CE3 680 µF LE SR + CE4 680 µF LE SR Pull FB tra ce out after C OUT + VOUT1 1.6V RT9203/A Preliminary Typical Application Circuit Fig. 1 RT9203/A powered from 5V DS9203/A-04 May 2003 DS9203/A-04 May 2003 + C4 CE5 10nF 330uF 255 7 3 FB LGATE UGATE 1 BOOT RT9203/A GND FBL R2 120 R2 <1K R1 0.8V PHASE 5 VCC R6 10 8 4 2 R4 200 C2 0.1uF S1 2 G1 3 S2 4 G2 1 Phase R3 VOUT1 = 0. 8V*(1+R3/R4) Phase CE2 470uF + C7 10nF 200 D2 5 8 D1 7 D2 6 D1 Be Careful during Layout CE3 470uF L2 5uH C3 1uF L1 1uH C5 1uF 5V CE5 VOU T1 1.6V Pull FB trace out after COUT 510uF 4V OSCON 14mOhm CE4 + C6 1uF + Suggest use Transist or 6 C1 CE1 1uF 1 00uF R5 2.2 12V + VOUT2 = 0. 8V*(1+R1/R2) VOU T2 2.5V Q1 2SD5706 3.3V 5V Preliminary RT9203/A + Fig. 2 RT9203/A powered from 12V www.richtek.com 3 RT9203/A Preliminary MU D +C OUT 1000µF C VCC 1 µF L 5µH G S C1 1 µF GND CBOOT ML BOOT VCC D 0.1µF RT9203/A + C2 470 µF G S GND Return Layout Placement Layout Notes 1. Put C1 & C2 to be near the MU drain and ML source nodes. 2. Put RT9203/A to be near the COUT 3. Put CBOOT as close as to BOOT pin 4. Put CVCC as close as to VCC pin Function Block Diagram 6.0V VCC V CC Pow er on Reset ++ DRV BOOT Regulator LDO _ Soft Start FBL 0.8V Reference _ + UVP _ 1V UGATE + OVP _ Control Logic + 0.8V Error Amp UVP + 0.5 V SS ++ PWM VCC _ _ FB LGATE GND www.richtek.com 4 300kHz Oscillator DS9203/A-04 May 2003 RT9203/A Preliminary Absolute Maximum Ratings Supply Voltage VCC BOOT & UGATE to GND Input, Output or I/O Voltage Power Dissipation, PD @ TA = 25°C SOP-8 Package Thermal Resistance SOP-8, θJA Ambient Temperature Range Junction Temperature Range Storage Temperature Range Lead Temperature (Soldering, 10 sec.) 7V 19V GND−0.3V ~ 7V 0.625W 160°C/W 0°C ~ +70°C -40°C ~ +125°C -65°C ~ +150°C 260°C CAUTION: Stresses beyond the ratings specified in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Characteristics (VCC = 5V, TA = 25°C, Unless otherwise specified.) Parameter VCC Supply Current Symbol Test Conditions Nominal Supply Current ICC UGATE, LGATE open VCC Regulated Voltage Power-On Reset ICC VBOOT = 12V Rising VCC Threshold VCC Threshold Hysteresis Reference Reference Voltage Oscillator VFB Both PWM and linear regulator Free Running Frequency Ramp Amplitude PWM Error Amplifier ∆ VOSC DC gain PWM Controller Gate Driver Min Typ Max Units -- 3 -- mA 5.0 6.0 7.0 V 3.8 4.1 4.4 V -- 0.5 -- V 0.784 0.8 0.816 V 250 300 350 KHz -- 1.75 -- VP-P 32 35 38 dB Upper Drive Source RUGATE BOOT= 12V BOOT-VUGATE = 1V -- 7.5 11 Ω Upper Drive Sink RUGATE VUGATE = 1V -- 5 8 Ω Lower Drive Source RLGATE VCC - VLGATE = 1V -- 3.5 6 Ω Lower Drive Sink Linear Regulator RLGATE VLGATE = 1V -- 2 5 Ω DRV Driver Source Protection VDRV = 2V 100 -- -- mA FB Over-Voltage Trip FB Rising 0.9 1 -- V FB & FBL Under-Voltage Trip FB & FBL Falling -- 0.5 0.65 V -- 2.5 -- mS Soft-Start Interval DS9203/A-04 May 2003 www.richtek.com 5 RT9203/A Preliminary Functional Pin Description BOOT (Pin 1) This pin provides ground referenced bias voltage to the upper MOSFET driver. A bootstrap circuit is used to create a voltage that is suitable for driving a logic-level N-channel MOSFET when operating at a single 5V power supply. This pin also could be powered from ATX 12V, in this situation, an internal 6.0V regulator will supply to VCC pin for generating bias required inside the IC. FB (Pin 8) This pin is connected to the PWM converter’s output –divider for regulating and monitoring the output voltage of buck converter. This pin also connects to the protection monitor and the inverting input of internal PWM error amplifier inside the IC. UGATE (Pin 2) Connect the UGATE pin to the gate of upper MOSFET. This pin provides the gate drive for the upper MOSFET. GND (Pin 3) Signal and power ground for the IC. All voltage levels are measured with respect to this pin. LGATE (Pin 4) Connect the LGATE pin to the gate of lower MOSFET. This pin provides the gate drive for the lower MOSFET. VCC (Pin 5) This is the main bias supply for the RT9203/A. This pin also provides the gate bias charge for the gate of lower MOSFET. The voltage at this pin is monitored for ensuring a proper power-on reset (POR). This pin is also the out of an internal 6.0V regulator that powered from the BOOT pin when the BOOT pin is directly powered from ATX 12V. DRV (Pin 6) This pin is the output of a linear controller. It should be connected to the base of an external bypass NPN transistor or the gate of a N-MOSFET to form a linear low dropout regulator. FBL (Pin 7) This pin is connected to the output resistor-divider of an external power transistor or a N-MOSFETbased low dropout regulator for regulating and monitoring the output voltage. This pin is also connected to the protection monitor and the invertering input of error amplifier of internal linear regulator inside the IC. www.richtek.com 6 DS9203/A-04 May 2003 RT9203/A Preliminary Typical Operating Characteristics Dead Time Dead Time VCC = 5V VCC = 5V UGATE UGATE LGATE LGATE Time Time Power On Power Off VCC = 5V VOUT1 = 2.5V VOUT2 = 1.8V VCC VCC = 5V VOUT1 = 2.5V VOUT2 = 1.8V VCC VOUT1 VOUT1 VOUT2 VOUT2 Time Time Load Transient Load Transient UGATE UGATE VCC = 5V VOUT = 2.2V COUT = 3000µF VOUT VCC = 5V VOUT = 2.2V COUT = 3000µF Time DS9203/A-04 May 2003 VOUT Time www.richtek.com 7 RT9203/A Preliminary Short Hiccup Short Hiccup (Latch Mode) VCC = 5V VOUT = 2.2V VCC = 5V VOUT = 2.2V VOUT VOUT UGATE UGATE RT9203 RT9203A Time (2ms/Div) Time (2ms/Div) Reference vs. Temperature Bootstrap Wave Form 0.803 VCC = 5V; VOUT = 2.2V 0.802 Reference (V) 0.801 UGATE LGATE PHASE 0.800 0.799 0.798 0.797 0.796 -50 Time IOCSET vs. Temperature 4.3 100 150 POR (Rising/Falling) vs. Temperature 4.2 50 Rising 4.1 POR (V) 45 IOCSET ( µ A) 50 Temperature ( °C) 55 40 35 4.0 3.9 3.8 30 Falling 3.7 25 3.6 20 -40 -10 20 50 80 Temperature (° C) www.richtek.com 8 0 110 140 -50 0 50 100 Temperature (° C) 150 DS9203/A-04 May 2003 Preliminary RT9203/A Oscillator Frequency vs. Temperature 315 310 Frequency (kHz) 305 300 295 290 285 280 275 270 -50 0 50 100 150 Temperature (° C) DS9203/A-04 May 2003 www.richtek.com 9 RT9203/A Preliminary Functional Description The Bootstrap Operation In a single power supply system, the UGATE driver of RT9203/A is powered by an external bootstrap circuit, as shown in the Fig.3. The boot capacitor, CBOOT, generates a floating reference at the PHASE pin. Typically a 0.1µF CBOOT is enough for most of MOSFETs used with the RT9203/A. The voltage drop between BOOT and PHASE is refreshed to a voltage of VCC – diode drop (VD) while the lower MOSFET turning on. R1 C2 VCC 1µF BOOT UGATE D1 0.1µF 5V + PHASE VCC LGATE RT9203/A Fig.3 Single 5V power Supply Operation Dual Power Operation The RT9203/A was designed to supply a regulated 6.0V at VCC pin automatically when BOOT pin is powered by a 12V. In a system with ATX 5V/12V power supply, the RT9203/A is ideal for higher current applications due to the higher gate driving capability, VUGATE = 12V and VLGATE = 6.0V. A RC (10Ω/1µF) filter is also recommended at BOOT pin to prevent the ringing induced from fast power-on, as shown in Fig.4. www.richtek.com 10 R BOOT 6.0V Regulation VCC C 1uF 10 12V 5V + The RT9203/A operates at either single 5V power supply with a bootstrap UGATE driver or a 5V/12V dual-power supply form the ATX SMPS. The dualpower supply is recommended for high current applications, the RT9203/A can deliver higher gate driving current while operating with ATX SMPS based on a dual-power supply. UGATE VCC LGATE C2 1uF RT9203/A Fig.4 Dual Power Supply Operation Power On Reset The Power-On Reset (POR) monitors the supply voltage (normal +5V) at the VCC pin and the input voltage at the OCSET pin. The VCC POR level is set to 4.1V with 0.5V hysteresis and the normal level at OCSET pin is set to 1.5V (see over-current protection). The POR function initiates soft-start operation after all supply voltages exceed their POR thresholds. Soft Start A built-in soft-start is used to prevent surge current from power supply input during powering on. The soft-start voltage is controlled by an internal digital counter. It slows down and clamps the ramping of reference voltage at the input of error amplifier and the pulse-width of the output driver. The typical soft-start duration is 2.5mS. Under Voltage and Over Voltage Protection The voltage presents at FB pin is monitored and protected against OC (over current), UV (under voltage), and OV (over voltage). The UV threshold is 0.5V and OV threshold is 1.0V. Both UV and OV detection are with 30µS delay after triggered. When OC or UV trigged, a hiccup re-start sequence will be initialized, as shown in Fig.5 For RT9203, Only 3 times of trigger are allowed before latching off. But for RT9203A, UVP will be kept in hiccup mode. Hiccup is disabled during soft-start interval. DS9203/A-04 May 2003 RT9203/A Preliminary INDUCTOR CURRENT Internal SS COUNT = 1 COUNT = 2 COUNT = 3 L Q 4V VL 2V D VI 0V C R VO OVERLOAD APPLIED C.C.M. TS 0A T0T1 T3 T2 TIME TON TOFF Fig. 5 VI - VO VL Applications Information - VO Inductor Selection The RT9203/A was designed for VIN = 5V, step-down application mainly. Fig.6 shows the typical topology and waveforms of step-down converter. iL µQ IL = IO µIL The ripple current of inductor can be calculated as follows: iQ ILRIPPLE = (5V - VOUT)/L × TON Because operation frequency is fixed at 300kHz, IQ TON = 3.33 × VOUT/5V The VOUT ripple is iD VOUT RIPPLE = ILRIPPLE × ESR ID ESR is the equivalent series resistor of output capacitor Table 1 shows the ripple voltage of VOUT at VIN = 5V Fig. 6 Table 1 VOUT Inductor 3.3V 2.5V 1.5V 2µH 5µH 2µH 5µH 2µH 5µH 1000µF (ESR=53mΩ) 100mV 40mV 110mV 44mV 93mV 37mV 1500µF (ESR=33mΩ) 62mV 25mV 68mV 28mV 58mV 23mV 3000µF (ESR=21mΩ) 40mV 16mV 43mV 18mV 37mV 15mV *Refer to Sanyo low ESR series (CE, DX, PX…) The suggested L and C are as follows: 2µH with ≥ 1500µF COUT 5µH with ≥ 1000µF COUT DS9203/A-04 May 2003 www.richtek.com 11 RT9203/A Preliminary Input / Output Capacitor High frequency/long life decoupling capacitors should be placed as close to the power pins of the load as physically possible. Be careful not to add inductance to the PCB trace, as it could eliminate the performance from utilizing these low inductance components. Consult with the manufacturer of the load on specific decoupling requirements. The output capacitors are necessary for filtering output and stabilizing the close loop (see the PWM loop stability). For powering advanced high-speed processors, it is required to meet fast load transient requirement. Also high ESR usually induces ripple that may trigger UV or OV protections. So High frequency capacitors with low ESR/ESL capacitors are recommended here. Linear Regulator Driver The linear controller of RT9203/A was designed to drive an external bipolar NPN transistor or a MOSFET. For a MOSFET, normally DRV need to provide minimum VOUT2+VT+gate-drive voltage to keep VOUT2 as the set voltage. When driving MOSFET operating at a 5V power supply, the gate-drive will be limited at 5V. At this situation, as shown in Fig.7, a MOSFET with low VT threshold (VT = 1V) and set Vout2 below 2.5V are suggested. In VBOOT = 12V operation condition, as Fig.8 shown, VCC is regulated higher than 6V, which providing higher gate-drive capability for driving the MOSFET, VOUT2 can be set as VOUT2≤ 3.3V. Max. 5V Suggest Low V T MOSFET V OUT2 ≤ 2.5V Max. 6V Suggest Low V T MOSFET V OUT2 ≤ 3.3V V BOOT = 12V 6V DRV + R3 BOOT FBL VCC R4 RT9203/A R4 < 1K Fig. 8 PWM Loop Stability The RT9203/A is a voltage mode buck controller designed for 5V step-down applications. The gain of error amplifier is fixed at 35dB for simplifying design. The output amplitude of ramp oscillator is 1.6V, the loop gain and loop pole/zero are calculated as follows: DC loop gain GA = 35dB × LC filter pole PO = 1 5 0.8 × 1.75 VOUT 2π LC Error Amp pole PA = 300kHz 1 2π ESR × C ESR zero ZO = The RT9203/A Bode plot is as shown in Fig.9. It is stable in most of application conditions. VOUT = 3.3V COUT = 1500µF(33mΩ) L=2µH 40 30 VOUT = 1.5V PO = 2.9kHz VOUT = 2.5V ZO = 3.2kHz VOUT = 3.3V DRV + R3 BOOT 20 FBL VCC = 5V VCC RT9203/A R4 R4 < 1K Loop Gain 10 100 Fig. 7 www.richtek.com 12 1k 10k 100k 1M Fig.9 DS9203/A-04 May 2003 RT9203/A Preliminary Reference Voltage Because RT9203/A uses a low 35dB gain error amplifier, as shown in Fig.10. The voltage regulation is dependent on VIN and VOUT settings. The FB reference voltage of 0.8V were trimmed at VIN = 5V and VOUT = 2.5V. In a fixed VIN = 5V application, the FB reference voltage vs. VOUT voltage can be calculated as Fig.11. VIN L + COUT V OUT C1 R1 RT9203/A FB I3 VOUT = VFB × (1+ 56K _ EA + I2 _ 1K _ REP 0.8V RAMP 1.75V Fig. 10 0.82 VIN = 5V FB (V) 0.81 0.80 0.79 0.78 10 Duty − 50 VFB = 0.8 − × 6.25mV 100 20 30 40 50 60 70 80 R2 < 1K Fig. 12 PWM + + FB R1 ) R2 90 Duty (%) Fig. 11 Feedback Divider The reference of RT9203/A is 0.8V. The output voltage can be set using a resistor-divider as shown in Fig.12. Put the R1 and R2 as close as possible to FB pin. R2 value should be less than 1 kΩ to avoid noise coupling issue. The C1 capacitor is a speed-up capacitor for reducing output ripple to meet with the requirement of fast transient load. Typically a 1nF ~ 0.1µF is enough for C1. PWM Layout Considerations MOSFETs switch very fast in efficiency. The speed with which the current transitions from one device to another causes voltage spikes across the interconnecting impedances and parasitic circuit elements. The voltage spikes can degrade efficiency and radiate noise, that results in over-voltage stress on devices. Careful the layout for component placement and printed circuit design can minimize the voltage spikes induced in the converter. Consider, as an example, the turn-off transition of the upper MOSFET prior to turn-off, the upper MOSFET was carrying the full load current. During turn-off, current stops flowing in the upper MOSFET and is picked up by the lower MOSFET or Schottky diode. Any inductance in the switched current path generates a large voltage spike during the switching interval. Care with component selections, layout of the critical components, and use shorter and wider PCB traces that help in minimizing the magnitude of voltage spikes. There are two sets of critical components in a DC-DC converter using the RT9203/A. The switching power components are most critical because they switch large amounts of energy, and as such, they tend to generate equally large amounts of noise. The critical small signal components are those connected to sensitive nodes or those supplying critical bypass current. The power components and the PWM controller should be placed firstly. Place the input capacitors, especially the high-frequency ceramic decoupling capacitors, close to the power switches. Place the DS9203/A-04 May 2003 www.richtek.com 13 RT9203/A Preliminary output inductor and output capacitors between the MOSFETs and the load. Also locate the PWM controller near by MOSFETs. A multi-layer printed circuit board is recommended. Fig.13 shows the connections of the critical components in the converter. Note that the capacitors CIN and COUT represent numerous physical capacitors. Use a dedicated grounding plane and use vias to ground all critical components to this layer. Apply another solid layer as a power plane and cut this plane into smaller islands of common voltage levels. The power plane should support the input power and output power nodes. Use copper filled polygons on the top and bottom circuit layers for the PHASE node, but it is not necessary to oversize this particular island. Since the PHASE node is subjected to very high dV/dt voltages, the stray capacitance formed between these islands and the surrounding circuitry will tend to couple switching noise. Use the remaining printed circuit layers for small signal routing. The PCB traces between the PWM controller and the gate of MOSFET and also the traces connecting source of MOSFETs should be sized to carry 2A peak currents. IL IQ1 V OUT 5V + Q1 IQ2 + + LOAD Q2 GND GND LGATE VCC RT9203/A UGATE FB Fig. 13 www.richtek.com 14 DS9203/A-04 May 2003 RT9203/A Preliminary Package Information H A M J B F C I D Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.178 0.254 0.007 0.010 I 0.102 0.254 0.004 0.010 J 5.791 6.198 0.228 0.244 M 0.406 1.270 0.016 0.050 8–Lead SOP Plastic Package DS9203/A-04 May 2003 www.richtek.com 15 RT9203/A Preliminary RICHTEK TECHNOLOGY CORP. RICHTEK TECHNOLOGY CORP. Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 8F-1, No. 137, Lane 235, Paochiao Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)89191466 Fax: (8862)89191465 Email: [email protected] www.richtek.com 16 DS9203/A-04 May 2003