RT8110 Compact Synchronous Buck DC/DC PWM Controller General Description Features The RT8110 is a compact fixed-frequency PWM controller with integrated MOSFET drivers for single-phase synchronous buck converter. This part features wide input voltage range operation and tiny package. An internal preregulator drives an external BJT to provide regulated output voltage from the input voltage to support VCC. Therefore, the controller can operate with wide input voltage range. The RT8110 utilizes voltage-mode control with internal compensation to simplify the converter design. An internal 0.8V reference voltage allows low output voltage application. The switching frequency is fixed at 400kHz to reduce the external passive component size to save board space. Low-side MOSFET RDS(ON) is used for z 8V to 23V Wide Range Operation z 0.8V Internal Reference Internal Soft Start High DC Gain Voltage Mode PWM Control Fixed 400kHz Switching Frequency Fast Transient Response Fully Dynamic 0 to 80% Duty Cycle Over Current Protection Under Voltage Protection Over Temperature Protection Tiny Package TSOT-23-8 RoHS Compliant and 100% Lead (Pb)-Free z z z z z z z z z Applications z z z z RT8110 `Suitable for use in SnPb or Pb-free soldering processes. Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area. (TOP VIEW) LGATE ments of IPC/JEDEC J-STD-020. Pin Configurations 8 7 6 5 2 3 4 VCC `RoHS compliant and compatible with the current require- z GND Richtek products are : z FB Note : z UGATE Lead Plating System P : Pb Free G : Green (Halogen Free and Pb Free) z DRIVE Package Type J8 : TSOT-23-8 PHASE Ordering Information Set-top Box Power Supplies PC Subsystem Power Supplies Cable Modems, DSL Modems DSP and Core Communication Processor Power Supplies Memory Power Supplies Personal Computer Peripherals Industrial Power Supplies Low Voltage Distributed Power Supplies BOOT inductor current sensing. The RT8110 provides under voltage protection, current limit, over current protection and over temperature protection. z TSOT-23-8 DS8110-02 April 2011 www.richtek.com 1 RT8110 Typical Application Circuit VIN 8V to 23V DBOOT CIN R RT8110 2 4 VCC CVCC PHASE Q2 3 Shutdown CBOOT BOOT 1 UGATE 7 DRIVE MU L1 8 LGATE 5 6 GND FB COUT ML R1 R2 C3 R3 Figure 1. Single Input Power Rail Application VIN 5V to 23V DBOOT CIN RT8110 2 DRIVE RX 5V 4 VCC PHASE 3 LGATE 5 6 GND CVCC Q1 BOOT 1 UGATE 7 FB CBOOT MU L1 8 ML COUT Shutdown R1 R2 C3 R3 Figure 2. Split Input Power Rail Application www.richtek.com 2 DS8110-02 April 2011 RT8110 Functional Pin Description Pin No. 1 Pin Name BOOT Pin Function This pin provides power to the high side MOSFET gate driver. Use bootstrap circuit to drive the high-side MOSFET. 2 DRIVE 3 FB 4 VCC 5 LGATE Pre-regulator Control Pin. Connect this pin to the base of external BJT, and connect the collector to VIN to obtain a regulated output voltage to support VCC. If VCC is directly supplied, the BJT is not required, and this pin should be pulled high to VCC through a resistor. DRIVE pin can also be used for enable control. Pull low this pin to GND can shutdown the controller. Inverting Input of the Error Amplifier. This pin is connected to the joint of output voltage divider resistors to set the output voltage. The voltage at this pin is also monitored for under voltage protection. Main Bias Supply of the IC. VCC can be directly supplied or by VIN through external BJT driven by DRIVE pin. This pin also provides power for the low side MOSFET gate driver. Connect ceramic capacitor to this pin. The voltage at this pin is monitored for power on reset (POR). Gate Drive Pin for Low-Side MOSFET. 6 GND Signal and Power Ground of the IC. All voltage levels are referenced with respect to this pin. 7 UGATE Gate Drive Pin for High-Side MOSFET. 8 PHASE Switching Node of the Buck Converter. This pin is also used to monitor the voltage drop across the low-side MOSFET for over current protection. Function Block Diagram DRIVE VCC VCC VCC Pre-Regulator PowerOn Reset POR 0.8VREF ROC OC PHASE + 0.5V - UVP + Soft-Start and Fault Logic SS S1L FB IOC + +Gm - EO + - PWM Gate Control Logic + PH_M 1.5V VCC UGATE BOOT LGATE GND Oscillator DS8110-02 April 2011 www.richtek.com 3 RT8110 Absolute Maximum Ratings (Note 1) Supply Voltage, VCC ---------------------------------------------------------------------------------------------- 7V PHASE -------------------------------------------------------------------------------------------------------------- −3V to 24V z BOOT ---------------------------------------------------------------------------------------------------------------- 30V z Input/Output Voltage ---------------------------------------------------------------------------------------------- 0.3V to 7V z Power Dissipation, PD @ TA = 25°C TSOT-23-8 ----------------------------------------------------------------------------------------------------------- 0.426W z Package Thermal Resistance (Note 2) TSOT-23-8, θJA ----------------------------------------------------------------------------------------------------- 235°C/W z Junction Temperature --------------------------------------------------------------------------------------------- 150°C z Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------- 260°C z Storage Temperature Range ------------------------------------------------------------------------------------ −65°C to 150°C z ESD Susceptibility (Note 3) HBM (Human Body Mode) -------------------------------------------------------------------------------------- 2kV MM (Machine Mode) ---------------------------------------------------------------------------------------------- 200V z z Recommended Operating Conditions z z z (Note 4) Supply Voltage, VCC ---------------------------------------------------------------------------------------------- 5.3V Junction Temperature Range ------------------------------------------------------------------------------------ −40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------------------------ −40°C to 85°C Electrical Characteristics (VIN = 5V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit -- 3 6 mA 5.1 5.3 5.5 V 3.6 3.9 4.2 V 0.3 0.5 0.7 V 0.784 0.8 0.816 V 320 400 480 kHz -- 2.2 -- V VCC Supply Current Nominal Supply Current ICC Regulated Output Voltage VCC UGATE, LGATE open Power-On Reset VCC Threshold Voltage Rising VCC Threshold Hysteresis Reference Reference Voltage VREF Oscillator Free Running Frequency fSW Ramp Amplitude Δ VOSC Error Amplifier E/A Transconductance Open Loop DC Gain Gm AO Note 5 Note 5 -60 0.3 90 --- ms dB RUSOURCE VBOOT − PHASE = 5V VBOOT − VUGATE = 1V -- 3 4.5 Ω PWM Controller Gate Driver Upper Drive Source To be continued www.richtek.com 4 DS8110-02 April 2011 RT8110 Parameter Symbol Test Conditions VUGATE −PHASE = 1V VBOOT − PHASE = 5V Upper Drive Sink RUSINK Lower Drive Source Lower Drive Sink RLSOURCE VCC − VLGATE = 1V RLSINK VLGATE = 1V IUSOURCE VBOOT −VUGATE = 5V IUSINK VUGATE −PHASE = 5V Upper Drive Source Upper Drive Sink Min Typ Max Unit -- 2 3 Ω --- 4 2 6 4 Ω Ω --- 0.72 0.82 --- A A Lower Drive Source IUSOURCE VVCC −VLGATE = 5V -- 0.65 -- A Lower Drive Sink IUSINK VLGATE −GND = 5V -- 1.18 -- A VOC Sense Phase Pin Voltage −230 -- −200 80 −170 -- mV % -- 0.5 0.6 V 1 3 6 ms Protection Over Current Threshold Maximum Duty Cycle UVP Threshold Soft Start Soft-Start Interval FB Falling TSS Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Guarantee by design. DS8110-02 April 2011 www.richtek.com 5 RT8110 Typical Operating Characteristics Power Off Power On VIN = 12V VIN = 12V VIN (10V/Div) VIN (10V/Div) V CC (5V/Div) V CC (5V/Div) VOUT (2V/Div) VOUT (2V/Div) UGATE (20V/Div) single rail, VOUT = 2.5V, ILOAD = 5A UGATE (20V/Div) single rail, VOUT = 2.5V, ILOAD = 5A Time (20ms/Div) Time (2ms/Div) Under Voltage Protection Controller and Power Stage Power Sequence VIN = 12V, VOUT = 2.5V, ILOAD = 1A single rail, pull low FB to trip UVP dual rail, VIN = 12V, VOUT = 2.5V, ILOAD = 5A VIN (10V/Div) FB (500mV/Div) V CC (5V/Div) VOUT (2V/Div) UGATE (20V/Div) UGATE (20V/Div) LGATE (10V/Div) power stage VIN comes controller VIN Time (2ms/Div) Time (10ms/Div) Over Current Protection Short Circuit Over Current Protection single rail VIN = 12V, short circuit output terminal during operation, Low-side MOSFET RDS(ON) = 9mΩ single rail VIN = 12V, short circuit output terminal then power up, Low-side MOSFET RDS(ON) = 9mΩ VOUT (5V/Div) UGATE (20V/Div) V CC (5V/Div) Inductor Current (20A/Div) UGATE (20V/Div) LGATE (5V/Div) LGATE (5V/Div) Inductor Current (20A/Div) Time (4ms/Div) www.richtek.com 6 Time (4ms/Div) DS8110-02 April 2011 RT8110 Switching Frequency vs. Temperature Reference Voltage vs. Temperature 0.816 480 single rail VIN = 12V, No Load Switching Frequency (kHz) Reference Voltage (V) 0.812 0.808 0.804 0.800 0.796 0.792 0.788 single rail VIN = 12V, No Load 460 440 420 400 380 360 340 320 0.784 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Temperature (°C) Temperature (°C) VCC vs. Temperature 5.50 single rail VIN = 12V, No Load 5.45 VCC (V) 5.40 5.35 5.30 5.25 5.20 5.15 5.10 -50 -25 0 25 50 75 100 125 Temperature (°C) DS8110-02 April 2011 www.richtek.com 7 RT8110 Applications Information The RT8110 is a compact voltage-mode PWM controller with integrated MOSFET gate drivers for single-phase synchronous buck converter. It features tiny package and an internal regulator driver, which drives an external BJT to provide regulated output voltage to support VCC from converter input voltage. Therefore, RT8110 can operate in wide input range. VCC can also be directly supplied from 5V without using the external BJT. This part provides internal soft start, internal loop compensation and protection functions. Figure 4 illustrates the configuration of supplying VCC from VHV (VHV can be VIN) through a regulator in single power rail application. BJT Q1, R1, C1 and the internal regulator drive circuit comprises the regulator to supply VCC from VHV. Q2 is used for enable control. The design Internal Regulator Driver and VCC 0.5mA < Iy < 5mA There are two approaches to supply controller power VCC. For split power rail application, VCC can be directly supplied from 5V. For single power rail application, VCC can be supplied through a regulator from VIN. RT8110 provides an internal regulator driver that drives an external BJT to provide regulated voltage to supply VCC from VIN. Figure 3 shows the configuration of split power rail application. The VCC pin is connected to 5V with a bypass capacitor, and the DRIVE pin is pulled high through resistor for enable control. When Q1 is off, the DRIVE pin is pulled high to VCC through resistor Rx. The recommended value of RX is 2kΩ. When Q1 is on, the voltage at DRIVE pin goes below the shutdown threshold and the controller shuts down. If enable control function is not required, DRIVE pin still need to be pulled high to VCC through RX. Shutdown Comparator + - 5V V − VCC − Vbe Ix = HV R Ie Ib = (2) (3) β (4) Combine (1) to (4), R can be determined as follows. VHV − VCC − Vbe V − VCC − Vbe < R < HV Ie I 5mA + 0.5mA + e β (5) β where Vbe is the base to emitter voltage of Q1 β is the current gain (hFE) of Q1 Ie is the emitter current of Q1 Iy is the sink current of DRIVE pin Design example : VHV = 12V, VCC = 5.3V, Ie(MAX) = 30mA, Q1 = 2N3904, Vbe = 0.7V, β = 100 When VHV = 8V 1.13kΩ < R < 7.5kΩ ~ 1.5V - (1) (12V − 5.3V − 0.7V) (12V − 5.3V − 0.7V) <R< 5.3mA 0.8mA (6) Select R = 5.6k RX ~ 1.25V equations are shown as follows. Iy = Ix − Ib DRIVE + VCC Q1 Shutdown 90k Internal Sub-Circuit 30k V HV 8V to 23V Shutdown Comparator + - ~ 1.5V Ix ~ 1.25V - R DRIVE + VCC Iy Q1 Ib Ie Figure 3. Directly supply VCC from 5V 90k Internal Sub-Circuit Q2 Shutdown 30k Figure 4. Supply VCC from VHV Through Regulator www.richtek.com 8 DS8110-02 April 2011 RT8110 Power-Up and Soft Start The power-on-reset (POR) function continuously monitors the voltage at the VCC pin. When VCC rises and exceeds the POR threshold, the controller initiates its power-up sequence with continuous low-frequency, small-width pulses at UGATE (~6kHz). These pulses are used for converter power stage input voltage (VIN) detection. If VIN is applied, the voltage at PHASE pin will rise and fall due to these detection pulses. A digital counter and a comparator are used to record the number of times that voltage at PHASE pin exceeds the internally-defined voltage level (~1.5V). If the voltage at PHASE pin exceeds and below the internally-defined voltage level for two times, detection pulse stops and VIN is recognized to be ready. Once VIN is ready, soft-start will then initiate after a time delay. Otherwise the detection pulse at UGATE continues. RT8110 provides soft start function internally. Figure 5 shows the PWM comparator and the operational transconductance amplifier (OTA). The OTA has three inputs: reference voltage VREF, feedback voltage signal FB, and soft start signal SS. During the soft start interval, the feedback voltage signal tracks the SS signal. Because SS signal rises from zero in monotone, therefore the PWM duty cycle will increase gradually at start up to prevent large inrush current. When FB voltage reaches VREF, soft start ends and FB will track VREF. The typical soft start time interval is 3ms supply voltage. The capacitance is determined using the following equation : CBOOT = QGATE ΔVBOOTSTRAP where QGATE is the total gate charge of the high-side MOSFET, and ΔVBOOTSTRAP is the voltage drop allowed on the high-side MOSFET gate drive. For example, the total gate charge for MOSFET is about 30nC. For an allowed voltage drop of 300mV, the required bootstrap capacitance is 0.1μF. Referring to Figure 6, the bootstrap diode must be able to block the power stage supply voltage plus any peak ringing voltage at the PHASE pin when Q1 is turned on. Therefore, the voltage rating of the bootstrap diode should be at least 1.5 to twice of the power stage supply voltage. Since the RDS(ON) of MOSFET will be higher if the gate-tosource driving voltage is lower, a bootstrap diode with larger forward voltage results in lower gate drive voltage, higher on-resistance and lower efficiency. Therefore, the forward voltage of the bootstrap diode should be low. Fast recovery diode or Schottky diode which has low forward voltage is recommended for the bootstrap diode. D BOOT VCC VCC Regulator R2 UGATE C BOOT Q1 PHASE V OUT R1 V IN BOOT Transconductance Error Amplifier FB +GM + + V REF PWM Comparator + - Compensation Network SS Figure 5. Transconductance Amplifier and PWM Comparator. Bootstrap Circuit Figure 6 shows the bootstrap gate drive circuit supplied from VCC. The bootstrap circuit consists of bootstrap capacitor CBOOT and blocking diode DBOOT. The selection of these two components can be done after choosing the high-side MOSFET. The bootstrap capacitor must have a voltage rating that is able to withstand twice the maximum DS8110-02 April 2011 PWM + Comparator - LGATE Q2 Figure 6. Gate Driver and Bootstrap Circuit Current Limit and Over Current Protection (OCP) RT8110 provides current limit and over current protection. The low-side MOSFET on-resistance is used to sense the inductor current. Once the high-side MOSFET is turned off, the low-side MOSFET is turned on when dead time ends. Inductor current then flows through the lowside MOSFET and build a voltage drop across the drain and source (PHASE to GND). This voltage is sensed to monitor the inductor peak current. As shown in Figure 7, the over current threshold is www.richtek.com 9 RT8110 determined internally by the current source IOC and the internal resistor ROC. The current source IOC flows through resistor ROC and builds voltage VOC (=IOC x ROC) which is referenced to the PHASE pin. When load current increase and the sensed PHASE voltage falls below VOC in one switching cycle, controller will treat this as an over current event. Each over current event will cause one UGATE PWM pulse to be prohibited, but has no influence on LGATE signal, it still keep switching. UGATE PWM pulse is permitted when over current event does not exist. If over current event does not occur in the next switching cycle, UGATE will switching again, or the UGATE pulse will still be prohibited. In this way, inductor peak current will be limited. If the load current further increases, either over current protection or under voltage protection will be tripped. The over current protection will be tripped when the over current event occurs for continuously four PWM pulses. When OCP is triggered, both UGATE and LGATE go low, controller will initiate re-start in hiccup way. For OCP, controller has three times of hiccupped re-start before shutdown. Controller will latch off after three times of hiccup. The OCP threshold is determined by the RDS(ON) of lowside MOSFET. The inductor peak current IPEAK can be calculated using the following equation. VOC IPEAK ≅ RDS(ON) Note that IPEAK is the inductor peak current, therefore IPEAK should be set greater than IOUT(MAX) + (ΔI)/2 to prevent false tripping, where ΔI is the output inductor ripple current, and IOUT(MAX) is the maximum load current. Since MOSFET RDS(ON) increases with temperature, the controller will trip OCP/current limit earlier at high temperature. To avoid false tripping, considering the highest junction temperature of the MOSFET and calculate the OCP threshold to select RDS(ON). V IN V CC Q1 IOC R OC OC Comparator + - L PHASE + IOC x R OC IL x R DS(ON) Q2 + Under Voltage Protection (UVP) After soft start completes, the FB voltage is monitored for UVP. The UVP function has a 10μs time delay and the threshold is typically 0.5V. If FB voltage falls below the threshold, UVP will be tripped, both UGATE and LGATE go low and then the hiccupped re-start will be initialized. The UVP re-start behavior is different from that of OCP; the controller will always initiate re-start in a hiccupped way. Over Temperature Protection (OTP) The RT8110 integrates thermal protection function. The over temperature protection is a latched protection and its threshold is typically 160°C. When OTP is triggered, controller shuts down, both high-side and the low-side MOSFET are turned off. Input Capacitor Selection The input capacitor not only reduces the noise and voltage ripple on the input, but also reduces the peak current drawn from the power source. The input capacitor must meet the RMS current requirement imposed by the switching current defined by the following equation : IRMS = IOUT × VOUT × (VIN − VOUT ) VIN The input RMS current varies with load and input voltage, and has a maximum of half the output current when output voltage is equal to half the input voltage. In addition, ceramic capacitor is recommended for high frequency decoupling because of its low equivalent series resistance and low equivalent inductance. These ceramic capacitors should be placed physically between and close to the drain of high-side MOSFET and the source of the lowside MOSFET. The voltage rating is another key parameter for the input capacitor. In general, choose the voltage rating with 50% higher than the input voltage for the input capacitor to ensure the operation reliability. Output Voltage Setting The converter output voltage can be set by the external voltage divider resistors. Figure 8 shows the connection of the output voltage divider resistors. The controller will Figure 7. Over Current Protection Mechanism www.richtek.com 10 DS8110-02 April 2011 RT8110 regulate the output voltage according to the ratio of the voltage divider resistors R1 and R2. V OUT Transconductance Error Amplifier GM + + R1 Figure 10 illustrates the simplified synchronous buck converter using OTA with internal compensation. The feedback loop consists of Zin (R1, R2 and C1), OTA and the internal compensation network ZFB (RS, CS, CP). The value of internal compensation component is: RS ≈ 50k, CS ≈ 4nF, CP ≈ 10pF. FB Output Inductor R2 V REF L Q1 ESR + Q2 V IN Figure 8. Voltage Divider Resistors DCR Output Capacitor Optional C3 If R1 is given and the output voltage is specified, then R2 can be determined using the following equation : PWM Generator & MOSFET Driver VREF ⎞ R2 = R1× ⎛⎜ ⎟ ⎝ VOUT − VREF ⎠ R LOAD C OUT C P ≈10pF Transconductance Error Amplifier GM + R S ≈50k + V REF C S≈ 4nF R1 R3 R2 Feedback Compensation and Output Capacitor Selection The RT8110 is a voltage-mode PWM controller with fixed switching frequency, it uses operational transconductance amplifier (OTA) with internal compensation network to eliminate external compensation components. The compensation network is used to shape the gain curve to obtain accurate dc regulation, fast load transient response and maintain stability. Figure 9 shows the Bode plot of the modulation gain, compensation gain and the close loop gain. A stable control loop has a close gain curve with a -20dB/decade slope at the crossover frequency and the phase margin is greater than 45°. Figure 10. Simplified Diagram for Synchronous Buck Converter with Internal Compensation Network Referring to Figure 9, the location of pole and zero of the LC filter and the compensation network can be determined using the following equations. The inductor and the output capacitor create a double pole at FLC : 1 FLC = 2π × L × COUT The equivalent series resistance (ESR) of the output capacitor creates a zero at FESR : FESR = Gain (dB) 1 2π × ESR × COUT F LC F ESR FC Compensation Gain Freq.(Log) 0 F Z1 Close Loop Gain The internal compensation network introduces a zero at FZ1 : FZ1 = F P1 F Z2 Modulation Gain F P2 Figure 9. Bode Plot of Loop Gain. DS8110-02 April 2011 1 2π × RS × CS The internal compensation network also introduces a pole at FP2 : FP2 = 1 C × CP ⎞ ⎛ 2π × RS × ⎜ S ⎟ ⎝ CS + CP ⎠ www.richtek.com 11 RT8110 The external R3 and C3 introduces a zero at FZ2 : 1 FZ2 = 2π × (R3 + R2 ) × C3 If the bandwidth and phase margin are not within an acceptable range, add R3 and C3 to slightly adjust the crossover frequency and phase margin. The external R3 and C3 introduces a pole at FP1 : 1 FP1 = 2π × (R3 + R1 // R2 ) × C3 If the crossover frequency and phase margin still can't meet the requirement after tuning R3 and C3, re-select the ESR and COUT (mainly) or inductance value to change the location of FLC and FESR then repeat step 4. Note that the output voltage ripple and transient response should still meet the specification after changing ESR, COUT or L. Since the internal compensation values are given, the close loop crossover frequency and phase margin can be obtained after inductance and capacitance are determined. External R3 and C3 are used to adjust the crossover frequency and phase margin. The typical design procedure is described as follows. Step 1 : Collect system parameters such as switching frequency, input voltage, output voltage, output voltage ripple, and full load current. Step 2 : Determine the output inductance value. The recommended inductor ripple current is between 10% and 30% of the full load output current. The inductance can be calculated using the following equation. VIN − VOUT V × OUT × 1 < L IFULL_LOAD × 0.3 VIN FSW < VIN − VOUT V × OUT × 1 IFULL_LOAD × 0.1 VIN FSW Step 3 : Determine the output capacitance and the ESR. Neglecting the equivalent series inductance of the output capacitor, the output capacitance C OUT can be approximately determined using the following equations. VRIPPLE = VRIPPLE(ESR) + VRIPPLE(C) VRIPPLE(ESR) = IRIPPLE × ESR VRIPPLE(C) = IRIPPLE 8 × COUT × FSW Step 4 : Calculate the crossover frequency, phase margin and check stability. Calculate the frequency of FLC, FESR, FZ1, FZ2, FP1 and FP2 with selected inductance, capacitance and ESR. Then plot the Bode diagram of close loop gain to check crossover frequency and phase margin. In general, the crossover frequency FC is between 1/10 and 1/5 of the switching frequency (40kHz to 80kHz); and the phase margin should be greater than 45°. www.richtek.com 12 Thermal Considerations For continuous operation, do not exceed absolute maximum operation junction temperature. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) − TA ) / θJA Where T J(MAX) is the maximum operation junction temperature, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of RT8110, the maximum junction temperature is 125°C and TA is the maximum ambient temperature. The junction to ambient thermal resistance θJA is layout dependent. For TSOT-23-8 packages, the thermal resistance θJA is 235°C/ W on the standard JEDEC 51-3 single layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : PD(MAX) = (125°C - 25°C) / (235°C/W) = 0.426W for TSOT-23-8 package The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θJA. For RT8110 package, the Figure 3 of derating curve allows the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed. DS8110-02 April 2011 RT8110 Maximum Power Dissipation (W) 0.50 Single Layer PCB 0.45 away from the PHASE node, inductor and MOSFETs due to these switching node or components are noisy. 0.40 0.35 TSOT-23-8 0.30 0.25 0.20 0.15 0.10 0.05 0.00 0 25 50 75 100 125 Ambient Temperature (°C) Figure 3. Derating Curves for RT8110 Package Layout Guidelines PCB layout plays an important role in converter design. PCB with carefully layout can help to decrease switching noise, have stable operation and better performance. The following guidelines can be used in PCB layout. ` Feedback voltage divider resistors, compensation RCs, bootstrap capacitor, bootstrap diode and ceramic capacitors for VIN and VCC should be placed close to the controller as possible. ` Keep the power loops as short as possible. The current transition from one device to another at high speed causes voltage spikes due to the parasitic components on the circuit board. Therefore, all the current switching loops should be kept as short as possible with wide traces to minimize the parasitic components. ` Minimize the trace length between the MOSFET and the controller. Since the drivers are integrated in the controller, the driving path should be short and wide to reduce the parasitic inductance and resistance. ` Place the ceramic capacitor physically close to the drain of the high-side FET and source of low-side FET. This can reduce the input voltage ringing at heavy load. ` Place the output capacitor physically close to the load. This can minimize the impedance seen by the load, and then improves the transient response. ` The voltage feedback trace should be kept away from the switching node. Keep the voltage feedback trace DS8110-02 April 2011 www.richtek.com 13 RT8110 Outline Dimension H D L C B b A A1 e Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 1.000 0.028 0.039 A1 0.000 0.100 0.000 0.004 B 1.397 1.803 0.055 0.071 b 0.220 0.380 0.009 0.015 C 2.591 3.000 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.585 0.715 0.023 0.028 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 TSOT-23-8 Surface Mount Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: [email protected] Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. www.richtek.com 14 DS8110-02 April 2011