RT9204/A Preliminary Dual Regulators - Standard Buck PWM DC-DC and Linear Controller General Description The RT9204/A is a dual power controllers designed for high performance graphics cards and computer applications. The IC integrates a standard buck controller, a linear regulator driver and protection functions into a small 8-pin package. The RT9204/A uses an internal compensated voltage mode PWM control for simple application design. An internal 0.8V reference allows the output voltage to be precisely regulated to low voltage requirement. A fixed 600kHz oscillator reduce the component size for saving board area. The RT9204/A protects the converter and regulator by monitoring the output under voltage. Features Operate from 5V 0.8V Internal Reference Voltage Mode PWM Control Fast Transient Response Fixed 600kHz Oscillator Frequency Full 0~100% Duty Cycle Internal Soft Start Internal PWM Loop Compensation Pin Configurations Part Number Pin Configurations RT9204/ACS (Plastic SOP-8) TOP VIEW Applications Motherboard Power Regulation for Computers Subsystems Power Supplies Cable Modems, Set Top Box, and DSL Modems DSP and Core Communications Processor Supplies Memory Power Supplies Personal Computer Peripherals Industrial Power Supplies 5V-Input DC-DC Regulators Low Voltage Distributed Power Supplies GND 1 8 UGATE VCC 2 7 BOOT DRV 3 6 SD FBL 4 5 FB Ordering Information RT9204/A Package Type S : SOP-8 Operating Temperature Range C : Commercial Standard UVP : Hiccup Mode UVP : Latch Mode DS9204/A-02 May 2003 www.richtek.com 1 RT9204/A Preliminary Typical Application Circuit VAUX 3.3V R1 5V 2.2 Q1 2SD1802 1 2 + R5 100 4 UGATE VCC BOOT DRV SD FBL FB C5 1uF 8 C3 7 0.1uF VOUT1 2.5V R3 6 5 L1 5uH 250 RT9204/A R2 120 C2 1uF MU C1 470uF D1 SS34 + C6 220uF 3 R4 100 GND + VOUT2 1.6V BAT54A C4 1000uF C7 10nF Fig.1 RT9204/A powered from 5V only 5V R1 2.2 VAUX 3.3V R6 C7 1uF C5 1uF Q1 1 Suggest use Transistor 2SD5706 + R5 100 3 4 UGATE VCC BOOT DRV SD FBL FB RT9204/A 7 6 VOUT1 2.5V 5 L1 250 R2 120 MU 5uH R3 + C6 220uF R4 100 GND 5V 8 C4 1000uF C2 1uF + VOUT2 1.6V 2 12V 10 C1 470uF D1 SS34 C7 10nF Fig.2 RT9204/A powered from 12V www.richtek.com 2 DS9204/A-02 May 2003 RT9204/A Preliminary MU +C D OUT 1000µF CVCC 1µF L 5µH G S C1 1µF GND CBO OT BO OT VCC + C2 470µF Diode 0.1µF RT9204/A GND Return Layout Placement Layout Notes 1. Put C1 & C2 to be near the MU drain and ML source nodes. 2. Put RT9204/A to be near the COUT 3. Put CBOOT as close as to BOOT pin 4. Put CVCC as close as to VCC pin Function Block Diagram 6.0V VCC Regulator BOOT ++ Power on Reset DRV LDO _ Soft Start FBL _ UVP + 0.8V Reference 1V _ + OVP _ DS9204/A-02 May 2003 Logic SS UGATE PWM _ Error Amp GND _ 35dB ++ FB Control + 0.8V UVP + 0.5V 600kHz Oscillator www.richtek.com 3 RT9204/A Preliminary Absolute Maximum Ratings Supply Voltage VCC 7V BOOT & UGATE to GND 15V Input, Output or I/O Voltage GND−0.3V ~ 7V Power Dissipation, PD @ TA = 25°C SOP-8 0.625W Package Thermal Resistance SOP-8, θJA 160°C/W Ambient Temperature Range 0°C ~ +70°C Junction Temperature Range -40°C ~ +125°C Storage Temperature Range -65°C ~ +150°C Lead Temperature (Soldering, 10 sec.) 260°C CAUTION: Stresses beyond the ratings specified in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Characteristics (VCC = 5V, TA = 25°C, Unless otherwise specified.) Parameter Symbol Test Conditions Min Typ Max Units VCC Supply Current Nominal Supply Current ICC UGATE, LGATE open -- 3 -- mA VCC Regulated Voltage VCC VBOOT=12V -- 6 -- V 3.75 4.1 4.35 V -- 0.5 -- V 0.784 0.8 0.816 V 550 600 650 KHz -- 1.75 -- VP-P -- 35 -- dB Power-On Reset Rising VCC Threshold VCC Threshold Hysteresis Reference Reference Voltage Both FB & FBL Oscillator Free Running Frequency Ramp Amplitude ∆ VOSC PWM Error Amplifier DC Gain PWM Controller Gate Driver Upper Drive Source RUGATE VBOOT = 12V; VBOOT - VUGATE = 1V -- 7 -- Ω Upper Drive Sink RUGATE VUGATE = 1V -- 5 -- Ω VDRV = 2V 100 -- -- mA FB Over-Voltage Trip FB Rising -- 1 -- V FB & FBL Under-Voltage Trip FB & FBL Falling -- 0.5 -- V -- 1 -- mS Linear Regulator DRV Driver Source Protection Soft-Start Interval SD Pin Threshold VCC = 5V -- 1.5 -- V SD pin Sink Current VCC = 5V -- 40 -- µA www.richtek.com 4 DS9204/A-02 May 2003 RT9204/A Preliminary Typical Operating Characteristics Power On Power Off VCC = 5V VOUT = 2.2V VCC VCC VOUT1 VOUT1 VOUT2 VOUT2 Time VCC = 5V V 2 2V Time Load Transient Load Transient UGATE UGATE VOUT VOUT VCC = 5V VOUT = 2.2V COUT = 3000µF VCC = 5V VOUT = 2.2V COUT = 3000µF Time Time Short Hiccup (Latch Mode) VCC = 5V VOUT = 2.2V Short Hiccup VCC = 5V VOUT = 2.2V VOUT VOUT UGATE UGATE RT9204 Time (5ms/Div) DS9204/A-02 May 2003 RT9204A Time (2ms/Div) www.richtek.com 5 RT9204/A Preliminary 4.3 0.802 4.2 0.801 4.1 POR (V) Reference (V) Reference vs. Temperature 0.803 0.800 0.799 POR (Rising/Falling) vs. Temperature Rising 4.0 3.9 0.798 3.8 0.797 3.7 Falling 3.6 0.796 -50 0 50 100 150 Temperature ( °C) -50 0 50 100 150 Temperature (° C) Oscillator Frequency vs. Temperature 315 630 310 Frequency (kHz) 620 305 300 610 295 600 290 285 590 280 580 275 270 570-50 0 50 100 150 Temperature (° C) www.richtek.com 6 DS9204/A-02 May 2003 Preliminary RT9204/A Functional Pin Description GND (Pin 1) Signal and power ground for the IC. All voltage levels are measured with respect to this pin. VCC (Pin 2) This is the main bias supply for the RT9204/A. This pin also provides the gate bias charge for the lower MOSFETs gate. The voltage at this pin monitored for power-on reset (POR) purpose. This pin is also the internal 6.0V regulator output powered from BOOT pin when BOOT pin is directly powered from ATX 12V. DRV (Pin 3) This pin is linear regulator output driver. Connect to external bypass NPN transistor base or NMOSFET gate terminal. FBL (Pin 4) This pin is connected to the linear regulator output divider. This pin also connects to internal linear regulator error amplifier inverting input and protection monitor. FB (Pin 5) This pin is connected to the PWM converter’s output divider. This pin also connects to internal PWM error amplifier inverting input and protection monitor. SD (Pin 6) Active low design with a 40µA pull low current source. Pull this pin to VCC to shutdown both PWM and linear regulator. BOOT (Pin 7) This pin provides ground referenced bias voltage to the upper MOSFET driver. A bootstrap circuit is used to create a voltage suitable to drive a logic-level Nchannel MOSFET when operating at a single 5V power supply. This pin also could be powered from ATX 12V, in this situation, an internal 6.0V regulator will supply to VCC pin for internal voltage bias. UGATE (Pin 8) Connect UGATE pin to the PWM converter’s upper MOSFET gate. This pin provides the gate drive for the upper MOSFET. DS9204/A-02 May 2003 www.richtek.com 7 RT9204/A Preliminary Functional Description C2 1uF 1µ F BOOT UGATE D1 0.1µF PHASE RT9204/A Fig.3 Single 5V power Supply Operation Dual Power Operation The RT9204/A was designed to regulate a 6.0V at VCC pin automatically when BOOT pin is powered by 12V. In a system with ATX 5V/12V power supply, the RT9204 is ideal for higher current application due to the higher gate driving capability, VUGATE = 7V. A RC (10Ω/1µF) filter is also recommended at BOOT pin to prevent the ringing induced from fast power on, as shown in Fig.4. www.richtek.com 8 12V 5V RT9204/A Power On Reset The Power-On Reset (POR) monitors the supply voltage (normal +5V) at the VCC pin and the input voltage at the OCSET pin. The VCC POR level is 4.1V with 0.5V hysteresis and the normal level at OCSET pin is 1.5V (see over-current protection). The POR function initiates soft-start operation after all supply voltages exceed their POR thresholds. 5V + R C 10 1uF Fig.4 Dual Power Supply Operation R1 VCC BOOT UGATE The Bootstrap Operation In a single power supply system, the UGATE driver of RT9204/A is powered by an external bootstrap circuit, as the Fig.3. The boot capacitor, CBOOT, generates a floating reference at the PHASE node. Typically a 0.1µF CBOOT is enough for most of MOSFETs used with the RT9204/A. The voltage drop between BOOT and PHASE node is refreshed to a voltage of VCC – diode drop (VD) while the low side MOSFET turning on. C2 6.0V Regulation VCC + The RT9204/A operates at either single 5V power supply with a bootstrap UGATE driver or 5V/12V dual-power supply form the ATX SMPS. The dualpower supply is recommended for high current application, the RT9204/A can deliver higher gate driving current while operating with ATX SMPS based on dual-power supply. Soft Start A built-in soft-start is used to prevent surge current from power supply input during power on. The softstart voltage is controlled by an internal digital counter. It clamps the ramping of reference voltage at the input of error amplifier and the pulse-width of the output driver slowly. The typical soft-start duration is 2mS. Under Voltage and Over Voltage Protection The voltage at FB pin is monitored and protected against OC (over current), UV (under voltage), and OV (over voltage). The UV threshold is 0.5V and OVthreshold is 1.0V. Both UV/OV detection have 30µS triggered delay. When OC or UV trigged, a hiccup restart sequence will be initialized, as shown in Fig.5. For RT9204, only 3 times of trigger are allowed to latch off. But for RT9204A, UVP will be kept hiccup mode. Hiccup is disabled during soft-start interval. DS9204/A-02 May 2003 RT9204/A Preliminary Internal SS COUNT = 1 COUNT = 2 COUNT = 3 Shutdown Pulling high the SD pin by a small single transistor can shutdown the RT9204/A PWM controller as shown in typical application circuit. Normally SD pin can be floating because an internal 40µA current source will pull low the SD shutdown pin voltage. 4V 2V 0V FB or FBL Voltage OVERLOAD APPLIED T0T1 T2 TIME T3 Fig. 5 L Q Applications Information VL D VI Inductor Selection The RT9204/A was designed for VIN = 5V, step-down application mainly. Fig.6 shows the typical topology and waveforms of step-down converter. C R VO C.C.M. TS The ripple current of inductor can be calculated as follows: ILRIPPLE = (5V - VOUT)/L × TON Table 1 TON TOFF VI - VO VL Because operation frequency is fixed at 600kHz, TON = 3.33 × VOUT/5V The VOUT ripple is VOUT RIPPLE = ILRIPPLE × ESR - VO iL µQ IL = IO µIL ESR is COUT capacitor equivalent series resistor Table 1 shows the ripple voltage of VOUT: VIN = 5V iQ IQ *Refer to Sanyo low ESR series (CE, DX, PX…) The suggested L and C are as follows: iD 2µH with ≥ 1500µF COUT ID 5µH with ≥ 1000µF COUT Fig.6 VOUT 3.3V 2.5V 1.5V Inductor 2µH 5µH 2µH 5µH 2µH 5µH 1000µF (ESR = 53mΩ) 100mV 40mV 110mV 44mV 93mV 37mV 1500µF (ESR = 33mΩ) 62mV 25mV 68mV 28mV 58mV 23mV 3000µF (ESR = 21mΩ) 40mV 16mV 43mV 18mV 37mV 15mV DS9204/A-02 May 2003 www.richtek.com 9 RT9204/A Preliminary Input / Output Capacitor High frequency/long life decoupling capacitors should be placed as close to the power pins of the load as physically possible. Be careful not to add inductance to the PCB trace, as it could eliminate the performance from utilizing these low inductance components. Consult with the manufacturer of the load on specific decoupling requirements. The output capacitors are necessary for filtering output and stabilizing the close loop (see the PWM loop stability). For powering advanced, high-speed processors, it is required to meet with the requirement of fast load transient, high frequency capacitors with low ESR/ESL capacitors are recommended. Another concern is high ESR induced ripple may trigger UV or OV protections. Linear Regulator Driver The linear regulator of RT9204/A was designed to drive bipolar NPN or MOSFET pass transistor. For MOSFET pass transistor, normally DRV need to provide minimum VOUT2+VT+gate-drive voltage to keep VOUT2 as setting voltage. When driving MOSFET operating at 5V power supply system, the gate-drive will be limited at 5V. In this situation shown in Fig. 5, low VT threshold MOSFET (VT = 1V) and Vout2 setting below 2.5V were suggested. In VBOOT = 12V operation condition as Fig. 8, VCC is regulated as higher to 6V providing more gate-drive for pass MOSFET transistor, VOUT2 can be set as ≤ 3.3V. VO UT2 ≤ 3.3V VBO OT = 12V 6V + R3 BOOT FBL VCC R4 RT9204/A R4 < 1K Fig. 8 PWM Loop Stability The RT9204/A is a voltage mode buck controller designed for 5V step-down applications. The gain of error amplifier is fixed at 35dB for simplified design. The output amplitude of ramp oscillator is 1.6V, the loop gain and loop pole/zero are calculated as follows: DC loop gain GA = 35dB × LC filter pole PO = 1 0.8 5 × VOUT 1.6 2π LC Error Amp pole PA = 300kHz ESR zero ZO = 1 2π ESR × C The RT9204/A Bode plot as shown Fig.9 is stable in most of application conditions. VOUT = 3.3V COUT = 1500µF(33mΩ) L=2µH 40 VO UT2 ≤ 2.5V DRV 30 VOUT = 1.5V PO = 2.9kHz VOUT = 2.5V ZO = 3.2kHz VOUT = 3.3V DRV R3 BOOT + 20 FBL VCC = 5V VCC RT9204/A R4 R4 < 1K Loop Gain 10 100 1k 10k 100k Fig. 9 7 Fig. Fig. 7 www.richtek.com 10 DS9204/A-02 May 2003 1M RT9204/A Preliminary Reference Voltage Because RT9204/A use a low 35dB gain error amplifier, shown in Fig. 10. The voltage regulation is dependent on VIN & VOUT setting. The FB reference voltage of 0.8V were trimmed at VIN = 5V & VOUT = 2.5V condition. In a fixed VIN = 5V application, the FB reference voltage vs. VOUT voltage can be calculated as Fig. 11. I3 56K _ EA PWM RAMP 1.75V _ Fig. 10 0.82 VIN = 5V FB (V) 0.81 0.8 0.79 0.88 0.5 1 1.5 2 2.5 3 3.5 4 4.5 VOUT (V) Fig. 11 Feedback Divider The reference of RT9204/A is 0.8V. Both the PWM and LDO output voltages can be set using a resistor based divider as shown in Fig.12. Put the R1&R2 and R3&R4 as close as possible to FB pin and R2&R4 should be less than 1 kΩ to avoid noise coupling. The C1 capacitor is a speed-up capacitor for reducing output ripple to meet with the requirement of fast transient load. Typically a 1nF ~ 0.1µF is enough for C1. DS9204/A-02 May 2003 VO UT1 + COUT DRV R1 R1 ) R2 R3 VOUT 2 = 0.8 V × (1 + ) R4 VOUT1 = 0.8 V × (1 + C1 RT9 204/A VO UT2 R3 + FB FBL R2 R2 < 1K R4 R4 < 1K Fig. 12 _ REP 0.8V L + 1K + + FB I2 VIN PWM Layout Considerations MOSFETs switch very fast and efficiently. The speed with which the current transitions from one device to another causes voltage spikes across the interconnecting impedances and parasitic circuit elements. The voltage spikes can degrade efficiency and radiate noise, that results in ocer-voltage stress on devices. Careful component placement layout and printed circuit design can minimize the voltage spikes induced in the converter. Consider, as an example, the turn-off transition of the upper MOSFET prior to turn-off, the upper MOSFET was carrying the full load current. During turn-off, current stops flowing in the upper MOSFET and is picked up by the low side MOSFET or Schottky diode. Any inductance in the switched current path generates a large voltage spike during the switching interval. Careful component selections, layout of the critical components, and use shorter and wider PCB traces help in minimizing the magnitude of voltage spikes. There are two sets of critical components in a DC-DC converter using the RT9204/A. The switching power components are most critical because they switch large amounts of energy, and as such, they tend to generate equally large amounts of noise. The critical small signal components are those connected to sensitive nodes or those supplying critical bypass current. www.richtek.com 11 RT9204/A Preliminary The power components and the PWM controller should be placed firstly. Place the input capacitors, especially the high-frequency ceramic decoupling capacitors, close to the power switches. Place the output inductor and output capacitors between the MOSFETs and the load. Also locate the PWM controller near by MOSFETs. A multi-layer printed circuit board is recommended. Fig.13 shows the connections of the critical components in the converter. Note that the capacitors CIN and COUT each of them represents numerous physical capacitors. Use a dedicated grounding plane and use vias to ground all critical components to this layer. Apply another solid layer as a power plane and cut this plane into smaller islands of common voltage levels. The power plane should support the input power and output power nodes. Use copper filled polygons on the top and bottom circuit layers for the PHASE node, but it is not necessary to oversize this particular island. Since the PHASE node is subjected to very high dV/dt voltages, the stray capacitance formed between these island and the surrounding circuitry will tend to couple switching noise. Use the remaining printed circuit layers for small signal routing. The PCB traces between the PWM controller and the gate of MOSFET and also the traces connecting source of MOSFETs should be sized to carry 2A peak currents. www.richtek.com 12 IL IQ1 PHASE 5V + VO UT Q1 + IQ2 + LOAD GND VCC UGATE GND RT9204/A FB Fig. 13 DS9204/A-02 May 2003 RT9204/A Preliminary Package Information H A M J B F C I D Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.178 0.254 0.007 0.010 I 0.102 0.254 0.004 0.010 J 5.791 6.198 0.228 0.244 M 0.406 1.270 0.016 0.050 8–Lead SOP Plastic Package DS9204/A-02 May 2003 www.richtek.com 13 RT9204/A Preliminary RICHTEK TECHNOLOGY CORP. RICHTEK TECHNOLOGY CORP. Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 8F-1, No. 137, Lane 235, Paochiao Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)89191466 Fax: (8862)89191465 Email: [email protected] www.richtek.com 14 DS9204/A-02 May 2003