DP8307A 8-Bit TRI-STATEÉ Bidirectional Transceiver (Inverting) General Description Features The DP8307A is a high speed Schottky 8-bit TRI-STATE bidirectional transceiver designed to provide bidirectional drive for bus oriented microprocessor and digital communications systems. It is capable of sinking 16 mA on the A ports and 48 mA on the B ports (bus ports). PNP inputs for low input current and an increased output high (VOH) level allow compatibility with MOS, CMOS, and other technologies that have a higher threshold and less drive capabilities. In addition, it features glitch-free power up/down on the B port preventing erroneous glitches on the system bus in power up or down. DP8303A and DP7304B/DP8304B are featured with Transmit/Receive (T/R) and Chip Disable (CD) inputs to simplify control logic. For greater design flexibility, DP8307A and DP7308/DP8308 is featured with Transmit (T) and Receive (R) control inputs. Y Y Y Y Y Y Y Y Y 8-bit bidirectional data flow reduces system package count Bidirectional TRI-STATE inputs/outputs interface with bus oriented systems PNP inputs reduce input loading Output high votlage interfaces with TTL, MOS, and CMOS 48 mA/300 pF bus drive capability Pinouts simplify system interconnections Independent T and R controls for versatility Compact 20-pin dual-in-line package Bus port glitch free power up/down Logic and Connection Diagrams Dual-In-Line Package TL/F/8794 – 1 Logic Table Control Inputs Resulting Conditions Transmit Receive A Port B Port 1 0 OUT IN 0 1 IN OUT 1 1 TRI-STATE TRI-STATE 0 0 TL/F/8794 – 2 Top View Order Number DP8307AN See NS Package Number N20A Both Active* *This is not an intended logic condition and may cause oscillations. TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1996 National Semiconductor Corporation TL/F/8794 RRD-B30M36/Printed in U. S. A. http://www.national.com DP8307A 8-Bit TRI-STATE Bidirectional Transceiver (Inverting) February 1996 Absolute Maximum Ratings (Note 1) Lead Temperature (soldering, 4 sec.) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage Input Voltage Output Voltage Maximum Power Dissipation* at 25§ C Cavity Package Molded Package 260§ C Storage Temperature b 65§ C to a 150§ C Recommended Operating Conditions 7V 5.5V 5.5V Min 4.75 0 Supply Voltage (VCC) Temperature (TA) 1667 mW 1832 mW Max 5.25 70 Units V §C *Derate cavity package 11.1 mW/§ C above 25§ C; derate molded package 14.7 mW/§ C above 25§ C. DC Electrical Characteristics (Notes 2 and 3) Symbol Parameter Conditions Min Typ Max Units 0.7 V A PORT (A0 – A7) VIH Logical ‘‘1’’ Input Voltage VIL Logical ‘‘0’’ Input Voltage VOH Logical ‘‘1’’ Output Voltage VOL Logical ‘‘0’’ Output Voltage T e VIL, R e 2.0V T e VIL, R e 2.0V 2.0 V T e 2.0V, R e VIL VIL e 0.5V IOH e b0.4 mA T e 2.0V, R e VIL IOL e 16 mA 0.35 0.5 V IOL e 8 mA 0.3 0.4 V b 38 b 75 mA 0.1 80 mA 1 mA mA IOH e b3 mA VCC b 1.15 VCC b 0.7 2.7 3.95 V V IOS Output Short Circuit Current T e 2.0V, R e VIL, VO e 0V, VCC e Max, (Note 4) IIH Logical ‘‘1’’ Input Current II Input Current at Maximum Input Voltage T e VIL, R e 2.0V, VIH e 2.7V R e T e 2.0V, VCC e Max, VIH e 5.25V IIL Logical ‘‘0’’ Input Current T e VIL, R e 2.0V, VIN e 0.4V b 70 b 200 VCLAMP Input Clamp Voltage T e R e 2.0V, IIN e b12 mA b 0.7 b 1.5 V IOD Output/Input TRI-STATE Current T e R e 2.0V VIN e 0.4V b 200 mA VIN e 4.0V 80 mA 0.7 V b 10 B PORT (B0 – B7) VIH Logical ‘‘1’’ Input Voltage VIL Logical ‘‘0’’ Input Voltage VOH Logical ‘‘1’’ Output Voltage VOL Logical ‘‘0’’ Output Voltage T e 2.0V, R e VIL T e 2.0V, R e VIL T e VIL, R e 2.0V VIL e 0.5V T e VIL, R e 2.0V 2.0 IOH e b0.4 mA V VCC b 1.15 VCC b 0.8 V IOH e b5 mA 2.7 3.9 V IOH e b10 mA 2.4 3.6 V IOL e 20 mA 0.3 0.4 V IOL e 48 mA 0.4 0.5 V b 50 b 150 mA 0.1 80 mA IOS Output Short Circuit Current T e VIL, R e 2.0V, VO e 0V, VCC e Max, (Note 4) IIH Logical ‘‘1’’ Input Current T e 2.0V, R e VIL, VIH e 2.7V II Input Current at Maximum Input Voltage T e R e 2.0V, VCC e Max, VIH e 5.25V 1 mA IIL Logical ‘‘0’’ Input Current T e 2.0V, R e VIL, VIN e 0.4V b 70 b 200 mA VCLAMP Input Clamp Voltage T e R e 2.0V, IIN e b12 mA b 0.7 b 1.5 V IOD Output/Input TRI-STATE Current T e R e 2.0V VIN e 0.4V b 200 mA VIN e 4.0V a 200 mA http://www.national.com 2 b 25 DC Electrical Characteristics (Notes 2 and 3) (Continued) Symbol Parameter Conditions Min Typ Max Units 0.7 V CONTROL INPUTS T, R VIH Logical ‘‘1’’ Input Voltage VIL Logical ‘‘0’’ Input Voltage IIH Logical ‘‘1’’ Input Current VIH e 2.7V II Maximum Input Current VCC e Max, VIH e 5.25V IIL Logical ‘‘0’’ Input Current VIL e 0.4V VCLAMP Input Clamp Voltage 2.0 V 0.5 20 mA 1.0 mA R b 0.1 b 0.25 mA T b 0.25 b 0.5 mA b 0.8 b 1.5 V IIN e b12 mA POWER SUPPLY CURRENT ICC Power Supply Current T e R e 2.0V, VIN e 2.0V, VCC e Max 70 100 mA T e 0.4V, VINA e R e 2V, VCC e Max 100 150 mA AC Electrical Characteristics VCC e 5V, TA e 25§ C Symbol Parameter Conditions Min Typ Max Units A PORT DATA/MODE SPECIFICATIONS tPDHLA Propagation Delay to a Logical ‘‘0’’ from B Port to A Port T e 2.4V, R e 0.4V (Figure A) R1 e 1k, R2 e 5k, C1 e 30 pF 8 12 ns tPDLHA Propagation Delay to a Logical ‘‘1’’ from B Port to A Port T e 2.4V, R e 0.4V (Figure A) R1 e 1k, R2 e 5k, C1 e 30 pF 11 16 ns tPLZA Propagation Delay from a Logical ‘‘0’’ to TRI-STATE from R to A Port B0 to B7 e 2.4V, T e 2.4V (Figure B) S3 e 1, R5 e 1k, C4 e 15 pF 10 15 ns tPHZA Propagation Delay from a Logical ‘‘1’’ to TRI-STATE from R to A Port B0 to B7 e 0.4V, T e 2.4V (Figure B) S3 e 0, R5 e 1k, C4 e 15 pF 8 15 ns tPZLA Propagation Delay from TRI-STATE to a Logical ‘‘0’’ from R to A Port B0 to B7 e 2.4V, T e 2.4V (Figure B) S3 e 1, R5 e 1k, C4 e 30 pF 25 35 ns tPZHA Propagation Delay from TRI-STATE to a Logical ‘‘1’’ from R to A Port B0 to B7 e 0.4V, T e 2.4V (Figure B) S3 e 0, R5 e 5k, C4 e 30 pF 24 35 ns B PORT DATA/MODE SPECIFICATIONS Propagation Delay to a Logical ‘‘0’’ from A Port to B Port T e 0.4V, R e 2.4V (Figure A) R1 e 100X, R2 e 1k, C1 e 300 pF R1 e 667X, R2 e 5k, C1 e 45 pF 12 8 18 12 ns ns Propagation Delay to a Logical ‘‘1’’ from A Port to B Port T e 0.4V, R e 2.4V (Figure A) R1 e 100X, R2 e 1k, C1 e 300 pF R1 e 667X, R2 e 5k, C1 e 45 pF 15 9 23 14 ns ns tPLZB Propagation Delay from a Logical ‘‘0’’ to TRI-STATE from T to B Port A0 to A7 e 2.4V, R e 2.4V (Figure B) S3 e 1, R5 e 1k, C4 e 15 pF 13 18 ns tPHZB Propagation Delay from a Logical ‘‘1’’ to TRI-STATE from T to B Port A0 to A7 e 0.4V, R e 2.4V (Figure B) S3 e 0, R5 e 1k, C4 e 15 pF 8 15 ns tPZLB Propagation Delay from TRI-STATE to a Logical ‘‘0’’ from T to B Port A0 to A7 e 2.4V, R e 2.4V (Figure B) S3 e 1, R5 e 100X, C4 e 300 pF S3 e 1, R5 e 667X, C4 e 45 pF 32 18 40 25 ns ns Propagation Delay from TRI-STATE to a Logical ‘‘1’’ from T to B Port A0 to A7 e 0.4V, R e 2.4V (Figure B ) S3 e 0, R5 e 1k, C4 e 300 pF S3 e 0, R5 e 5k, C4 e 45 pF 25 16 35 25 ns ns tPDHLB tPDLHB tPZHB Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The tables of ‘‘Electrical Characteristics’’ provide conditions for actual device operation. Note 2: Unless otherwise specified, min/max limits apply across the supply and temperature range listed in the table of Recommended Operating Conditions. All typical values given are for VCC e 5V and TA e 25§ C. Note 3: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified. Note 4: Only one output at a time should be shorted. 3 http://www.national.com Switching Time Waveforms and AC Test Circuits TL/F/8794 – 3 TL/F/8794 – 4 Note: C1 includes test fixture capacitance. FIGURE A. Propagation Delay from A Port to B Port or from B Port to A Port TL/F/8794 – 5 TL/F/8794 – 6 Note: C4 includes test fixture capacitance. Port input is in a fixed logical condition. See AC Table. FIGURE B. Propagation Delay to/from TRI-STATE from R to A Port and T to B Port http://www.national.com 4 5 http://www.national.com DP8307A 8-Bit TRI-STATE Bidirectional Transceiver (Inverting) Physical Dimensions inches (millimeters) Molded Dual-In-Line Package (N) Order Number DP8307AN NS Package Number N20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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