LXT312A/LXT315A Low Power T1 PCM Repeaters/Transceivers Datasheet This data sheet also applies to the LXT312/LXT315 products. The LXT312A and LXT315A are integrated repeater/transceiver circuits for T1 carrier systems. The LXT312A is a dual repeater/transceiver and the LXT315A is a single repeater/transceiver. The LXT312A and LXT315A are designed to operate as regenerative repeaters/transceivers for 1.544 Mbps data rate PCM lines. Each includes all circuits required for a regenerative repeater/ transceiver system including the equalization network, automatic line build-out (ALBO), and a state-of-the-art analog/digital clock extraction network tuned by an external crystal. The key feature of the LXT312A family is that it requires only a crystal and a minimum of other components to complete a repeater/transceiver design. Compared with traditional tuned coiltype repeaters/transceivers, they offer significant savings in component and labor costs, along with reduced voltage drop/power consumption, and improved reliability. To ensure performance for all loop lengths, the LXT312A and LXT315A are 100% AC/DC tested using inputs generated by Intel’s proprietary transmission line and network simulator. The LXT312A and LXT315A are advanced CMOS devices which require only a single 5-volt power supply. Product Features ■ ■ ■ ■ ■ ■ Integrated repeater/transceiver circuit on a single CMOS chip On-chip equalization network On-chip ALBO Low power consumption No tuning coil On-chip Loopback ■ ■ ■ ■ ■ ■ Recovered Clock Output 0 to 36 dB dynamic range -11 dB interference margin Compatible with CB113/TA24 specifications Single 5 V CMOS technology Available in 16-pin PDIP and 44-pin PLCC As of January 15, 2001, this document replaces the Level One document LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers. Order Number: 249071-001 January 2001 Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The LXT312A/LXT315A may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800548-4725 or by visiting Intel’s website at http://www.intel.com. Copyright © Intel Corporation, 2001 *Third-party brands and names are the property of their respective owners. Datasheet Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A Contents 1.0 Pin Assignments and Signal Descriptions ...................................................... 6 2.0 Functional Description............................................................................................. 8 2.1 2.2 2.3 2.4 3.0 Application Information .........................................................................................10 3.1 4.0 Introduction..........................................................................................................10 3.1.1 Alternate Timing Reference....................................................................10 Test Specifications ..................................................................................................12 4.1 5.0 Introduction............................................................................................................ 8 Receive Function................................................................................................... 8 2.2.1 Timing Recovery Function........................................................................ 8 Transmit Function.................................................................................................. 8 Loopback Function (LXT312A Only)9 Test Setups .........................................................................................................13 4.1.1 Introduction.............................................................................................13 4.1.2 Receiver Jitter Tolerance Testing...........................................................13 4.1.3 Receiver Jitter Transfer Testing .............................................................13 4.1.4 Interference Margin Testing ...................................................................15 4.1.5 Gaussian Noise Immunity Testing..........................................................15 4.1.6 60 Hz Pulse Modulation Immunity Testing .............................................15 4.1.7 Receiver Timing Recovery Testing ........................................................15 Mechanical Specifications....................................................................................17 Figures 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Datasheet LXT312A/LXT315A Block Diagram .......................................................................5 LXT312A/LXT315A Pin Assignments and Package Markings .............................. 6 Typical T1 Dual Repeater/Transceiver Application .............................................11 Alternate Timing Reference Circuitry ..................................................................11 Digital Timing Characteristics..............................................................................13 Receiver Jitter Tolerance Template ....................................................................14 Receiver Jitter Transfer Template .......................................................................14 Receiver Jitter Tolerance Test Setup ..................................................................14 Receiver Jitter Transfer Test Setup.....................................................................14 Receiver Noise Interference Margin Test Setup .................................................15 Receiver Gaussian Noise Immunity Test Setup..................................................16 Receiver 60 Hz Pulse Amplitude Modulation Immunity Test Setup ....................16 Receiver Timing Recovery Phase Shift Modulation Test Setup..........................16 LXT312NE / LXT315NE Package Specifications ................................................17 LXT312PE / LXT315PE Package Specifications ................................................18 3 LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers Tables 1 2 3 4 5 6 4 LXT 312A / LXT315A Signal Descriptions ............................................................ 7 Crystal Specifications......................................................................................... 10 Absolute Maximum Ratings ................................................................................ 12 Recommended Operating Conditions ................................................................. 12 Electrical Characteristics (Over Recommended Range)..................................... 12 Digital Timing Characteristics (Over Recommended Range) ............................. 13 Datasheet Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A Figure 1. LXT312A/LXT315A Block Diagram RTIP1 Receive Equalizer Timing Recovery & Transmit Control Noise & Crosstalk Filter RRING1 Slicers & Peak Detectors Equalizer Control LPBK TTIP2 TRING2 RCLK2 Datasheet Line Drivers Control Clock Generator TTIP1 TRING1 XTAL IN XTAL OUT Equalizer Control Loopback Line Drivers RCLK1 Timing Recovery & Transmit Control Slicers & Peak Detectors Noise & Crosstalk Filter Receive Equalizer RTIP2 RRING2 5 LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers 1.0 Pin Assignments and Signal Descriptions N/C N/C RCLK1 VCC RRING1 RTIP1 GNDR RTIP2 RRING2 LPBK N/C Figure 2. LXT312A/LXT315A Pin Assignments and Package Markings 1 2 3 4 5 6 7 8 6 5 4 3 2 1 44 43 42 41 40 16 15 14 13 12 11 10 9 GNDR RTIP2 RRING2 LPBK XTO XTI TTIP2 TRING2 N/C N/C N/C N/C N/C N/C N/C N/C N/C N/C N/C 7 8 9 10 11 Part # 12 LOT # 13 FPO # 14 15 16 17 N/C N/C N/C N/C N/C N/C N/C N/C N/C N/C N/C 7 8 9 10 11 12 13 14 15 16 17 LXT312PE XX XXXXXX XXXXXXXX 39 38 37 36 35 34 33 32 31 30 29 N/C N/C N/C N/C N/C N/C N/C N/C N/C N/C N/C N/C N/C RCLK1 VCC RRING1 RTIP1 GNDR N/C N/C LPBK N/C N/C RCLK2 TTIP1 TRING1 GNDT TRING2 TTIP2 XTI XTO N/C N/C 18 19 20 21 22 23 24 25 26 27 28 RTIP1 RRING1 VCC RCLK1 RCLK2 TTIP1 TRING1 GNDT LXT312NE XX XXXXXX XXXXXXXX LXT312NE 1 2 3 4 5 6 7 8 6 5 4 3 2 1 44 43 42 41 40 16 15 14 13 12 11 10 9 GNDR N/C N/C LPBK XTO XTI N/C N/C Part # LOT # FPO # 39 38 37 36 35 LXT315PE XX 34 33 XXXXXX 32 XXXXXXXX 31 30 29 N/C N/C N/C N/C N/C N/C N/C N/C N/C N/C N/C N/C N/C TTIP1 TRING1 GNDT N/C N/C XTI XTO N/C N/C 18 19 20 21 22 23 24 25 26 27 28 RTIP1 RRING1 VCC RCLK1 N/C TTIP1 TRING1 GNDT LXT315NE XX XXXXXX XXXXXXXX LXT315NE 6 Datasheet Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A Figure 2. LXT312A/LXT315A Pin Assignments and Package Markings Package Topside Markings Marking Definition Part # Unique identifier for this product family. Rev # Identifies the particular silicon “stepping” — refer to the specification update for additional stepping information. Lot # Identifies the batch. FPO # Identifies the Finish Process Order. Table 1. LXT 312A / LXT315A Signal Descriptions Pin # Symbol I/O 1 RTIP1 I 2 RRING1 I 4 4 RCLK1 O 6 20 TTIP1 O 7 21 TRING1 O PDIP PLCC2 1 2 Description Repeater Tip and Ring Inputs. Tip and ring receive inputs for Channel 1. Recovered Clock. Clock output recovered from Channel 1 receive input. Repeater Tip and Ring Outputs. Open-drain output drivers for Channel 1. 11 25 XTI I 12 26 XTO O Crystal Oscillator Pins. A 6.176 MHz crystal should be connected across these two pins. For alternative timing references, refer to Application Information. 3 3 VCC – Power Supply. Power supply input for all circuits. +5 V (±0.25 V). 8 22 GNDT – Transmit Ground. Ground return for transmit circuits. 16 44 GNDR – Receive Ground. Ground return for receive circuits. 91 1 TRING2 O 10 231 1 24 TTIP2 O Side 2 Ring and Tip Outputs. On the LXT312A dual repeater/transceiver, these are open-drain output drivers for Channel 2. 141 151 421 431 RRING2 I RTIP2 I 51 191 RCLK2 O 13 411 LPBK I Side 2 Ring and Tip Inputs. On the LXT312A repeater/transceiver, these are tip and ring receive inputs for Channel 2. Recovered Clock. On the LXT312A dual repeater/transceiver, this is the recovered clock output for Channel 2. Loopback Control. On the LXT312A, this pin controls Loopback Selection: High = Loopback side 1 data to side 2. Low = No Loopback. On LXT315A single repeater/transceiver, this pin must be connected to GND. 1. On the LXT315NE and LXT315PE single repeater/transceiver, these pins are not connected (N/C). 2. On the LXT312PE and LXT315PE, pins 5 through 18 and 27 through 40 are not connected (N/C). Datasheet 7 LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers 2.0 Functional Description 2.1 Introduction PCM signals are attenuated and dispersed in time as they travel down a transmission line. Repeaters/transceivers are required to amplify, reshape, regenerate, and retime the PCM signal, then retransmit it. The LXT312A and LXT315A each contain all the circuits required to build a complete PCM repeater/transceiver. The operational range of the repeaters/transceivers is 0 to 36 dB of cable loss at 772 kHz (equal to 6300 feet of 22 gauge pulp-insulated cable between repeaters). 2.2 Receive Function The signal is received through a 1:1 transformer at RTIP and RRING and equalized for up to 36 dB of cable loss. The receive equalizer uses a proprietary on-chip adaptive filter technique which is equivalent to a 3-port ALBO equalizer design. The monolithic structure of the filter and the absence of external components provide excellent ISI and dispersion elimination, and accurate data transfer over temperature. Receiver noise immunity is optimized by a proprietary crosstalk elimination filter which eliminates the unnecessary high-frequency components of the received signal. 2.2.1 Timing Recovery Function The equalized signal is full wave rectified and used to generate information for the timing recovery circuit. This circuit uses a mixed analog/digital technique to provide a low-jitter PLL similar to a tuned tank with excellent jitter tracking ability. But unlike a tuned tank, the free running frequency of the PLL clock is accurately controlled by the external reference crystal. No adjustment is required. Refer to Table 2 for crystal specifications. Recovered clock signals are available on the RCLK pins for applications that require bit stream synchronization. 2.3 Transmit Function Recovered data is re-synchronized to the recovered clock signal by the timing recovery and transmit control section. The data is then retransmitted to the network via two open-drain, highvoltage transistors. 8 Datasheet Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A 2.4 Loopback Function (LXT312A Only) The LXT312A includes a loopback function for network diagnostics. With the LPBK pin Low, the repeater/transceiver operates in the normal mode. When the LPBK pin is pulled High, the data is looped back from side 1 to side 2. Datasheet 9 LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers 3.0 Application Information 3.1 Introduction Figure 3 shows a typical T1 dual repeater/transceiver application using an LXT312A repeater/ transceiver with standard PCB edge connectors. It includes a jumper-selectable shorting option (dashed lines at connector pins 2 and 7) for the fault location circuitry. Table 2 lists the specifications for the crystal used with the LXT312A or LXT315A repeater. 3.1.1 Alternate Timing Reference For applications where a crystal is not appropriate, a 1.544 MHz or 6.176 MHz, CMOS-level (High ≥ 4.5V, Low ≤ 0.5V) oscillator may be connected to XTI. In this situation, XTO must be tied to VCC and GND via a voltage divider as shown in Figure 4. Table 2. Crystal Specifications Parameter Frequency Frequency tolerance Specification 6.176 MHz 1 ± 50 ppm Effective series resistance 40 Ω Maximum Crystal cut AT Resonance Parallel Maximum drive level 2.0 mW Mode of operation Fundamental 1. @ 25 °C, C Load = 10 pF; and from -40 °C to +85 °C (Ref 25 °C reading). 10 Datasheet Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A Figure 3. Typical T1 Dual Repeater/Transceiver Application SCHOTT #10951 5.6 Ω 1W SCHOTT #10951 5.6 Ω 1W 5 12 100 Ω RCV1 6 R* 5.6 Ω 1W RCV2 100 Ω R* LXT312 1ct : 1 R* 60 Ω 33 Ω GNDR RRING1 RTIP2 4 XMT1 5.6 Ω 1W 3 2 ** RCLK1 LPBK RCLK2 XTO TTIP1 XTI 33 Ω 33 Ω 100 µF 1 : 1ct : 3ct SCHOTT #12535-9027 6.176 MHz TTIP2 TRING2 33 Ω 240 Ω 100 µH 11 RRING2 TRING1 GNDT 5.6 Ω 1W R* RTIP1 VCC 1 µF 5.1 V 6.3 V 5.6 Ω 1W 1 : 1ct ** 8 XMT2 5.6 Ω 1W 9 7 0.1 µF ** 5.6 Ω 1W ** 100 µH 240 Ω 10 3ct : 1 : 1ct SCHOTT #12535-9027 NOTES: * RTIP/RRING Resistors are used to provide surge protection. Values can be 0 – 100 Ω. ** TTIP/TRING Zeners are used to reduce surge susceptibility. Values can be 12 – 14 V. Figure 4. Alternate Timing Reference Circuitry LXT312A Vcc 2 kΩ XTO 3 kΩ XTI CMOS-level Input Oscillator (See Note 1) 1. Oscillator drive levels: High Š 4.5 V Low £ 0.5 V Datasheet 11 LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers 4.0 Test Specifications Note: Table 3. Minimum and maximum values in Table 3 through Table 6 and Figure 5 through Figure 13 represent the performance specifications of the LXT312A/315A repeaters/transceivers and are guaranteed by test except, as noted, by design. Absolute Maximum Ratings Parameter Symbol Unit Supply voltage (min to max) VCC -0.3 V to +6 V Driver voltage VOH 18 V Receiver current ICC 100 mA Operating temperature (min to max) TOP -40 °C to +85 °C Storage temperature (min to max) TST -65 °C to +150 °C Caution: Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 4. Recommended Operating Conditions Parameter Symbol Min Typ Max Supply voltage VCC 4.75 5.0 5.25 V Operating temperature TOP -40 — 85 °C Table 5. Unit Electrical Characteristics (Over Recommended Range) Parameter Interference margin Receiver dynamic range (IOL = 1.6 mA Digital outputs - low Digital outputs - high Symbol Min Typ1 Max Unit SNR -11 – – dB – -36 – 0 dB VOL – – 0.4 V (IOL = 10 µA) VOL – 0.2 – V (IOH = 0.4 mA VOH 2.4 – – V (IOH < 10 µA) VOH – 4.5 – V VIH 2.0 – – V Digital inputs - high VIL – – 0.8 V All zeros ICC – 15 22 mA All ones ICC – – 23 mA Driver leakage current (VDVR = 18 V) ILL – – 150 µA Driver pulse amplitude (Driver output IO = 20 mA) AP 0.65 – 0.95 V Digital inputs - low Supply current (from VCC supply)2 1. Typical values are at 25° C and are for design aid only; they are not guaranteed and not subject to production testing. 2. Measured with CLOAD ≤ 10 pF, RLOAD > 100 kΩ. 12 Datasheet Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A Figure 5. Digital Timing Characteristics tF tR RCLK tTH tTSU TTIP, TRIN (with external pull-up) Table 6. tPW Digital Timing Characteristics (Over Recommended Range) Parameter Symbol Min Typ1 Max Unit tPW 299 324 349 ns – – – 15 ns tR / tF tTSU tTH – – 18 ns 90 – – ns 90 – – ns Driver pulse width Driver pulse imbalance 2 Rise and fall time (any digital output ) Setup time - TTIP/TRING to RCLK Hold time - TTIP/TRING from RCLK 1. Typical values are at 25° C and are for design aid only; they are not guaranteed and not subject to production testing. 2. Measured with CLOAD ≤ 10 pF, RLOAD > 100 kΩ. 4.1 Test Setups 4.1.1 Introduction Both the LXT312A and LXT315A are fully tested (100% AC and DC parameters) using inputs generated by Intel’s proprietary transmission line and network simulator. Device testing includes receiver jitter tolerance, jitter transfer and interference margin, and receiver immunity to Gaussian and 60 Hz noise. Specifications and bench test setups are shown in Figure 6 through Figure 13. 4.1.2 Receiver Jitter Tolerance Testing Receiver jitter tolerance meets the template shown in Figure 6, when operated at line losses from 0 to 36 dB. Figure 8 shows the setup used for jitter tolerance testing. 4.1.3 Receiver Jitter Transfer Testing Receiver jitter transfer meets the template shown in Figure 7, when operated with line losses from 0 to 36 dB and input jitter amplitude of 0.15 UI peak-to-peak. Jitter gain at a given frequency is defined as the difference between intrinsic jitter and additive jitter at the measurement frequency, divided by the amplitude of the input jitter. Figure 9 shows the setup used for jitter transfer testing. Datasheet 13 LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers Sinusoidal Input Jitter Amplitude (Pk - Pk UI) Figure 6. Receiver Jitter Tolerance Template -20 dB/Decade Slope Acceptable Range 0.3 UI 6430 Hz Jitter Frequency 10 Hz 40 kHz Figure 7. Receiver Jitter Transfer Template Jitter Gain (dB) 0.1 -20 dB/Decade Slope 0 Acceptable Range 10 9650 Jitter Frequency (Hz) Figure 8. Receiver Jitter Tolerance Test Setup QRSS Source with Zero Restriction Cable 0 dB to 36 dB @ 772 kHz Sinusoidal Jitter Modulator LXT312A/ LXT315A Repeater/ Transceiver Error Detector Figure 9. Receiver Jitter Transfer Test Setup QRSS Source with Zero Restriction 14 Sinusoidal Jitter Modulator Cable 0 dB to 36 dB @ 772 kHz LXT312A/ LXT315A Repeater/ Transceiver Jitter Demodulator Spectrum Analyzer Datasheet Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A 4.1.4 Interference Margin Testing The LXT312A and LXT315A receiver noise interference margin is specified at a minimum of -11 dB for line losses from 0 dB to 36 dB. The test setup used to measure noise margin is shown in Figure 10. 4.1.5 Gaussian Noise Immunity Testing Receiver immunity to Gaussian noise is specified at a maximum BER of 10-7 for a quasi-random T1 signal at 1.544 MHz (±130 ppm). The receiver must be immune to noise power expressed as Np = -(L + 4.7) dBm, where L corresponds to the line loss and is valid for 0 to 36 dB. Figure 11 shows the setup used to test Gaussian noise immunity. The noise source is Gaussian to at least 6 sigma and filtered to simulate expected noise in a binder group (per AT&T TA #24/CB113). 4.1.6 60 Hz Pulse Modulation Immunity Testing Receiver immunity to 60 Hz pulse amplitude modulation is specified using the Gaussian noise source described in the previous paragraph on Gaussian noise immunity. Pulse amplitude modulation is specified between 10% and 30% of the nominal amplitude (see AT&T TA #24/ CB113 for details on the modulation envelope). Figure 12 shows the setup used for testing receiver immunity to 60 Hz pulse amplitude modulation. The following data reflect noise power for 10-7 BER at each modulation level, where L corresponds to the line loss and is valid for 0 to 36 dB: 4.1.7 Modulation Level Noise Power 10% Np = -(L + 5.7) dBm 20% Np = -(L + 6.7) dBm 30% Np = -(L + 8.7) dBm Receiver Timing Recovery Testing Receiver timing recovery phase shift modulation for repetitive 8-bit patterns is specified at less than 0.07 UI. This is tested using any two out of 35 possible 8-bit patterns and measuring the change in output pulse timing from one pattern to the other (see AT&T TA #24/CB113 for details on the patterns). The switching rate from one pattern to the other is specified at between 300 Hz and 500 Hz. The setup used to test receiver timing recovery phase shift modulation is shown in Figure 13. Figure 10. Receiver Noise Interference Margin Test Setup QRSS Source with Artificial Line Interference Generator and Error Detector Line Out Line In LXT312A/ LXT315A Repeater/ Transceiver (Lear Siegler 415A-2 or Equivalent) Datasheet 15 LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers Figure 11. Receiver Gaussian Noise Immunity Test Setup QRSS Source with Zero Restriction Cable 0 dB to 36 dB @ 772 kHz Gaussian White Noise Generator Σ LXT312A/ LXT315A Repeater/ Transceiver Filter Compatible with TA #24 Error Detector Figure 12. Receiver 60 Hz Pulse Amplitude Modulation Immunity Test Setup QRSS Source with Zero Restriction 60 Hz Amplitude Modulator Gaussian White Noise Generator Cable 0 dB to 36 dB @ 772 kHz Σ Filter Compatible with TA #24 LXT312A/ LXT315A Repeater/ Transceiver Error Detector Figure 13. Receiver Timing Recovery Phase Shift Modulation Test Setup Pattern Setting Pattern Setting 16 Cable 0 dB to 36 dB @ 772 kHz Transmitter Pattern Switching Control LXT312A/ LXT315A Repeater/ Transceiver Phase Shift Measuring Datasheet Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A 5.0 Mechanical Specifications Figure 14. LXT312NE / LXT315NE Package Specifications 16-Pin Plastic Dual In-Line Package • Part Number LXT312NE & LXT315NE • Extended Temperature Range (-40°C to +85°C) E 1 E1 eA eB b2 D A2 A L b3 b e Inches Millimeters Dim Min Max Min Max A – 0.210 – 5.334 A2 0.115 0.195 2.921 4.953 b 0.014 0.022 0.356 0.559 b2 0.045 0.070 1.143 1.778 b3 0.030 0.045 0.762 1.143 D 0.735 0.775 18.669 19.685 E 0.300 0.325 7.620 8.255 E1 0.240 0.280 6.096 7.112 e 0.100 BSC (Nominal) 2.540 BSC (Nominal) eA 0.300 BSC (Nominal) 7.620 BSC (Nominal) eB – 0.430 – 10.922 L 0.115 0.150 2.921 3.810 1. BSC: Basic Spacing between Centers Datasheet 17 LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers Figure 15. LXT312PE / LXT315PE Package Specifications 44-Pin Plastic Leaded Chip Carrier • Part Number LXT312PE & LXT315PE • Extended Temperature Range (-40°C to +85°C) CL C B D1 D D A2 A A1 F Inches Millimeters Dim 18 Min Max Min Max A 0.165 0.180 4.191 4.572 A1 0.090 0.120 2.286 3.048 A2 0.062 0.083 1.575 2.108 B 0.050 – 1.270 – C 0.026 0.032 0.660 0.813 D 0.685 0.695 17.399 17.653 D1 0.650 0.656 16.510 16.662 F 0.013 0.021 0.330 0.533 Datasheet