ST7265 LOW-POWER, FULL-SPEED USB 8-BIT MCU WITH 32K FLASH, 5K RAM, FLASH CARD I/F, TIMER, PWM, ADC, I2C DATA BRIEFING ■ ■ ■ ■ Memories – Up to 32K of ROM or Flash program memory with read/write protection – For Flash devices, In-Application Programming (IAP) via USB and In-Circuit programming (ICP) – Up to 5 Kbytes of RAM with up to 256 bytes stack Clock, Reset and Supply Management – PLL for generating 48 MHz USB clock using a 12 MHz crystal – Low Voltage Reset (optional) – Dual supply management: analog voltage detector on the USB power line to enable smart power switching from USB power to battery. – Programmable Internal Voltage Regulator for Memory cards (2.4V to 3.3V) supplying: Flash Card I/O lines (voltage shifting) Up to 50 mA for Flash card supply – Clock-out capability 47 programmable I/O lines – 11 high sink I/Os (10mA at 1V) – 5 true open drain outputs – 16 lines programmable as interrupt inputs USB (Universal Serial Bus) Interface – with DMA for full speed bulk applications compliant with USB 12 Mbs specification (version 1.1) – On-Chip 3.3V USB voltage regulator and transceivers with software power-down – 5 USB endpoints: 1 control endpoint 2 IN endpoints supporting interrupt and bulk 2 OUT endpoints supporting interrupt and bulk – Hardware conversion between USB bulk packets and 512-byte blocks TQFP64 10x10 TQFP64 14x14 ■ ■ ■ ■ ■ ■ Mass Storage Interface – DTC (Data Transfer Coprocessor): Universal Serial/Parallel communications interface, with software plug-ins for current and future protocol standards: 16-bit IDE mode Compact Flash Multimedia Card (MMC protocol) SmartMediaCard Secure Digital Card 2 Timers – Configurable Watchdog for system reliability – 16-bit Timer with 2 output compare functions. 1 Communication Interface – I2C Single Master Interface up to 400 KHz D/A and A/D Peripherals – PWM/BRM Generator (with 2 10-bit PWM/ BRM outputs) – 8-bit A/D Converter (ADC) with 2 channels Instruction Set – 8-bit data manipulation – 63 basic instructions – 17 main addressing modes – 8 x 8 unsigned multiply instruction – True bit manipulation Development Tools – Full hardware/software development package Device Summary Features Program memory User RAM (stack) - bytes Peripherals Operating Supply CPU Frequency Package Operating Temperature ST72651 32K ROM ST72F651 32K FLASH ST72652 16K ROM 5K (256) ST72F652 16K FLASH 1K (256) 2 USB, DTC, Timer, ADC, I C, PWM USB, DTC, Timer Dual 2.4V to 5.5V or 4.0V to 5.5V (for USB) Single 4.0V to 5.5V 6 or 3 MHz (8 MHz in USB mode) 8, 6 or 3 MHz TQFP64 (10 x10 or 14 x14) TQFP64 (14 x14) 0°C to +70°C Rev. 1.2 September 2000 This is preliminary information on a new product now in development. Details are subject to change without notice. 1/9 1 ST7265 1 INTRODUCTION The ST7265 MCU supports volume data exchange with a host (computer or kiosk) via a full speed USB interface. The MCU is capable of handing various transfer protocols, with a particular emphasis on FLASH media card mass storage applications. ST7265 is compliant with the USB Mass Storage Class specifications, and supports related protocols such as BOT (Bulk Only Transfer) and CBI (Control, Bulk, Interrupt). It is based on the ST7 standard 8-bit core, with specific peripherals for managing USB full speed data transfer between the host and most types of FLASH media card: – A full speed USB interface with Serial Interface Engine, and on-chip 3.3V regulator and transceivers. – A dedicated 24 MHz Data Buffer Manager state machine for handling 512-byte data blocks (this size corresponds to a sector both on computers and FLASH media cards). – A Data Transfer Coprocessor (DTC), able to handle fast data transfer with external devices. This DTC also computes the CRC or ECC required to handle Mass storage media. – An Arbitration block gives the ST7 core priority over the USB and DTC when accessing the Data Buffer. In USB mode, the USB interface is serviced before the DTC. – A FLASH Supply Block able to provide programmable supply voltage and I/O electrical levels to the FLASH media card. Figure 1. USB Data Transfer Block Diagram USB SIE USB DATA TRANSFER DATA TRANSFER BUFFER ST7 CORE BUFFER ACCESS ARBITRATION 512-byte RAM Buffer 512-byte RAM Buffer DATA TRANSFER COPROCESSOR (DTC) LEVEL SHIFTERS MASS STORAGE DEVICE 2/9 1 ST7265 INTRODUCTION (Cont’d) In addition to the peripherals for USB full speed data transfer, the ST7265 includes all the necesscary features for stand-alone applications with FLASH mass storage. – Low voltage reset ensuring proper power-on or power-off of the device (selectable by option) – Digital Watchdog – 16-bit Timer with 2 output compare functions. – Two 10-bit PWM outputs (not on all products see device summary) – Fast I2C Single Master interface (not on all products - see device summary) – 8-bit Analog-to-Digital converter (ADC) with 2 multiplexed analog inputs (not on all products see device summary) The ST72F65x are the Flash versions of the ST7265x in a TQFP64 package. The ST7265x are the ROM versions in a TQFP64 package. Figure 2. Digital Audio Player Application Example in Play Mode DATA TRANSFER BUFFER 512-byte RAM Buffer 512-byte RAM Buffer BUFFER ACCESS ARBITRATION ST7 CORE DATA TRANSFER COPROCESSOR (DTC) I2C LEVEL SHIFTERS MASS STORAGE DEVICE DIGITAL AUDIO DEVICE 3/9 1 ST7265 INTRODUCTION (Cont’d) Figure 3. ST7265 Block Diagram OSCIN OSCOUT 12MHz OSC CLOCK DIVIDE R 48MHz PLL DATA TRANSFER BUFFER (1280 bytes) PD[7:0] or PD[3:0] (8 or 4 bits) USB PA[7:0] (8 bits) PORT B PB[7:0] (8 bits) PORT C PC[7:0] (8 bits) DATA TRANSFER COPROCESSOR ADDRESS ANDDATABUS USBDP USBDM USBVCC ARBITRATION fCPU PORT A DTC S/W RAM (256 Bytes) PORT E PWM* PORT F PORT D I2 C* 16-BIT TIMER 8-BIT ADC* WATCH DOG RESET VPP CONTROL 8-BIT CORE ALU PROGRAM MEMORY (16K/32 Kbytes) * not on all products (refer to Table 1: Device Summary) 4/9 1 PF[6:0] (7 bits) FLASH SUPPLY BLOCK VDDF POWE R SUPPLY REGULATOR VDDA LVD RAM (1/5 KBytes) PE[7:0] (8 bits) DUAL SUPPLY MANAGER * VSSF VSSA VDD1,VDD2 VSS1, VSS2 USBV DD USBVSS ST7265 2 PIN DESCRIPTION OSCOUT OSCIN V SS2 V SSA V DDA V DD2 PF6 (HS) PF5 (HS) PF4 (HS) / USPF3 / AIN1 PF2 / AIN0 PF1 (HS) / SDA PF0 (HS) / SCL RESET V PP PE4 / PWM1 Figure 4. 64-Pin TQFP Package Pinout 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 2 46 3 1 4 5 6 7 8 ei1 9 10 11 45 44 43 42 41 40 39 38 37 12 36 13 35 14 ei0 34 15 33 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 PE3 / PWM0 / DTC PE2 (HS) / DTC PE1 (HS) / DTC PE0 (HS) / DTC PD7 PD6 PD5/OCMP2 PD4/OCMP1 PD3 PD2 PD1 PD0 PC7 PC6 PC5 PC4 DTC / PB6 DTC / PB7 DTC / PA0 DTC / PA1 DTC / PA2 DTC / PA3 DTC / PA4 DTC / PA5 DTC / PA6 DTC / PA7 MCO / PC0 DTC / PC1 DTC / PC2 DTC / PC3 VDD1 V SS1 USBV SS USBDM USBDP USBVCC USBV DD VDDF VSSF DTC / PE5 (HS) DTC / PE6 (HS) DTC / PE7 (HS) DTC / PB0 DTC / PB1 DTC / PB2 DTC / PB3 DTC / PB4 DTC / PB5 I/O pin supplied by VDDF / VSSF (HS) 10mA high sink capability ei x associated external interrupt vector 5/9 1 ST7265 PIN DESCRIPTION (Cont’d) Legend / Abbreviations: Type: I = input, O = output, S = supply VDDF powered: I/O powered by the alternate supply rail, supplied by VDDF and VSSF. In/Output level: CT = CMOS 0.3VDD/0.7VDD with input trigger Output level: HS = 10mA high sink (on N-buffer only) – Input:float = floating, wpu = weak pull-up, int = interrupt – Output: OD = open drain, T = true open drain, PP = push-pull, OP = pull-up enabled by option byte. Refer to “I/O Port Implementation” on page 51 of the datasheet for more details on the software configuration of the I/O ports. The RESET configuration of each pin is shown in bold. Port and control configuration: Port / Control Main Function (after reset) Alternate Function PP Output int wpu float Input OD Output Level Input Pin Name Type TQFP64 Pin VDDF Powered Table 1. Device Pin Description 1 USBV SS S USB Digital ground 2 USBDM I/O USB bidirectional data (data -) 3 USBDP I/O USB bidirectional data (data +) 4 USBVCC O USB power supply, output by the on-chip USB 3.3V linear regulator. 5 USBV DD S USB Power supply voltage (4V - 5.5V) Power Line for alternate supply rail. Can be used as input (with external supply) or output (when using the on-chip voltage regulator). Note: An external decoupling capacitor (min. 20nF) must be connected to this pin to stabilize the regulator. Ground Line for alternate supply rail. Can be used as input (with external supply) or output (when using the on-chip voltage regulator) DTC I/O with serial capability Port E5 (MMC_CMD) DTC I/O with serial capability Port E6 (MMC_DAT) DTC I/O with serial capability Port E7 (MMC_CLK) 6 VDDF S X 7 VSSF S X 8 PE5/DTC I/O X CT HS X2 X2 X 9 PE6/DTC I/O X CT HS X X X 10 PE7/DTC I/O X CT HS X X X 11 PB0/DTC I/O X CT X X Port B0 DTC 12 PB1/DTC I/O X CT X X Port B1 DTC 13 PB2/DTC I/O X CT X X Port B2 DTC 14 PB3/DTC I/O X CT X X Port B3 DTC 15 PB4/DTC I/O X CT X X Port B4 DTC 16 PB5/DTC I/O X CT X X Port B5 DTC 17 PB6/DTC I/O X CT X X Port B6 DTC 6/9 1 ST7265 Port / Control X 19 PA0/DTC I/O X CT X 20 PA1/DTC I/O X CT 21 PA2/DTC I/O 22 PA3/DTC I/O int wpu float Output Main Function (after reset) Alternate Function PP X CT Input OD I/O Output PB7/DTC Pin Name Input 18 TQFP64 VDDF Powered Level Type Pin X Port B7 DTC X X Port A0 DTC X X X Port A1 DTC X CT X X X Port A2 DTC X CT X X X Port A3 DTC ei0 23 PA4/DTC I/O X CT X X X Port A4 DTC 24 PA5/DTC I/O X CT X X X Port A5 DTC 25 PA6/DTC I/O X CT X X X Port A6 DTC 26 PA7/DTC I/O X CT X X X Port A7 DTC 27 PC0/MCO I/O X CT X X Port C0 Main Clock Output 28 PC1/DTC I/O X CT X X Port C1 29 PC2/DTC I/O X CT X X Port C2 30 PC3/DTC I/O X CT X X Port C3 31 VDD1 S Power supply voltage (2.4V - 5.5V) 32 VSS1 S Digital ground 33 PC4/DTC I/O CT X X Port C4 DTC 34 PC5/DTC I/O CT X X Port C5 DTC 35 PC6/DTC I/O CT X X Port C6 DTC 36 PC7/DTC I/O CT X X Port C7 DTC 37 PD0 I/O CT X X X Port D0 38 PD1 I/O CT X X X Port D1 39 PD2 I/O CT X X X Port D2 40 PD3 I/O CT X X X Port D3 DTC I/O with serial capability (DATARQ) DTC I/O with serial capability (SDAT) DTC I/O with serial capability (SCLK) ei1 41 PD4/OCMP1 I/O CT X X X Port D4 Timer Output Compare 1 42 PD5/OCMP2 I/O CT X X X Port D5 Timer Output Compare 2 43 PD6 I/O CT X X X Port D6 44 PD7 I/O CT X X X Port D7 45 PE0/DTC I/O CT HS X X Port E0 DTC 46 PE1/DTC I/O C T HS X X Port E1 DTC 47 PE2/DTC I/O C T HS X X Port E2 DTC 48 PE3/DTC/PWM0 I/O CT X X Port E3 DTC / PWM Output 0 7/9 49 PE4/PWM1 I/O Port / Control CT X Main Function (after reset) Alternate Function PP Output int wpu float Input OD Output Level Input Pin Name Type TQFP64 Pin VDDF Powered ST7265 X Port E4 PWM Output 1 Flash programming voltage. Must be held low in normal operating mode. Bidirectional. This active low signal forces the initialization of the MCU. This event is the top priority non maskable interrupt. This pin is switched low when the Watchdog has triggered or VDD is low. It can be used to reset external peripherals. 50 VPP 51 RESET I/O 52 PF0 / SCL I/O CT HS X T Port F0 I2C Serial Clock 1 53 PF1 / SDA I/O CT HS X T Port F1 I2C Serial Data1 54 PF2 / AIN0 I/O CT X X Port F2 Analog Input 01 55 PF3 / AIN1 I/O CT X X Port F3 Analog Input 1 56 PF4 / USBEN I/O CT HS X T Port F4 USB Power Management USB Enable (alternate function selected by option bit) 57 PF5 I/O CT HS X T Port F5 58 PF6 I/O CT HS X T Port F6 59 VDD2 S Main Power supply voltage (2.4V - 5.5V) 60 VDDA S Analog supply voltage 61 VSSA S Analog ground 62 VSS2 S Digital ground 63 OSCIN I 64 OSCOUT O Input/Output Oscillator pins. These pins connect a 12 MHz parallel-resonant crystal, or an external source to the on-chip oscillator. 1 S X X 1 If the peripheral is present on the device (see Table –) A weak pull-up can be enabled on PE5 input and open drain output by configuring the PEOR register and depending on the PE5PU bit in the option byte. 2 8/9 1 ST7265 Notes: Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without the express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2001 STMicroelectronics - All Rights Reserved. Purchase of I2 C Components by STMicroelectronics conveys a license under the Philips I2C Patent. Rights to use these components in an I2C system is granted provided that the system conforms to the I2C Standard Specification as defined by Philips. STMicroelectronics Group of Companies Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain Sweden - Switzerland - United Kingdom - U.S.A. http:// www.st.com 9/9