NSC LMV1089RL

LMV1089
Dual Input, Far Field Noise Suppression Microphone
Amplifier with Automatic Calibration Capability
General Description
Key Specifications
The LMV1089 is a fully analog dual differential input, differential output, microphone array amplifier designed to reduce
background acoustic noise, while delivering superb speech
clarity in voice communication applications.
The LMV1089 preserves near-field voice signals within 4cm
of the microphones while rejecting far-field acoustic noise
greater than 50cm from the microphones. Up to 20dB of farfield rejection is possible in a properly configured and calibrated system.
Part of the Powerwise™ family of energy efficient solutions,
the LMV1089 consumes only 1.1mA of supply current providing superior performance over DSP solutions consuming
greater than ten times the power.
A quick calibration during the manufacturing test process of
the product containing the LMV1089 compensates the entire
microphone system. This calibration compensates for mismatch in microphone gain and frequency response, as well
as acoustical path variances. The LMV1089 stores the calibration coefficients in the on-chip EEPROM. The calibration
is initiated by an I2C command or by a logic pin control.
The dual microphone inputs and the processed signal output
are differential to provide excellent noise immunity. The microphones are biased with an internal low-noise bias supply.
■ Far Field Noise Suppression
(Electrical), (f = 1kHz)
37dB
■ Supply Voltage
2.7V to 5.5V
■ Supply Current
1.1mA (typ)
■ Standby Current
0.7µA (typ)
■ Signal-to-Noise Ratio (A-weighted)
65dB (typ)
■ Total Harmonic Distortion + Noise
0.1% (typ)
■ PSRR (217Hz)
96dB (typ)
Features
■
■
■
■
■
■
■
■
Low power consumption
Shutdown function
No added processing delay
Differential inputs and outputs
Automatic calibration
Adjustable 6 - 48dB gain
Excellent RF immunity
Space-saving 36–bump micro SMD package
Applications
■
■
■
■
■
Headset and Boom microphones
Mobile handsets and two-way radios
Bluetooth and other powered headsets
Hand-held voice microphones
Equalized stereo microphone preamplifier
30047240
FIGURE 1.
© 2010 National Semiconductor Corporation
300472
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LMV1089 Dual Input, Far Field Noise Suppression Microphone Amplifier with Automatic
Calibration Capability
May 19, 2010
FIGURE 2. Typical Dual Microphone Far Field noise Cancelling Application
30047201
LMV1089
Typical Application
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2
LMV1089
Connection Diagrams
36–Bump micro SMD package
30047230
Top View
Order Number LMV1089RL
See NS Package Number RLA36TTA
micro SMD Package View
36–Bump micro SMD Marking
30047231
Top View
X = Plant Code
YY = Date Code
TT = Die Tracability
ZA2 = LMV1089RL
30047233
Bottom View
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LMV1089
Connection Diagrams
32 Lead LQFP package
30047227
Top View
Order Number LMV1089VY
See NS Package Number NVBE0032
32 Lead LQFP Marking
LQFP Package View
30047237
Top View
U = Wafer Fab Code
Z = Assembly Plant Code
XY = 2 Digit Date Code
TT = Die Traceability
LMV1089 = LMV1089VY
30047228
Bottom View
Ordering Information
Order Number
Package
Package Drawing
Number
Device Marking
Transport Media
LMV1089RL
36 Bump µSMD
RLA36TTA
XYYTTZA2
250 units on tape and reel
LMV1089RLX
36 Bump µSMD
RLA36TTA
XYYTTZA2
1000 units on tape and reel
LMV1089VY
32 Lead LQFP
NVBE0032
UZXYTT
250 units on tape and reel
LMV1089VYX
32 Lead LQFP
NVBE0032
UZXYTT
1000 units on tape and reel
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LMV1089
Pin Descriptions
TABLE 1. Pin Name and Function
Bump Number Pin Name
Pin Function
Pin Type
A1
NC
No connect
No Connect
A2
T7
Auxiliary Control Manual Calibration = VDD Auto Calibration = GND
Digital Input
A3
PE
Program Enable EEPROM
Digital Input
A4
MIC2–
microphone 2 negative input
Analog Input
A5
MIC2+
microphone 2 positive input
Analog Input
A6
Mic Bias
Microphone Bias
Analog Output
B1
NC
No Connect
No Connect
B2
NC
No Connect
No Connect
B3
T5
Float (do not connect to GND)
Production Test
B4
GND
amplifier ground
Ground
B5
M1_UNP
microphone 1 unprocessed output
Analog Output
B6
MIC1+
microphone 1 positive input
Analog Input
C1
NC
No Connect
No Connect
C2
NC
No Connect
No Connect
C3
GB0
default Post Amp Gain 0
Digital Input
C4
GA0
default Pre Amp Gain 0
Digital Input
C5
GND
amplifier ground
Ground
C6
MIC1–
amplifier ground
Analog Input
D1
ADR
I2C Address select
Digital Input
D2
NC
No Connect
No Connect
D3
GND
amplifier ground
Ground
D4
GA1
default Pre Amp Gain 1
Digital Input
D5
M2_UNP
microphone 2 unprocessed output
Analog Output
D6
REF
reference voltage de-coupling
Analog Reference
E1
SCL
I2C clock
Digital Input
E2
GB1
default Post Amp Gain 1
Digital Input
E3
NC
No Connect
No Connect
E4
OUT+
positive optimized audio output
Analog Output
E5
LPF+
Low Pass Filter for positive output
Analog Input
E6
EN
chip enable
Digital Input
F1
SDA
F2
I2CVDD
I2C
data
I2C power supply
Digital Input/Output
Supply
F3
VDD
power supply
Supply
F4
OUT-
negative optimized audio output
Analog Output
F5
LPF-
Low Pass Filter for negative output
Analog Input
F6
CAL
calibration enable
Digital Input
5
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LMV1089
Thermal Resistance
Absolute Maximum Ratings (Note 1)
70°C/W
θJA (microSMD)
Soldering Information See AN-112 “microSMD Wafers Level
Chip Scale Package.”
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
Storage Temperature
Power Dissipation (Note 3)
ESD Rating (Note 4)
ESD Rating (Note 5)
Junction Temperature (TJMAX)
Mounting Temperature
Infrared or Convection (20 sec.)
6.0V
-85°C to +150°C
Internally Limited
2000V
200V
150°C
235°C
Operating Ratings
(Note 2)
2.7V ≤ VDD ≤ 5.5V
Supply Voltage
I2CVDD
Supply Voltage (Note 8)
Temperature Range
1.7V ≤ I2CVDD ≤ 5.5V
TMIN ≤ TA ≤ TMAX
−40°C ≤ TA ≤ +85°C
−40°C to 85°C
Electrical Characteristics 3.3V (Note 1)
Unless otherwise specified, all limits guaranteed for TJ = 25°C, VDD = 3.3V, VIN = 18mVP-P, f = 1kHz, EN = VDD, pass through mode
(Note 8), Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF, CREF = 10nF
LMV1089
Symbol
Parameter
Conditions
Typical Limits
(Note 6) (Note 7)
Units
(Limits)
f = 1kHz, VIN = 18mVP-P
63
dB
Signal-to-Noise Ratio
f = 1kHz, VIN = 18mVP-P, A-Weighted
voice band (300 – 3400Hz)
65
dB
eN
Input Referred Noise level
A-weighted
5
μVRMS
VIN
Maximum Input Signal
THD+N < 1%, Pre Amp Gain = 6dB
SNR
VOUT
Maximum AC Output Voltage
DC Level at Outputs
THD+N Total Harmonic Distortion + Noise
ZIN
ZOUT
ZLOAD
f = 1kHz, Differential Out+, OutTHD+N < 1%
Out+, OutDifferential Out+ and Out-
Input Impedance
850
mVP-P (min)
1.2
1.1
VRMS (min)
800
0.1
mV
0.2
142
Output Impedance
Load Impedance (Out+, Out-)
910
kΩ
Ω
300
RLOAD
CLOAD
AM
Microphone Preamplifier Gain Range
AMR
Microphone Preamplifier Gain Adjustment
Resolution
f = 1kHz
AP
Post Amplifier Gain Range
Pass Through Mode and Summing Mode
APR
Post Amplifier Gain Resolution
ACR
Gain Compensation Range
10
100
kΩ (min)
pF (max)
1.7
2.3
dB (min)
dB (max)
6 – 36
2
f = 300Hz
f = 1kHz
f = 3kHz
AMD
Maximum Gain Matching Difference After
Calibration
XTalk
Crosstalk Attenuation between Mic1 and Mic2 Measured at M1_UNP and M2_UNP
TCAL
Calibration Duration
dB
6 – 18
3
% (max)
dB
2.6
3.4
dB (min)
dB (max)
±3
dB
0.5
0.25
0.5
dB
dB
dB
52
41
dB (min)
790
ms (max)
FFNSE Far Field Noise Suppression Electrical
f = 1kHz (See Test Method)
f = 300Hz (See Test Method)
32
37
20
22
dBV(min)
dBV (min)
SNRIE Signal-to-Noise Ratio Improvement Electrical
f = 1kHz (See Test Method)
f = 300Hz (See Test Method)
24
28
14
15
dBV (min)
dBV (min)
fRIPPLE = 217Hz (VRIPPLE = 100mVP-P)
96
85
dB (min)
fRIPPLE = 1kHz (VRIPPLE = 100mVP-P)
91
80
dB (min)
f = 1kHz
60
Input Referred, Input AC grounded
PSRR Power Supply Rejection Ratio
CMRR Common Mode Rejection Ratio
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6
dB
Microphone Bias Supply Voltage
IBIAS = 1mA
2.0
eVBM
Microphone Bias Noise Level
A-Weighted, 10nF cap at VREF pin
10
1.85
2.15
V (min)
V (max)
1.2
mA (min)
1.5
mA (max)
μVRMS
IBM
Total available Microphone Bias Current
IDDQ
Supply Quiescent Current
VIN = 0V
1.1
IDD
Supply Current
VIN = 25mVP-P both inputs, Noise cancelling
mode
1.1
ISD
Shut Down Current
EN pin = GND
0.7
1
μA (max)
IDDCP
Supply Current during Calibration and
Programming
Calibrating or Programming EEPROM
30
45
mA (max)
IDDI2C
I2C supply current
I2C Idle Mode
25
100
nA (max)
mA
TON
Turn On Time
40
ms (max)
TOFF
Turn Off Time
60
ms (max)
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LMV1089
VBM
LMV1089
Electrical Characteristics 5.0V
(Note 1)
Unless otherwise specified, all limits guaranteed for TJ = 25°C, VDD = 5V, VIN = 18mVP-P, EN = VDD, pass through mode (Note 8),
Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF.
Symbol
Parameter
Conditions
LMV1089
Typical
Limit
Units
(Limits)
(Note 6) (Note 7)
f = 1kHz, VIN = 18mVP-P
63
dB
Signal-to-Noise Ratio
f = 1kHz, VIN = 18mVP-P, A-Weighted
voice band (300 – 3400Hz)
65
dB
eN
Input Referred Noise level
A-weighted
VIN
Maximum Input Signal
f = 1kHz, THD+N < 1%
918
850
mVP-P (min)
Maximum AC Output Voltage
f = 1kHz, THD+N < 1%
between differential output
1.2
1.1
VRMS (min)
0.2
% (max)
SNR
VOUT
DC Output Voltage
THD+N Total Harmonic Distortion + Noise
ZIN
μVRMS
5
800
f = 1kHz VIN = 18mVP-P
Input Impedance
0.1
mV
142
kΩ
300
Ω
AM
Microphone Preamplifier Gain Range
f = 1kHz
6 – 36
dB
AMR
Microphone Preamplifier Gain Adjustment
Resolution
f = 1kHz
2
Post Amplifier Gain Range
f = 1kHz Pass Through Mode and Summing
Mode
ZOUT
AP
APR
ACR
Output Impedance
Post Amplifier Gain Adjustment Resolution
f = 1kHz
6 – 18
3
Gain Compensation Range
f = 1kHz
AMD
Maximum Gain Matching Difference After
Calibration
f = 300Hz
f = 2kHz
f = 3kHz
TCAL
Calibration Duration
1.7
2.3
dB (min)
dB (max)
dB
2.6
3.4
dB (min)
dB (max)
±3
dB
0.5
0.25
0.5
dB
dB
dB
790
ms (max)
FFNSE Far Field Noise Suppression Electrical
f = 1kHz (See Test Method)
f = 300Hz (See Test Method)
32
37
20
22
dBV
dBV
SNRIE Signal-to-Noise Ratio Improvement Electrical
f = 1kHz (See Test Method)
f = 300Hz (See Test Method)
24
28
14
15
dBV
dBV
fRIPPLE = 217Hz (VRIPPLE = 100mVP-P)
96
85
dB (min)
fRIPPLE = 1kHz (VRIPPLE = 100mVP-P)
91
80
dB (min)
Input Referred, Input AC grounded
PSRR Power Supply Rejection Ratio
CMRR Common Mode Rejection Ratio
f = 1kHz
62
dB
VBM
Microphone Bias Supply Voltage
IBIAS = 1mA
2.0
V
eVBM
Microphone Bias Noise Level
A-Weighted
10
μVRMS
IBM
Total Available Microphone Bias Current
IDDQ
Supply Quiescent Current
VIN = 0V
1.1
IDDCP
Supply Current during Calibration and
Programming
Calibrating or Programming EEPROM
30
mA (max)
IDD
Supply Current
VIN = 25mVP-P both inputs, Noise cancelling
mode
1.1
mA (max)
EN pin = GND
1.6
1.2
mA (min)
1.5
mA (max)
μA
ISD
Shut Down Current
TON
Turn On Time
40
ms (max)
TOFF
Turn Off Time
60
ms (max)
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LMV1089
Digital Interface Characteristics
(Note 1, Note 8)
Unless otherwise specified, all limits guaranteed for TJ = 25°C, I2CVDD within the Operating Rating (Note 8)
LMV1089
Symbol
Parameter
VIH
Logic High Input Level
VIL
Logic Low Input Level
tsCAL
CAL Setup Time
thCAL
CAL Hold time until calibration is
finished
tsPEC
PE Setup Time
thPEC
PE Hold until calibration is finished
Conditions
Typical
(Note 6)
Units
(Limits)
Limit
(Note 7)
0.75xI2CVDD
EN, TM, SCL, SDA, ADR, CAL, PE
0.6xVDD
GA0, GA1, GB0, GB1
0.25xI2CVDD
EN, TM, SCL, SDA, ADR, CAL, PE
0.4xVDD
GA0, GA1, GB0
2
V (min)
V (max)
ms
790
ms (min)
2
ms
790
ms (min)
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the
device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 3: The maximum power dissipation must be de-rated at elevated temperatures and is dictated by TJMAX, θJC, and the ambient temperature TA. The maximum
allowable power dissipation is PDMAX = (TJMAX – TA) / θJA or the number given in the Absolute Maximum Ratings, whichever is lower. For the LMV1089, TJMAX =
150°C and the typical θJA for this microSMD package is 70°C/W and for the LLP package θJA is 64°C/W Refer to the Thermal Considerations section for more
information.
Note 4: Human body model, applicable std. JESD22-A114C.
Note 5: Machine model, applicable std. JESD22-A115-A.
Note 6: Typical values represent most likely parametric norms at TA = +25°C, and at the Recommended Operation Conditions at the time of product
characterization and are not guaranteed.
Note 7: Datasheet min/max specification limits are guaranteed by test, or statistical analysis.
Note 8: The voltage at I2CVDD must not exceed the voltage on VDD.
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LMV1089
Test Methods
30047212
FIGURE 3. FFNSE, NFSLE, SNRIE Test Circuit
two microphones (see Figure 16). In this configuration the
speech signal at the microphone closest to the sound source
will have greater amplitude than the microphone further away.
Additionally the signal at microphone further away will experience a phase lag when compared with the closer microphone. To simulate this, phase delay as well as amplitude
shift was added to the NFSLE test. The schematic from Figure
3 is used with the following procedure to measure the NFSLE.
1. A 25mVP-P and 17.25mVP-P (0.69*25mVP-P) sine wave is
applied to Mic1 and Mic2 respectively. Once again, a
signal generator is used to delay the phase of Mic2 by
15.9° when compared with Mic1.
2. Measure the output level in dBV (X)
3. Mute the signal from Mic2
4. Measure the output level in dBV (Y)
5. NFSLE = Y - X dB
FAR FIELD NOISE SUPPRESSION (FFNSE)
For optimum noise suppression the far field noise should be
in a broadside array configuration from the two microphones
(see Figure 15). Which means the far field sound source is
equidistance from the two microphones. This configuration
allows the amplitude of the far field signal to be equal at the
two microphone inputs, however a slight phase difference
may still exist. To simulate a real world application a slight
phase delay was added to the FFNSE test. The block diagram
from Figure 3 is used with the following procedure to measure
the FFNSE.
1. A sine wave with equal frequency and amplitude
(25mVP-P) is applied to Mic1 and Mic2. Using a signal
generator, the phase of Mic 2 is delayed by 1.1° when
compared with Mic1.
2. Measure the output level in dBV (X)
3. Mute the signal from Mic2
4. Measure the output level in dBV (Y)
5. FFNSE = Y - X dB
SINGLE TO NOISE RATIO IMPROVEMENT ELECTRICAL
(SNRIE)
The SNRIE is the ratio of FFNSE to NFSLE and is defined as:
SNRIE = FFNSE - NFSLE
NEAR FIELD SPEECH LOSS (NFSLE)
For optimum near field speech preservation, the sound
source should be in an endfire array configuration from the
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Unless otherwise specified, TJ = 25°C, VDD = 3.3V, Input Voltage
= 18mVP-P, f =1 kHz, pass through mode (Note 8), Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF.
THD+N vs Frequency
Mic1 = AC GND, Mic2 = 36mVP-P
Noise Canceling Mode
THD+N vs Frequency
Mic2 = AC GND, Mic1 = 36mVP-P
Noise Canceling Mode
30047248
30047247
THD+N vs Frequency
Mic1 = 36mVP-P
Mic1 Pass Through Mode
THD+N vs Frequency
Mic2 = 36mVP-P
Mic2 Pass Through Mode
30047250
30047249
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LMV1089
Typical Performance Characteristics
LMV1089
THD+N vs Input Voltage
Mic1 = AC GND, f = 1kHz
Mic2 Noise Canceling Mode
THD+N vs Input Voltage
Mic2 = AC GND, f = 1kHz
Mic1 Noise Canceling Mode
30047252
30047251
THD+N vs Input Voltage
f = 1kHz
Mic1 Pass Through Mode
THD+N vs Input Voltage
f = 1kHz
Mic2 Pass Through Mode
30047253
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30047254
12
PSRR vs Frequency
Pre Amp Gain = 20dB, Post Amp Gain = 6dB
VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND
Mic2 Pass Through Mode
30047244
30047245
PSRR vs Frequency
Pre Amp Gain = 20dB, Post Amp Gain = 6dB
VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND
Noise Canceling Mode
Far Field Noise Suppression Electrical vs Frequency
30047255
30047245
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LMV1089
PSRR vs Frequency
Pre Amp Gain = 20dB, Post Amp Gain = 6dB
VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND
Mic1 Pass Through Mode
LMV1089
Signal-to-Noise Ratio Electrical vs Frequency
30047256
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INTRODUCTION
The LMV1089 is a fully analog single chip solution to reduce
the far field noise picked up by microphones in a communi-
30047224
FIGURE 4. Simplified Block Diagram of the LMV1089
The output signal of the microphones is first amplified by a
pre-amplifier stage with an adjustable gain of 6dB to 36dB.
The signal is then processed by the noise cancelling processor. The noise cancelling processor matches the gain and
frequency responses of the microphones and the acoustic
characteristics of the enclosure using coefficients derived
during the auto-calibration step and the stored in EEPROM.
The resulting noise-suppressed signal is then amplified by the
6dB to 18dB gain-adjustable post-amplifier. For optimum
noise and EMI immunity, the microphones have a differential
connection to the LMV1089 and the output of the LMV1089
is also differential. The adjustable gain functions can be controlled via I2C and four control pins. Both methods are described later in the application section.
vides two individual microphone power down functions. When
either one of the shutdown functions is activated the part will
go into shutdown mode consuming only a few μA of supply
current.
SHUTDOWN VIA HARDWARE PIN
The hardware shutdown function is operated via the EN pin.
In normal operation the EN pin must be at a 'high' level
(VDD). Whenever a 'low' level (GND) is applied to the EN pin
the part will go into shutdown mode disabling all internal circuits.
SHUTDOWN VIA I2C
The LMV1089 offers an additional shutdown function by reprogramming an I2C register (see Table 6). The LMV1089 will
only consume power in a mode where it can perform its normal functions. So at least one of the microphone amplifier
circuits must be enabled ('1'). Writing '0' to the both bit 4 and
bit 5 of the I2C 'A' register (address 0x01h) of the LMV1089
will force the part into shutdown mode, even if the EN pin is
'High', the only part that remains active in this state is the I2C,
which consumes neglectible power when compared to the
standby current.
Power Supply Circuits
A low drop-out (LDO) voltage regulator in the LMV1089 allows
the device to be independent of supply voltage variations.
The Power On Reset (POR) circuitry in the LMV1089 requires
the supply voltage to rise from 0V to VDD in less than 100ms.
The Mic Bias output is provided as a low noise supply source
for the electret microphones. The noise voltage on the Mic
Bias microphone supply output pin depends on the noise voltage on the internal the reference node. The de-coupling
capacitor on the VREF pin determines the noise voltage on this
internal reference. This capacitor should be larger than 1nF;
having a larger capacitor value will result in a lower noise
voltage on the Mic Bias output.
Most of the logic levels for the digital control interface are relative to I2CVDD voltage. This eases interfacing to the micro
controller of the application containing the LMV1089. The
supply voltage on the I2CVDD pin must never exceed the voltage on the VDD pin.
Only the four pins that determine the default power up gain
(as described in SETTING ADJUSTABLE GAIN) have logic
levels relative to VDD.
Adjustable Gain
The LMV1089 has two gain stages where the gain can be
adjusted to meet the requirements for the application. There
is a preamplifier and a post amplifier that can be varied independent of each other. In most applications the gain will be
set via the I2C interface, see Table 6.
SETTING ADJUSTABLE GAIN
The LMV1089 provides four pins to set the default gain settings during power up of the device, which is convenient for
applications without a micro controller . The default gain of the
preamplifier is controlled by the GA0 and GA1 pins and can
be set by wiring those pins to either VDD or GND. In this way,
one of the four possible values in the 12dB to 36dB range (see
Table 2) can be chosen. The default post amplifier gain is set
in the same way by connecting the GB0 and GB1 pins to either VDD or GND to select a gain between 6dB and 15dB (see
Table 3). Setting the gain of the preamplifier and post amplifier
Shutdown Function
As part of the Powerwise™ family, the LMV1089 consumes
only 1.1mA of current. In many applications the part does not
need to be continuously operational. To further reduce the
power consumption in the inactive period, the LMV1089 pro15
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LMV1089
cation system. A simplified block diagram is provided in
Figure 4.
Application Data
LMV1089
via the I2C interface (see Table 6) will override this default
gain.
The default gain is only set during power up of the device.
Toggling the logic level of the enable pin (EN) will not change
the current gain setting of the part. Any gain setting done via
the I2C interface will remain valid during activation of the function.
TABLE 3. Default post amplifier gain
TABLE 2. Default preamplifier gain
GA1
GA0
0
0
12dB
0
1
20dB (Note 9)
1
0
28dB
1
1
36dB
GB1
GB0
Gain
0
0
6dB (Note 9)
0
1
9dB
1
0
12dB
1
1
15dB
Note 9: Default value used for performance measurements
Gain
setting in the preamplifier will result in clipping and saturation
in the noise cancelling processor and output stages.
The gain ranges and maximum signal levels for the different
functional blocks are shown in Figure 5. Two examples are
given as a guideline on how to select proper gain settings.
Gain Balance and Gain Budget
In systems where input signals have a high dynamic range,
critical noise levels or where the dynamic range of the output
voltage is also limited, careful gain balancing is essential for
the best performance. Too low of a gain setting in the preamplifier can result in higher noise levels while too high of a gain
30047241
FIGURE 5. Maximum Signal Levels
3.5VP-P at the output of the LMV1089. This level is higher
then maximum level that is allowed at the input of the post
amp of the LMV1089. Therefore the preamp gain has to
be reduced, to 1.4VP-P minus 9dB = 0.5VP-P. This limits
the preamp gain to a maximum of 20dB.
5. The baseband chip limits the maximum output voltage to
1.5VP-P with the minimum of 6dB post amp gain, this
results in requiring a lower level at the input of the post
amp of 0.75VP-P. Now calculating this for a maximum
NCP gain of 9dB the output of the preamp must be
<266mVP-P.
6. Calculating the new gain for the preamp will result in
<1.4dB gain.
7. The nearest lower gain will be 14dB.
So using preamp gain = 14dB and postamp gain = 6dB is the
optimum for this application.
Example 1
An application using microphones with 50mVP-P maximum
output voltage, and a baseband chip after the LMV1089 with
1.5VP-P maximum input voltage.
For optimum noise performance, the gain of the input stage
should be set to the maximum.
1. 50mVP-P +36 dB = 3.1VP-P.
2. 3.1VP-P is higher than the maximum 1.4VP-P allowed for
the Noise Cancelling Processor (NCP). This means a
gain lower than 28.9dB should be selected.
3. Select the nearest lower gain from the gain settings
shown in Table 2, 28dB is selected. This will prevent the
NCP from being overloaded by the microphone. With this
setting, the resulting output level of the Pre Amplifier will
be 1.26VP-P.
4. The NCP can have a maximum processing gain of 9dB
(depending on the calibration result) which will result in
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16
LMV1089
Example 2
An application using microphones with 10mVP-P maximum
output voltage, and a baseband chip after the LMV1089 with
3.3VP-P maximum input voltage.
For optimum noise performance we would like to have the
maximum gain at the input stage.
1. 10mVP-P + 36dB = 631mVP-P.
2. This is lower than the maximum 1.4VP-P so this is OK.
3. The NCP can have a maximum processing gain of 9dB
(depending on the calibration result) which will result in
3.5VP-P at the output of the LMV1089. This level is higher
then maximum level that is allowed at the input of the
Post Amp of the LMV1089. Therefore the Pre Amp gain
has to be reduced, to 1.4VP-P minus 9dB = 0.5VP-P. This
limits the Pre Amp gain to a maximum of 34dB.
4. With a Post Amp gain setting of 6dB the output of the
Post Amp will be 2.8VP-P which is OK for the baseband.
5. The nearest lower Post Amp gain will be 6dB.
So using preamp gain = 34dB and postamp gain = 6dB is
optimum for this application.
300472q1
I2C Signals: Data Validity
I2C START AND STOP CONDITIONS
START and STOP bits classify the beginning and the end of
the I2C data transmission session. START condition is defined as the SDA signal transitioning from HIGH to LOW while
SCL line is HIGH. STOP condition is defined as the SDA transitioning from LOW to HIGH while SCL is HIGH. The I2C
master always generates START and STOP bits. The I2C bus
is considered to be busy after START condition and free after
STOP condition. During data transmission, I2C master can
generate repeated START conditions. First START and repeated START conditions are equivalent, function-wise.(Note
10)
Unprocessed Output Pins
The LMV1089 provides two single ended output pins
M1_UNP and M2_UNP. These pins provide the amplified
output signal from the two differential microphone input amplifiers Mic1 and Mic2. When the application containing the
LMV1089 is in a calibrated state the output level of the two
microphone paths are matched. This makes these outputs
suitable for stereo applications like video camera webcams
and photo cameras. Low cost microphones with wider gain
tolerance can be used because gain differences of the microphones will be compensated by the calibration system of
the LMV1089. In this situation the default gain of the Pre Amplifiers is set by GA0 and GA1 as described in Table 2. This
gain can be changed via I2C by writing register A as described
in the I2C Compatible Interface section.
300472q2
I2C Start Stop Conditions
Note 10: The master should issue STOP after no acknowledgment.
TRANSFERRING DATA
Every byte put on the SDA line must be eight bits long, with
the most significant bit (MSB) being transferred first. Each
byte of data has to be followed by an acknowledge bit. The
acknowledge related clock pulse is generated by the master.
The transmitter releases the SDA line (HIGH) during the acknowledge clock pulse. The receiver must pull down the SDA
line during the 9th clock pulse, signifying an acknowledge
(ACK). A receiver which has been addressed must generate
an acknowledge after each byte has been received.
After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an eighth
bit which is a data direction bit (R/W). The LMV1089 address
is 110011002 or 110011102. For the eighth bit, a “0” indicates
a WRITE and a “1” indicates a READ. The second byte selects the register to which the data will be written. The third
byte contains data to write to the selected register.
I2C Compatible Interface
I2C SIGNALS
The LMV1089 pin Serial Clock (SCL) pin is used for the I2C
clock and the Serial Data (SDA) pin is used for the I2C data.
Both these signals need a pull-up resistor according to I2C
specification. The LMV1089 can be controlled through two
slave addresses. The digital I2C address pin selects the I2C
address for LMV1089 as shown inTable 4 .
TABLE 4. Chip Address
D7
D6
D5
1st Chip
Address
I2C
Adress='0'
D4 D3
1
1
0
0
2nd Chip
Address
I2C
Adress='1'
1
1
0
0
D2
D1
D0
1
1
0
W/R
1
1
1
W/R
I2C DATA VALIDITY
The data on SDA line must be stable during the HIGH period
of the clock signal (SCL). In other words, the state of the data
line can only be changed when SCL is LOW.
300472q3
I2C Chip Address
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LMV1089
Register changes take effect at the SCL rising edge during
the last ACK from slave.
In Figure 6, a write example is shown, for a device with a randomly chosen address'001101002'.
300472q5
w = write (SDA = “0”)
r = read (SDA = “1”)
ack = acknowledge (SDA pulled down by slave)
rs = repeated start
FIGURE 6. Example I2C Write Cycle
When a READ function is to be accomplished, a WRITE function must precede the READ function, as shown in the Read
Cycle waveform. Figure 7 shows this read example for a randomly chosen address'001101012.
300472q6
FIGURE 7. Example I2C Read Cycle
300472q9
FIGURE 8. I2C Timing Diagram
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18
Symbol
Limit
Parameter
Min
Max
Units
1
Hold Time (repeated) START Condition
0.6
µs
2
Clock Low Time
1.3
µs
3
Clock High Time
600
ns
4
Setup Time for a Repeated START Condition
600
5
Data Hold Time (Output direction, delay generated by LMV1089)
300
1100
ns
5
Data Hold Time (Input direction, delay generated by the Master)
0
1100
ns
6
Data Setup Time
300
7
Rise Time of SDA and SCL
20
300
ns
8
Fall Time of SDA and SCL
15
300
ns
9
Set-up Time for STOP condition
600
10
Bus Free Time between a STOP and a START Condition
1.3
Cb
Capacitive Load for Each Bus Line
10
ns
ns
ns
µs
200
pF
NOTE: Data guaranteed by design
19
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LMV1089
TABLE 5. I2C Timing Paramters
LMV1089
TABLE 6. I2C Register Description
Address
Reg.
Bits
Description
Default
Microphone preamplifier gain from 6dB up to 36dB in 2dB steps.
0000
A
[3:0]
0x01h
6dB
0001
8dB
0010
10dB
0011
12dB
0100
14dB
0101
16dB
0110
18dB
0111
20dB
1000
22dB
1001
24dB
1010
26dB
1011
28dB
1100
30dB
1101
32dB
1110
34dB
1111
36dB
See Table 2
A
[5:4]
A4 = mute mic1 and A5 = mute mic2.
( 0 = microphone on)
00(on)
A
[7:6]
Mic enable bits, A6 = enable Mic1, A7 = enable Mic2
(1 = enable), A6 and A7 both 0 = Shutdown Mode
11(on)
Gain setting for the post amplifier from (3dB steps)
000
B
6db
001
9dB
010
12dB
[2:0] 011
15dB
100
18dB
101
18dB
110
18dB
111
18dB
0x02h
See Table 3
Mic select bits
B
[4:3]
0
0
Noise cancelling mode
0
1
Only Mic1 enabled
1
0
Only Mic2 enabled
1
1
Mic1 + Mic2
00
B
[7:5] Not Used
0x0Ch
L
[7:0] reads the output of the EEPROM
read only
0x0Dh
M
[7:0] reads the output of the EEPROM
read only
N
[6:0] reads the output of the EEPROM
read only
0x0Efh
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N
[7]
000
Reads the “ready” signal. This give the status of the program cycle.
1 = ready ; 0 = program cycle in progress
20
read only
Reg.
Bits
Description
Default
[3:0] Control the gain compensation between the two mics at 3kHz
0x0Fh
O
0000 (0)
0.0dB
0001 (1)
0.5dB
0010 (2)
1.0dB
0011 (3)
1.5dB
0100 (4)
2.0dB
0101 (5)
2.5dB
0110 (6)
3.0dB
0111 (7)
3.0dB
1000 (8)
0dB
1001 (9)
–0.5dB
1010 (A)
–1.0dB
1011 (B)
–1.5dB
1100 (C)
–2.0dB
1110 (D)
–2.5dB
1110 (E)
–3.0dB
1111 (F)
–3.0dB
0000
[7:4] Control the gain compensation between the two mics at 300Hz
0000 (0)
0.0dB
0001 (1)
0.5dB
0010 (2)
0.0dB
0011 (3)
1.5dB
0100 (4)
2.0dB
0101 (5)
2.5dB
0110 (6)
3.0dB
0111 (7)
3.0dB
1000 (8)
0dB
1001 (9)
–0.5dB
1010 (A)
–1.0dB
1011 (B)
–1.5dB
1100 (C)
–2.0dB
1101 (D)
–2.5dB
1110 (E)
–3.0dB
1111 (F)
–3.0dBd
0000
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LMV1089
Address
LMV1089
Address
Reg.
Bits
Description
Default
[3:0] Control compensation gain for left channel at ALL frequencies
0x10h
P
0000 (0)
–3.0dB
0001 (1)
–3.0dB
0010 (2)
–2.5dB
0011 (3)
–2.0dB
0100 (4)
–1.5dB
0101 (5)
–1.0dB
0110 (6)
–0.5dB
0111 (7)
0.0dB
1000 (8)
0.0dB
1001 (9)
0.5dB
1010 (A)
1.0dB
1011 (B)
1.5dB
1100 (C)
2.0dB
1101 (D)
2.5dB
1110 (E)
3.0dB
1111 (F)
3.0dB
1111
[7:4] Control compensation gain for right channel at ALL frequencies
0000 (0)
–3.0dB
0001 (1)
–3.0dB
0010 (2)
–2.5dB
0011 (3)
–2.0dB
0100 (4)
–1.5dB
0101 (5)
–1.0dB
0110 (6)
–0.5dB
0111 (7)
0.0dB
1000 (8)
0.0dB
1001 (9)
0.5dB
1010 (A)
1.0dB
1011 (B)
1.5dB
1100 (C)
2.0dB
1101 (D)
2.5dB
1110 (E)
3.0dB
1111 (F)
3.0dB
1111
[6:0] Values are clocked into EEPROM registers once “newdata” pulse is generated
0x11h
Q
0x12h
R
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[7]
StoreBar signal
StoreBar = 0 enables EEPROM programming
StoreBar = 1 data clock into EEPROM registers
1
[0]
Start Calibration via I2C ‘0’ to ‘1’ = start calibration (keep ‘1’ during calibration)
0
[7]
Internal test
0000000
22
Automatic calibration should only be required once, when the
product containing the LMV1089 has completed manufacture, and prior to application packaging. The product containing the LMV1089 will be calibrated to the microphones, the
microphone spacings, and the acoustical properties of the final design.
The compensation or calibration technology is achieved via
memory stored coefficients when the FFNS circuitry activates
the calibration sequence. The purpose of the calibration sequence is to choose the optimized coefficients for the FFNS
circuitry for the given microphones, spacing, and acoustical
design of the product containing the LMV1089.
A basic calibration can be performed with a single 1kHz tone,
however to take full advantage of this calibration feature a
three tone calibration (See PERFORMING A THREE TONE
CALIBRATION) is preferred .
The automatic calibration process can be initiated from either
a digital interface CALIBRATE pin (CAL) or via the I2C interface.
The logic level at the PROGRAM ENABLE (PE) pin determines if the result of the calibration is volatile or permanent.
AUTOMATIC CALIBRATION VIA CAL PIN
To initiate the automatic calibration via the CAL pin, the following procedure is required. See timing diagram Figure 11:
• From the initial condition where both PE and CAL are at
'low' level
• bring PE to a 'high' level (enable EEprom write)
• bring CAL to a 'high' level to start Calibration
• Apply Audio stimulus (single tone 1kHz or three tone
sequence as described in PERFORMING A THREE
TONE CALIBRATION) (see Figure 12).
• Hold CAL 'high' for at least 790ms
• Remove Audio stimulus
• bring CAL to a 'low' level to stop Calibration
• bring PE to a 'low' level (disable EEprom write)
A tone may be applied prior to the rising of CAL and PE. Signals applied to the microphone inputs before rising of CAL
and PE are ignored by the calibration system.
300472r1
FIGURE 9. Automatic Calibration via CAL pin
Note: When the I2C is operated, make sure that register 'R' (address
0x12) bit 0 is '0' before operating the CAL pin (default value for
this bit). When this bit is set '1' the calibration engine of the
LMV1089 is started and will remain active with a higher supply
current than normal operation. The state of the calibration remains active until this bit is reset, '0”. With the bit set the 'low'
to' high' transfer of the CAL pin will be ignored.
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LMV1089
To make the result of the calibration permanent (stored in the
EEPROM) the PROGRAM ENABLE (PE) pin must be high
during the automatic calibration process.
Calibration
LMV1089
• Wait at least 790ms
• Remove Audio stimulus
• Write '0' into I2C to finish calibration
• Bring PE to a 'low' level (disable EEprom write)
A tone may be applied prior to the rising of PE or setting the
I2C calibration bit . Signals applied to the microphone inputs
before rising of PE or setting the I2C calibration bit are ignored
by the calibration system.
AUTOMATIC CALIBRATION VIA I2C COMMAND
To initiate the automatic calibration via the I2C interface, the
following procedure is required:
• From the initial condition where PE is 'low' level
• Bring PE to a 'high' level (enable EEprom write)
• Write '1' into I2C register 'R' (address 0x12) bit 0 to start
calibration
• Apply Audio stimulus (single tone 1kHz or three tone
sequence as described in PERFORMING A THREE
TONE CALIBRATION)
300472r2
FIGURE 10.
tone or a 1kHz tone that is switched on and off using the timing
from Figure 11.
To perform a one tone calibration, a 1kHz test tone is required
right after the PE and CAL inputs are brought to a logic high
level and that tone should be stable during the time as indicated in Table 7. At the end of this sequence the calibration
data is automatically stored in the internal EEPROM (see Figure 12).
A tone may be applied prior to the rising of CAL start signal
and PE. Signals applied to the microphone outside the limits
shown in Figure 11 and Table 7 are ignored by the calibration
system.
PERFORMING THE AUTOMATIC CALIBRATION
Automatic calibration can be performed as 'one tone' or as
'three tone' calibration. Three tone calibration is preferred because the three tone calibration not only compensates for
differences in the gain between the two microphones, but this
function also corrects for differences in the frequency response between in the two microphones and compensates
for the acoustical effects of the enclosure.
The one tone calibration only compensates for the gain difference between the two microphones at 1kHz and can lead
to less far field noise reduction when compared to three tone
calibration.
PERFORMING A ONE TONE CALIBRATION
The easiest way to perform an automatic calibration with the
LMV1089 uses a 1kHz tone. This tone can be a steady state
300472r4
FIGURE 11. One Tone Calibration Timing
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24
300472r3
FIGURE 12. Calibration Timing
TABLE 7. Automatic Calibration Timing Parameters
Symbol
Limits
Parameter
Min
Max
Unitis
tST1
Calibration Start Tone 1
tET1
Calibration End Tone 1
tST2
Calibration Start Tone 2
tET2
Calibration End Tone 2
tST3
Calibration Start Tone 3
tET3
Calibration End Tone 3
600
ms
tCC
Calibration Complete
790
ms
10
200
ms
ms
210
400
ms
ms
410
ms
NOTE: Data guaranteed by design
25
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LMV1089
• A second tone with a frequency of 300Hz
• A third tone with a frequency of 3kHz
A tone may be applied prior to the rising of CAL start signal
and PE. Signals applied to the microphone outside the limits
shown in Figure 12 and Table 7 are ignored by the calibration
system.
Between each tone pair there is a small time, indicated by a
cross, to change the frequency. During that time the input tone
is ignored by the calibration system.
The total calibration sequence requires less than 790ms.
PERFORMING A THREE TONE CALIBRATION
In a system with two microphones in an enclosure there will
always be a difference in the transfer function in both gain and
frequency response between the two channels. The
LMV1089 has the capability to perform an automatic calibration function to minimize these differences. To perform this
calibration, a test sequence of three tones is required right
after the PE and CAL inputs are brought to a logic high level.
At the end of this sequence the calibration data is automatically stored in the internal EEPROM.
The three tones have to be applied as follows (see Figure 12):
• A first tone with a frequency of 1kHz
LMV1089
The sound will travel with the limited speed of 300m/s from
the loudspeaker source to the microphones. When creating
the calibration signals this time should not be ignored, 30cm
distance will cause 1ms delay.
For an optimum automatic calibration the output level of the
microphones and preamp gain must be set so that the resulting signal at the output of the preamplifier is 100mVP-P ± 6dB
AUTOMATIC CALIBRATION SETUP
A calibration test setup consists of a test room (acoustical
box) with a loudspeaker (acoustical source) driven with the
test tone sequence from Figure 12. The test setup is shown
in Figure 13. The distances between the source and microphone 1 and microphone 2 must be equal and the sound must
travel without any obstacle from source to both microphones.
30047235
FIGURE 13. Calibration Test setup
Bits O<7:4> control the two mics at 300Hz and bits
O<3:0> control the two mics at 3kHz.
Bits P<7:4> control the right channel gain and bits
P<3:0> control the left channel gain
4) WRITE a ‘0’ to I2C register Q<7> bit (storeBar) and the
bits from I2C register N<6:0> to I2C register Q<6:0>
5) When I2C register N<7> (ready) goes high, then the
EEPROM programming is complete. Now PE pin and T7 pin
should be set to GND and I2C register Q<7> (storeBar) should
be returned to ‘1’.
MANUAL CALIBRATION
You can manually program the gain compensation of the two
mic inputs on the LMV1089 using the I2C interface. Table 5
shows the control bits for I2C Register O and P with the corresponding gains. This can be easily done by doing the
following:
1) READ contents of the I2C register N immediately after
powering up.
2) Set PE pin and T7 pin to Vdd.
3) WRITE to I2C register O and P to choose the calibration
settings.
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Microphone Placement
Because the LMV1089 is a microphone array Far Field Noise
Reduction solution, proper microphone placement is critical
for optimum performance. Two things need to be considered:
The spacing between the two microphones and the position
of the two microphones relative to near field source
If the spacing between the two microphones is too small, near
field speech will be canceled along with the far field noise.
Conversely, if the spacing between the two microphones is
large, the far field noise reduction performance will be degraded. The optimum spacing between Mic 1 and Mic 2 is
1.5-2.5cm. This range provides a balance of minimal near
field speech loss and maximum far field noise reduction.
The microphones should be in line with the desired sound
source 'near speech' and configured in an endfire array
(seeFigure 16) orientation from the sound source. If the 'near
speech' (desired sound source) is equidistant to the source
like a broadside array (seeFigure 15) the result will be a great
deal of near field speech loss.
30047236
FIGURE 14. Supply current during calibration and
programming
30047243
FIGURE 15. Broadside Array (WRONG)
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LMV1089
SUPPLY CURRENT DURING CALIBRATION
The calibration function performs two main tasks in a sequence. First the AC characteristics of the microphones are
matched. Then in the second stage, if the PE pin is high, the
on-chip EEPROM is programmed.
During the first stage of this sequence the supply current on
the LMV1089 will increase to about 2.5mA. During the writing
of the EEPROM the supply current will rise for about 215 ms
to about 30mA. This increased current is used for the on chip
charge pump which generates the high voltages that are required for programming the EEPROM.
LMV1089
30047242
FIGURE 16. Endfire Array (CORRECT)
Low-Pass Filter At The Output
Measurement Setup
At the output of the LMV1089 there is a provision to create a
1st order low-pass filter (only enabled in 'Noise Cancelling'
mode). This low-pass filter can be used to compensate for the
change in frequency response that results from the noise
cancellation process. The change in frequency response resembles a first-order high-pass filter, and for many of the
applications it can be compensated by a first-order low-pass
filter with cutoff frequency between 1.5kHz and 2.5kHz.
The transfer function of the low-pass filter is derived as:
Because of the nature of the calibration system it is not possible to predict the absolute gain in the two microphone
channels of the Far Field Noise Cancelling System. This is
because, after the calibration function has been operated, the
noise cancelling circuit will compensate for the difference in
gain between the microphones. In Noise Cancelling mode,
this can result in a final gain offset of max 3dB between the
gain set in the registers (A[3:0] and B[2:0]) and the actual
measured gain between input and output of the LMV1089.
After performing a calibration the frequency characteristic of
the microphone channels will be matched for the two microphones. As a result of this matching there can be a slight slope
in the frequency characteristic in one or both amplifiers.
A-WEIGHTED FILTER
The human ear is sensitive for acoustic signals within a frequency range from about 20Hz to 20kHz. Within this range
the sensitivity of the human ear is not equal for each frequency. To approach the hearing response, weighting filters are
introduced. One of those filters is the A-weighted filter.
The A-weighted filter is used in signal to noise measurements,
where the wanted audio signal is compared to device noise
and distortion.
The use of this filter improves the correlation of the measured
values to the way these ratios are perceived by the human
ear.
This low-pass filter is created by connecting a capacitor between the LPF pin and the OUT pin of the LMV1089. The
value of this capacitor also depends on the selected output
gain. For different gains the feedback resistance in the lowpass filter network changes as shown in Table 8.
TABLE 8. Low-Pass Filter Internal Impedance
Post Amplifier Gain
Setting (dB )in Pass
Through mode
Feedback Resistance Rf
(kΩ)
6
20
9
29
12
40
15
57
18
80
This will result in the following values for a cutoff frequency of
2000 Hz:
TABLE 9. Low-Pass Filter Capacitor For 2kHz
Post Amplifier Gain Setting (dB)
Rf (kΩ)
Cf (nF)
6
20
3.9
9
29
2.7
12
40
2.0
15
57
1.3
18
80
1.0
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28
30047210
FIGURE 17. A-Weighted Filter
30047211
FIGURE 18. Noise Measurement Setup
For the signal to noise ratio (SNR) the signal level at the output is measured with a 1kHz input signal of 18mVP-P using an
A-weighted filter. This voltage represents the output voltage
of a typical electret condenser microphone at a sound pressure level of 94dB SPL, which is the standard level for these
measurements. The LMV1089 is programmed for 26dB of to-
tal gain (20dB preamplifier and 6dB postamplifier) with only
Mic1 or Mic2 used. (See also I2C Compatible Interface).
The input signal is applied differentially between the Mic+ and
Mic-. Because the part is in Pass Through mode the low-pass
filter at the output of the LMV1089 is disabled.
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LMV1089
MEASURING NOISE AND SNR
The overall noise of the LMV1089 is measured within the frequency band from 10Hz to 22kHz using an A-weighted filter.
The Mic+ and Mic- inputs of the LMV1089 are AC shorted
between the input capacitors, see Figure 18.
LMV1089
Revision History
Rev
Date
1.0
09/24/08
Initial release.
1.01
09/30/08
Text edits.
1.02
10/14/08
Text edits.
1.03
10/24/08
Text edits.
1.04
10/28/08
Added the LMV1089VY package .
1.05
12/11/08
Text edits.
1.06
12/17/08
Text edits.
1.07
01/13/09
Edited graphic 30047227 (32–Lead LQFP package).
1.08
02/23/09
Text edits.
1.09
02/27/09
Deleted the “Clarisuond” label from the Typical Application ckt. diagram.
1.10
06/17/09
Text edits (A2 pin) in the Pin Name and Function table.
1.11
07/06/09
Updated the Typical and Limit values (Zin) in the EC tables.
1.12
05/19/10
Fixed a minor typo in the front page.
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Description
30
LMV1089
Physical Dimensions inches (millimeters) unless otherwise noted
36 Bump micro SMD Technology
NS Package Number RLA36TTA
X1 = 3.459±0.03(mm), X2 = 3.459(mm)±0.03, X3 = 0.66±0.075(mm)
32 Lead LQFP Technology
NS Package Number NVBE0032
X1 = 3.459±0.03(mm), X2 = 3.459(mm)±0.03, X3 = 0.66±0.075(mm)
31
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LMV1089 Dual Input, Far Field Noise Suppression Microphone Amplifier with Automatic
Calibration Capability
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