LMV1088 Dual Input, Clarisound TM Far Field Noise Suppression Microphone Amplifier with Automatic Calibration Ability General Description Key Specifications The LMV1088 amplifies near-field voice signals within 4cm of the microphones while rejecting far-field acoustic noise greater than 0.5m from the microphones. Up to 20dB of farfield rejection is possible in a properly configured and calibrated system. Part of the Powerwise® family of energy efficient solutions, the LMV1088 consumes 1mA of supply current while providing superior performance to DSP solutions consuming over 10 times the power. A fast calibration during the manufacturing test process allows the LMV1088 to compensate the entire microphone system. This calibration includes mismatch in microphone gain and frequency response, as well as acoustical path variances. The LMV1088 stores the calibration coefficients in onboard EEPROM. The calibration is initiated by I2C command or by pin control. The dual microphone inputs are differential to provide excellent noise immunity. The microphones are biased with an internal low-noise bias supply. (3.3V supply, unless otherwise specified) ■ Supply voltage ■ Supply current ■ Signal to noise ratio (A-weighted) ■ Total harmonic distortion ■ Noise cancellation ■ PSRR 2.7V to 5.5V 1mA (typ) 60dB (typ) 0.1% (typ) 20dB (typ) 85dB (typ) Features ■ ■ ■ ■ ■ Low power consumption No added processing delay Automatic Calibration Space-saving 36 Bump micro SMD package Up to 20dB SNRI Applications ■ ■ ■ ■ ■ Mobile handsets Mobile and handheld two-way radios Bluetooth and other powered headsets Hand-held voice microphones Portable public address systems Application of the LMV1088 20213029 PowerWise® is a registered trademark of National Semiconductor Corporation. © 2008 National Semiconductor Corporation 202130 www.national.com LMV1088 Dual Input, Clarisound TM Far Field Noise Suppression Microphone Amplifier with Automatic Calibration Ability September 19, 2008 FIGURE 1. Typical Dual Microphone Far Field noise Cancelling Application 20213041 LMV1088 Typical Application www.national.com 2 LMV1088 Connection Diagrams 36 Bump micro SMD package 20213030 Top View Order Number LMV1088RL See NS Package Number RLA36TTA 36 Bump micro SMD Marking micro SMD Package View 20213031 Top View X = Plant Code YY = Date Code TT= Die Tracability ZA1 = LMV1088RL 20213033 Bottom View 3 www.national.com LMV1088 TABLE 1. Pin Name and Function Bump Number Pin Name Pin Type Pin Function A1 NC No Connect No Connect (Note 1) A2 T7 Digital Input Auxiliary_Control pin (Note 3) A3 PE Digital Input Program Enable EEPROM A4 MIC2– Analog Input microphone 2 input – A5 MIC2+ Analog Input microphone 2 input + A6 Mic Bias Analog Output Bias for Microphones B1 NC No Connect No Connect (Note 1) B2 NC No Connect No Connect (Note 1) B3 T5 B4 GND Ground Amplifier ground B5 T1 Float (Note 2) Float (Note 2) B6 MIC1+ Analog Input Microphone 1 input + C1 NC No Connect No Connect (Note 1) C2 NC No Connect No Connect (Note 1) C3 T6 C4 T3 C5 GND Ground Amplifier ground C6 MIC1– Analog Input Microphone 1 input – D1 ADR Digital Input I2C Address select D2 NC No Connect No Connect (Note 1) D3 GND Ground Amplifier ground D4 T4 Float (Note 2) D5 T2 Float (Note 2) D6 REF Analog Reference E1 SCL Digital Input I2C Clock E2 T8 Ground Connect to GND E3 NC No Connect No Connect (Note 1) E4 NC No Connect No Connect (Note 1) E5 NC No Connect No Connect (Note 1) No Connect (Note 1) Float (Note 2) Float (Note 2) Reference Voltage De-coupling E6 NC No Connect F1 SDA Digital Input/Output I2C Data F2 I2CVDD Supply I2C power supply F3 VDD Supply Power Supply F4 OUT Analog Output Optimized Audio Out F5 LPF Analog Input Lowpasss Filter Capacitor F6 CAL Digital Input Calibration Start Note 1: Connect NC pins to GND for optimum noise performance. Note 2: Do not ground pins. Note 3: Force VDD setup for manual calibrations. Force GND setup for calibration circuitry. www.national.com 4 70°C/W θJA (microSMD) Soldering Information See AN-112 “microSMD Wafers Level Chip Scale Package.” If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Storage Temperature ESD Rating (Note 7) ESD Rating (Note 8) Junction Temperature (TJMAX) Mounting Temperature Infrared or Convection (20 sec.) 6.0V -85°C to +150°C 2000V 200V 150°C 235°C Operating Ratings (Note 5) Supply Voltage I2CVDD (Note 13) Temperature Range 2.7V to 5.5V 1.8V to 5.5V −40°C to 85°C Electrical Characteristics 3.3V and 5.0V (Note 4) Unless otherwise specified, all limits guaranteed for TJ = 25°C, VDD = 3.3V and 5.0V, VIN = 18mVP-P, pass through mode (Note 11), preamplifier gain = 20dB, postamplifier gain = -2.5dB, RL = 100kΩ, and CL = 4.7pF. LMV1088 Symbol SNR VIN VOUT Parameter Conditions Signal-to-Noise Ratio f = 1kHz, VIN = 18mVPP, A-Weighted 60 dB Max Input Signal f = 1kHz and THD+N < 1% 97 mVP-P AC Output Voltage f = 1kHz, preamp gain = 36dB VIN = 30mVP-P 500 mVRMS 800 mV DC Output Voltage THD+N Total Harmonic Distortion + Noise ZIN ZOUT f = 1kHz, VIN = 18mVP-P Input Impedance Output Impedance 0.1 % 100 kΩ AM Microphone Pre Amplifier Gain Range AMR Microphone Pre Amplifier Gain Adjustment f = 1kHz Resolution Post Amplifier Gain Range Ω 150 RLOAD CLOAD ZLOAD AP Typical Limits Units (Limits) (Note 9) (Note 10) 10 10 f = 1kHz f = 1kHz Pass Through Mode and Summing Mode f = 1kHz Noise Canceling Mode (Note 12) APR Post Amplifier Gain Adjustment Resolution f = 1kHz ACR Gain Compensation Range AMD TCAL kΩ (min) pF (max) 6 – 36 dB 2 dB -2.5 – 9.5 dB 0 – 12 dB 3 f = 300Hz – f = 3400Hz dB ±3 dB (max) f = 300Hz Gain Matching Difference After Calibration f = 1kHz f = 3kHz 0.5 0.5 0.5 dB (max) dB (max) dB (max) Calibration Duration 770 ms (max) Input Referred, Input AC grounded PSRR Power Supply Rejection Ratio CMRR Common Mode Rejection Ratio f = 217Hz (100mVP-P) 85 dB f = 1kHz (100mVP-P) 80 dB f = 1kHz, 60 dB VBM Microphone Bias Supply Voltage IBIAS = 1mA 2.0 V εVBM Microphone Bias Supply Noise A-Weighted 10 IBM Total available Microphone Bias Current IDDQ Supply Quiescent Current VIN = 0V 1 5 μVRMS 1.2 mA (min) 1.5 mA (max) www.national.com LMV1088 Thermal Resistance Absolute Maximum Ratings (Note 4) LMV1088 IDDCP IDD Supply Current during Calibration and Programming Calibrating or Programming EEPROM VIN = 25mVP-P both inputs, Noise canceling mode Supply Current 28 50 mA (max) 1 1.5 mA (max) Digital Interface Characteristics (Notes 4, 13) Unless otherwise specified, all limits guaranteed for TJ = 25°C, I2CVDD within the Operating Rating (Note 13) LMV1088 Symbol Parameter Conditions Typical (Note 9) Limits (Note 10) Units (Limits) VIH Logic High Input Level SCL, SDA, ADR, CAL, PE pins 0.6xI2CVDD V (min) VIL Logic Low Input Level SCL, SDA, ADR, CAL, PE pins 0.4xI2CVDD V (max) tsCAL CAL Setup Time thCAL CAL Hold time until calibration is finished tsPEC PE Setup Time thPEC PE Hold until calibration is finished 2 ms 770 ms (min) 770 ms (min) 2 ms Note 4: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. Note 5: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed. Note 6: The maximum power dissipation must be de-rated at elevated temperatures and is dictated by TJMAX, θJC, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX –TA)/ θJA or the number given in the Absolute Maximum Ratings, whichever is lower. For the LMV1088, TJMAX = 150°C and the typical θJA for this microSMD package is 70°C/W and for the LLP package θJA is 64°C/W Refer to the Thermal Considerations section for more information. Note 7: Human body model, applicable std. JESD22-A114C. Note 8: Machine model, applicable std. JESD22-A115-A. Note 9: Typical values represent most likely parametric norms at TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed. Note 10: Datasheet min/max specification limits are guaranteed by test, or statistical analysis. Note 11: In Pass Through mode, only one microphone input is active. See also I2C Compatible Interface for more information how to configure the LMV1088. Note 12: In Noise Canceling Mode there is 2.5dB additional gain before calibration when compared to the other operating modes to compensate for the gain reduction that is caused by the noise canceling effect. Note 13: The voltage at I2CVDD must not exceed the voltage on VDD. www.national.com 6 Unless otherwise specified, TJ = 25°C, VDD = 3.3V, VIN = 18mVP, pass through mode (Note 11), preamplifier gain = 20dB, postamplifier gain = –2.5dB, RL = 100kΩ, and CL = 4.7pF. P Supply Current vs. Supply Voltage THD+N vs Frequency, pass through mode Mic1 VIN = 36mVP-P 20213021 20213003 THD+N vs Frequency, pass through mode Mic2 VIN = 36mVP-P THD+N vs Frequency, Noise canceling mode signal at Mic1, Mic2 AC shorted, VIN = 36mVP-P 20213004 20213005 THD+N vs Frequency, Noise canceling mode Mic1 AC shorted, signal at Mic2, VIN = 36mVP-P THD+N vs VIN, pass through mode Mic1 20213016 20213006 7 www.national.com LMV1088 Typical Performance Characteristics LMV1088 THD+N vs VIN, pass through mode Mic2 THD+N vs VIN, Noise canceling mode signal at Mic1, Mic2 AC shorted 20213015 20213014 THD+N vs VIN, Noise canceling mode Mic1 AC shorted, signal at Mic2 PSRR vs Frequency, pass through mode Mic1 Mic1+ Mic2 AC shorted 20213018 20213017 PSRR vs Frequency, pass through mode Mic2 Mic1+ Mic2 AC shorted PSRR vs Frequency, Noise canceling mode Mic1+ Mic2 AC shorted 20213019 www.national.com 20213020 8 LMV1088 PSRR vs Frequency, Microphone Bias Mic1+ Mic2 AC shorted 20213022 9 www.national.com LMV1088 for the best performance. Having not enough gain in the Pre Amplifier can result in higher noise levels while to much gain in the Pre Amplifier will result in clipping and saturation in the noise cancelling processor and output stages. The gain ranges and maximum signal levels for the different functional blocks is shown in Figure 2. Two examples are given as a guideline how to select proper gain settings. Application Data Gain Balance and Gain Budget In systems where input signals have a high dynamic range, critical noise levels and where the dynamic range of the output voltage is also limited, careful gain balancing can be essential 20213037 FIGURE 2. Maximum Signal Levels Example1 : An application using microphones with 50mVpp maximum output voltage, and a baseband chip after the LMV1088 with 1.5Vpp maximum input voltage. For optimum noise performance we would like to have the maximum gain at the input stage. So using Pre Amp gain =14dB and Post Amp gain = 6dB is the optimum for this application. 1. 50mVpp + 36 dB = 3.1Vpp. 2. This is higher than the maximum 1.4Vpp allowed for the Noice cancelling Processor (NCP). This means a gain lower then 28.9dB should be selected. 3. Select the nearest lower gain from the gain setting table to be 28dB. This will prevent the NCP from being overloaded by the microphone. With this setting, the resulting output level of the Pre Amplifier will be 1.26Vpp . 4. The NCP can have a maximum processing gain of 9dB (depending on the calibration result) which will result in 3.5Vpp at the output of the LMV1088. This level is higher then maximum level hat is allowed at the input of the Post Amp of the LMV1088. Therefore the Pre Amp gain has to be reduced, to 1.4Vpp minus 9dB = 0.5Vpp. This limits the Pre Amp gain to a maximum of 20dB. 5. The baseband chip limits the maximum output voltage to 1.5Vpp with the minimum of 6dB Post Amp gain, this results in having a lower level at the input of the Post Amp of 0.75Vpp. Now calculating this for a maximum NCP gain of 9dB the output of the Pre Amp must be <266mVpp. 6. Calculating the new gain for the Pre Amp will result in <1.4 dB gain. 7. The nearest lower gain will be 14dB. So using Pre Amp gain =14dB and Post Amp gain = 6dB is the optimum for this application. www.national.com Example 2: An application using microphones with 10mVpp maximum output voltage, and a baseband chip after the LMV1088 with 3.3Vpp maximum input voltage. For optimum noise performance we would like to have the maximum gain at the input stage. 1. 10mVpp + 36dB = 631mVpp. 2. This is lower than the maximum 1.4Vpp so this is OK. 3. The NCP can have a maximum processing gain of 9dB (depending on the calibration result) which will result in 3.5Vpp at the output of the LMV1088. This level is higher then maximum level hat is allowed at the input of the Post Amp of the LMV1088. Therefore the Pre Amp gain has to be reduced, to 1.4Vpp minus 9dB = 0.5Vpp. This limits the Pre Amp gain to a maximum of 34dB. 4. With a Post Amp gain setting of 6dB the output of the Post Amp will be 2.8Vpp which is OK for the baseband. 5. The nearest lower Post Amp gain will be 6dB. So using Pre Amp gain =14dB and Post Amp gain = 6dB is the optimum for this application. I2C Compatible Interface I2C SIGNALS The LMV1088 pin Serial Clock (SCL) is used for the I2C clock SCL and the pin Serial Data (SDA) is used for the I2C data signal SDA. Both of these signals need a pull-up resistor according to I2C specification. The LMV1088 can be controlled through two slave addresses. The two I2C slave address for LMV1088 are given inTable 2 . 10 D7 D6 D5 D4 D3 D2 D1 D0 Chip Address I2C Adress='0' 1 1 0 0 1 1 0 W/R 2nd Chip Address I2C Adress='1' 1 1 0 0 1 1 1 W/R 1st Note 14: The master should issue STOP after no acknowledgement. I2C DATA VALIDITY The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, state of the data line can only be changed when SCL is LOW. TRANSFERRING DATA Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) being transferred first. Each byte of data has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated by the master. The transmitter releases the SDA line (HIGH) during the acknowledge clock pulse. The receiver must pull down the SDA line during the 9th clock pulse, signifying an acknowledge. A receiver which has been addressed must generate an acknowledge after each byte has been received. After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an eighth bit which is a data direction bit (R/W). The LMV1088 address is 110011002or 110011102. For the eighth bit, a “0” indicates a WRITE and a “1” indicates a READ. The second byte selects the register to which the data will be written. The third byte contains data to write to the selected register. 202130q1 I2C Signals: Data Validity I2C START AND STOP CONDITIONS START and STOP bits classify the beginning and the end of the I2C data transmission session. START condition is defined as SDA signal transitioning from HIGH to LOW while SCL line is HIGH. STOP condition is defined as the SDA transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and STOP bits. The I2C bus is considered to be busy after START condition and free after STOP condition. During data transmission, I2C master can generate repeated START conditions. First START and repeated START conditions are equivalent, function-wise.(Note 14) 202130q3 I2C Chip Address 202130q2 I2C Start Stop Conditions 11 www.national.com LMV1088 TABLE 2. Chip Address LMV1088 Register changes take effect at the SCL rising edge during the last acknowledge (ACK ) from slave. In Figure 3 there is a write example shown, for a device at a randomly chosen address'001101002'. 202130q5 w = write (SDA = “0”) r = read (SDA = “1”) ack = acknowledge (SDA pulled down by slave) rs = repeated start FIGURE 3. Example I2C Write Cycle When a READ function is to be accomplished, a WRITE function must precede the READ function. Figure 3, shows a read example for a device at a random chosen address '001101012'. 202130q6 FIGURE 4. Example I2C Read Cycle 202130q9 FIGURE 5. I2C Timing Diagram www.national.com 12 Symbol Limit Parameter Min Max Units 1 Hold Time (repeated) START Condition 0.6 µs 2 Clock Low Time 1.3 µs 3 Clock High Time 600 ns 4 Setup Time for a Repeated START Condition 600 5 Data Hold Time (Output direction, delay generated by LMV1088) 300 900 ns 5 Data Hold Time (Input direction, delay generated by the Master) 0 900 ns 6 Data Setup Time 100 7 Rise Time of SDA and SCL 20 300 ns 8 Fall Time of SDA and SCL 15 300 ns 9 Set-up Time for STOP condition 600 10 Bus Free Time between a STOP and a START Condition 1.3 Cb Capacitive Load for Each Bus Line 10 ns ns ns µs 200 pF NOTE: Data guaranteed by design 13 www.national.com LMV1088 TABLE 3. I2C Timing Paramters LMV1088 TABLE 4. I2C Register Description Address Reg. 0x01h A Bits [3:0] Description Microphone preamplifier gain from 6dB up to 36dB in 2dB steps. 0000 0x02h B Default 6dB 0001 8dB 0010 10dB 0011 12dB 0100 14dB 0101 16dB 0110 18dB 0111 20dB 1000 22dB 1001 24dB 1010 26dB 1011 28dB 1100 30dB 1101 32dB 1110 34dB 1111 36dB 0111 [5:4] A4 = Mute mic1 and A5 = mute mic2. ( 0 = microphone on; 1 = microphone mute) [7:6] Mic enable bits, A6 = enable Mic 1, A7 = enable Mic 2 (1 = enable Mic; 1 = diasable Mic) [2:0] Gain setting for the post amplifier from (3dB steps) (Note 12). Pass Through mode Noise Canceling mode 000 -2.5dB 0db 001 0.5dB 3dB 010 3.5dB 6dB 011 6.5dB 9dB 100 9.5dB 12dB 101 9.5dB 12dB 110 9.5dB 12dB 111 9.5dB 12dB 000 Mic select bits [4:3] [7:5] 00 Noise canceling mode 01 Only Mic 1 on 10 Only Mic 2 on 11 Mic 1 + Mic 2 00 Not Used 000 0x0Ch L [7:0] reads the output of the EEPROM read only 0x0Dh M [7:0] reads the output of the EEPROM read only [6:0] reads the output of the EEPROM read only Reads the “ready” signal. This give the status of the program cycle. 1 = ready ; 0 = program cycle in progress read only 0x0Eh N [7] www.national.com 14 0x0Fh O Bits [7:4] [3:0] Description Default Control the gain compensation between the two mics at 300Hz (Note 1) 0000 (0) 0.0dB 0001 (1) 0.5dB 0010 (2) 1.0dB 0011 (3) 1.5dB 0100 (4) 2.0dB 0101 (5) 2.5dB 0110 (6) 3.0dB 0111 (7) Not used 1000 (8) Not used 1001 (9) –0.5dB 1010 (A) –1.0dB 1011 (B) –1.5dB 1100 (C) –2.0dB 1110 (D) –2.5dB 1110 (E) –3.0dB 1111 (F) Not Used 0000 Control the gain compensation between the two mics at 3kHz (Note 1) 0000 (0) 0.0dB 0001 (1) 0.5dB 0010 (2) 0.0dB 0011 (3) 1.5dB 0100 (4) 2.0dB 0101 (5) 2.5dB 0110 (6) 3.0dB 0111 (7) Not used 1000 (8) Not used 1001 (9) –0.5dB 1010 (A) –1.0dB 1011 (B) –1.5dB 1100 (C) –2.0dB 1101 (D) –2.5dB 1110 (E) –3.0dB 1111 (F) Not used 0000 15 www.national.com LMV1088 Address Reg. LMV1088 Address Reg. 0x10h P Bits [7:4] [3:0] 0x11h 0x12h Q R [6:0] Description Control compensation gain for Mic2 channel at ALL frequencies (Note 1) 0000 (0) –3.0dB 0001 (1) –3.0dB 0010 (2) –2.5dB 0011 (3) –2.0dB 0100 (4) –1.5dB 0101 (5) –1.0dB 0110 (6) –0.5dB 0111 (7) 0.0dB 1000 (8) 0.0dB 1001 (9) 0.5dB 1010 (A) 1.0dB 1011 (B) 1.5dB 1100 (C) 2.0dB 1101 (D) 2.5dB 1110 (E) 3.0dB 1111 (F) 3.0dB 0000 Control compensation gain for Mic1 channel at ALL frequencies (Note 1) 0000 (0) –3.0dB 0001 (1) –3.0dB 0010 (2) –2.5dB 0011 (3) –2.0dB 0100 (4) –1.5dB 0101 (5) –1.0dB 0110 (6) –0.5dB 0111 (7) 0.0dB 1000 (8) 0.0dB 1001 (9) 0.5dB 1010 (A) 1.0dB 1011 (B) 1.5dB 1100 (C) 2.0dB 1101 (D) 2.5dB 1110 (E) 3.0dB 1111 (F) 3.0dB 0000 Values are clocked into EEPROM registers once “newdata” pulse is generated [7] StoreBar signal storeBar = 0 enables EEPROM programming storeBar = 1 data clock into EEPROM registers 1 [0] Start Calibration via I2C ‘0’ to ‘1’ = start calibration (keep ‘1’ during calibration) 0 [7] Internal test 000000 0 ( ) represents binary value in hexadecimal format www.national.com Default 16 The full automatic calibration should only be required once, when the product containing the LMV1088 has completed manufacture, and prior to application packaging. The product containing the LMV1088 will be calibrated to the microphones, the microphone spacings, and the acoustical properties of the final manufactured product containing the LMV1088. The compensation or calibration technology is achieved via memory stored coefficients when the FFNS circuitry activates the calibration sequence. The purpose of the calibration sequence is to choose the optimized coefficients for the FFNS circuitry for the given microphones, spacing, and acoustical environment of the product containing the LMV1088. A basic calibration can be performed with a single 1kHz tone, however to take full advantage of this calibration feature a three tone calibration (See the section PERFORMING A THREE TONE CALIBRATION) is preferred . The automatic calibration process can be initiated from either a digital interface CALIBRATE pin (CAL) or via the I2C interface. The logic level at the PROGRAM ENABLE (PE) pin determines if the result of the calibration is volatile or permanent. AUTOMATIC CALIBRATION VIA CAL PIN To initiate the automatic calibration via the CAL pin, the following procedure is required: • From the initial condition where both PE and CAL are at 'low' level • bring PE to a 'high' level (enable EEprom write) • bring CAL to a 'high' level to start Calibration • Apply Audio stimulus (single tone 1kHz or three tone sequence as described in PERFORMING A THREE TONE CALIBRATION) • Hold CAL 'high' for at least 770ms • Remove Audio stimulus • bring CAL to a 'low' level to stop Calibration • bring PE to a 'low' level (disable EEprom write) A tone may be applied prior to the rising of CAL and PE. Signals applied to the microphone inputs before rising of CAL and PE are ignored by the calibration system. 202130r1 FIGURE 6. Automatic Calibration via CAL pin Note: When the I2C is operated, make sure that register 'R' (address 0x12) bit 0 is '0' before operating the CAL pin (default value for this bit). When this bit is set '1' the calibration engine of the LMV1088 is started and will remain active with a higher supply current than normal operation. The state of the calibration remains active until this bit is reset, '0”. With the bit set the 'low' to' high' transfer of the CAL pin will be ignored. • Apply Audio stimulus (single tone 1kHz or three tone sequence as described in PERFORMING A THREE TONE CALIBRATION) • Wait at least 770ms • Remove Audio stimulus • Write '0' into I2C to finish calibration • Bring PE to a 'low' level (disable EEprom write) A tone may be applied prior to the rising of CAL and PE. Signals applied to the microphone inputs before rising of CAL and PE are ignored by the calibration system. AUTOMATIC CALIBRATION VIA I2C COMMAND To initiate the automatic calibration via the I2 interface, the following procedure is required: • From the initial condition where PE is 'low' level • Bring PE to a 'high' level (enable EEprom write) • Write '1' into I2C register 'R' (address 0x12) bit 0 to start calibration 202130r2 FIGURE 7. Automatic Calibration via I2C COMMAND 17 www.national.com LMV1088 To make the result of the calibration permanent (stored in the EEPROM) the PROGRAM ENABLE (PE) pin must be high during the automatic calibration process. Automatic Calibration LMV1088 • A second tone with a frequency of 300Hz • A third tone with a frequency of 3kHz A tone may be applied prior to the rising of CAL and PE. Signals applied to the microphone inputs before rising of CAL and PE are ignored by the calibration system. . Between each tone pair there is a small time, indicated by a cross, to change the frequency. During that time the input tone is ignored by the calibration system. The total calibration sequence requires less then 770ms. PERFORMING A THREE TONE CALIBRATION In a system with two microphones in an enclosure there will always be a difference in the transfer function in both gain and frequency response. The LMV1088 has the capability to perform an automatic calibration function to minimize these differences. To perform this calibration, a test sequence of three tones is required right after the PE and CAL inputs are brought to a logic high level. At the end of this sequence the calibration data is automatically stored in the internal EEPROM. The three tones have to be applied as follows: • A first tone with a frequency of 1kHz 202130r3 FIGURE 8. Three Tone Calibration Timing TABLE 5. Automatic Calibration Timing Parameters Symbol Limits Parameter Min Max Unitis tST1 Calibration Start Tone 1 tET1 Calibration End Tone 1 tST2 Calibration Start Tone 2 tET2 Calibration End Tone 2 tST3 Calibration Start Tone 3 tET3 Calibration End Tone 3 600 ms tCC Calibration Complete 770 ms 10 200 www.national.com ms 215 400 18 ms ms 415 NOTE: Data guaranteed by design ms ms 20213035 FIGURE 9. Three Tone Calibration Test setup SUPPLY CURRENT DURING CALIBRATION The Calibration function performs two main tasks in a sequence. First the AC characteristics of the microphones are matched. Then in the second stage, if the PE pin is high, the on-chip EEPROM is programmed. During the first stage of this sequence the supply current on the LMV1088 will increase to about 2.5 mA. During the writing of the EEPROM the supply current will rise for about 215ms to about 30 mA. This increased current is used for the on chip charge pump which generates the high voltages that are required for programming the EEPROM. 20213036 FIGURE 10. Supply current during calibration and programming 19 www.national.com LMV1088 The sound will travel with the limited speed of 300m/s from the loudspeaker source to the microphones. When creating the calibration signals this time should not be ignored, 30cm distance will cause 1ms delay. THREE TONE CALIBRATION SETUP A calibration test setup consist of a test room (acoustical box) with a loudspreaker (acoustical source) driven with the test tone sequence from Figure 8. The test setup is shown in Figure 9. The distance between the source and microphone 1 and microphone 2 must be equal and the sound must travel without any obstacle from source to both microphones. LMV1088 TABLE 6. Low-pass Filter internal impedance Manual Calibration You can manually program the gain of the two mic inputs on the LMV1088 using the I2C interface. Table 5 shows the control bits for I2C Register O and P with the corresponding gains. This can be easily done by doing the following: 1) READ contents of the I2C register N immediately after powering up. 2) Set PE pin and T7 pin to Vdd. 3) WRITE to I2C register O and P to choose the calibration settings. Bits O<7:4> control the two mics at 300 Hz and bits O<3:0> control the two mics at 3kHz. Bits P<7:4> control the Mic2 gain and bits P<3:0> control the Mic1 gain 4) WRITE a ‘0’ to I2C register Q<7> bit (storeBar) and the bits from I2C register N<6:0> to I2C register Q<6:0> 5) When I2C register N<7> (ready) goes high, then the EEPROM programming is complete. Now PE pin and T7 pin should be set to GND and I2C register Q<7> (storeBar) should be returned to ‘1’. Feedback resistance Rif 0 20 3 29 6 40 9 57 12 80 (kΩ) This will result in the following values for a cutoff frequency of 2000 Hz: TABLE 7. Low—pass Filter Capacitor for 2kHz Low-Pass Filter At The Output Post Amplifier Gain Setting (dB) (Note 15) Rif (kΩ) Cf (nF) 0 20 3.9 3 29 2.7 6 40 2.0 9 57 1.3 12 80 1.0 Note 15: Noise Cancelling Mode At the output of the LMV1088 there is a provision to create a 1st order low-pass filter (only enabled in 'Noise Cancelling' mode). This low-pass filter can be used to compensate for the change in frequency response that results from the noise cancellation process.. The change in frequency response resembles a first-order high-pass filter, and for many of the applications it can be approximately compensated by a firstorder low-pass filter with cutoff frequency between 1.5kHz and 2.5kHz. The transfer function of the low pass filter is derived as: H(s) = Post Amplifier / SRfCf + 1 This low-pass filter is created by connecting a capacitor between the LPF pin and the OUT pin of the LMV1088. The value of this capacitor also depends on the selected output gain. For different gains the feedback resistance in the Lowpass Filter network changes as shown in Table 6. www.national.com Post Amplifier Gain Setting (dB) (Note 15) 20 Because of the nature of the calibration system it is not possible to predict the absolute gain in the two microphone channels of the Far Field Noise Cancelling System. This is because, after the calibration function has been operated, the noise cancelling circuit will compensate for the difference in gain between the microphones. In Noise Cancelling mode, this can result in a final gain offset of max 3dB between the gain set in the registers (RA[3:0] and RB[2:0]) and the actual measured gain between input and output of the LMV1088. After performing a calibration the frequency characteristic of the microphone channels will be matched for the two microphones. As a result of this matching there can be a slight slope in the frequency characteristic in one or both amplifiers. A-WEIGHTED FILTER The human ear is sensitive for acoustic signals within a frequency range from about 20Hz to 20kHz. Within this range the sensitivity of the human ear is not equal for each frequency. To approach the hearing response, weighting filters are introduced. One of those filters is the A-weighted filter. The A-weighted filter is used in signal to noise measurements and THD+N measurements, where the wanted audio signal is compared to device noise and distortion. 20213010 FIGURE 11. A-Weighted Filter 21 www.national.com LMV1088 The use of this filter improves the correlation of the measured values to the way these ratios are perceived by the human ear. Measurement Setup LMV1088 The Mic+ and Mic- inputs of the LMV1088 are shorted for AC signals via a short between the input capacitors , see Figure 12. MEASURING NOISE AND SNR The overall noise of the LMV1088 is measured within the frequency band from 10Hz to 22kHz using an A-weighted filter. 20213011 FIGURE 12. Noise Measurement Setup For the signal to noise ratio (SNR) the signal level at the output is measured with a 1kHz input signal of 18mVPP using an A-weighted filter. This voltage represents the output voltage of a typical electret condenser microphone at sound pressure level of 94dB SPL, which is the standard level for these measurements. The LMV1088 is programmed for 17.5dB of total www.national.com gain (20dB pre-amplifier and -2.5dB post-amplifier) with only Mic1 or Mic2 on. (See also I2C Compatible Interface) The input signal is applied differential between the corresponding Mic+ and Mic- . Because the part is in Pass Through mode the Low-pass Filter at the output of the LMV1088 is disabled. 22 LMV1088 Revision History Rev Date 1.0 09/26/07 Initial release. Description 1.01 12/10/07 Few text edits (changed TL to RL). 1.02 03/07/08 Text edits. 1.03 03/10/08 Replaced Typical Appl. ckt diagrams and some text edits. 1.04 03/12/08 Deleted 5.0V EC table. 1.05 03/14/08 Replaced Tables 4 and 5. Also edited the Application diagram on page 1. 1.06 03/25/08 Text edits and replaced the Typical Application circuit diagram. 1.07 03/28/08 Text edits. 1.08 04/04/08 Text edits. 1.09 04/17/08 Text edits. 1.10 05/27/08 Text edits. 1.11 06/05/08 Edited the Application drawing on page 1. 1.12 09/19/08 Text edits. 23 www.national.com LMV1088 Physical Dimensions inches (millimeters) unless otherwise noted 36 Bump micro SMD Technology NS Package Number RLA36TTA X1 = 3.459±0.03, X2 = 3.459±0.03, X3 = 0.6±0.075 www.national.com 24 LMV1088 25 www.national.com LMV1088 Dual Input, Clarisound TM Far Field Noise Suppression Microphone Amplifier with Automatic Calibration Ability Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Design Support Amplifiers www.national.com/amplifiers WEBENCH www.national.com/webench Audio www.national.com/audio Analog University www.national.com/AU Clock Conditioners www.national.com/timing App Notes www.national.com/appnotes Data Converters www.national.com/adc Distributors www.national.com/contacts Displays www.national.com/displays Green Compliance www.national.com/quality/green Ethernet www.national.com/ethernet Packaging www.national.com/packaging Interface www.national.com/interface Quality and Reliability www.national.com/quality LVDS www.national.com/lvds Reference Designs www.national.com/refdesigns Power Management www.national.com/power Feedback www.national.com/feedback Switching Regulators www.national.com/switchers LDOs www.national.com/ldo LED Lighting www.national.com/led PowerWise www.national.com/powerwise Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors Wireless (PLL/VCO) www.national.com/wireless THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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