REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) A Make corrections on sheet 11 Terminal connections for case outline X. Update boilerplate to MIL-PRF-38535 requirements.- LTG 02-08-27 APPROVED Thomas M. Hess REV SHEET REV SHEET 15 A A A 16 17 18 REV STATUS 19 20 REV A OF SHEETS SHEET 1 PMIC N/A PREPARED BY Larry T. Gauder STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A 2 A A 3 4 A 5 7 8 9 10 11 12 13 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216 http://www.dscc.dla.mil CHECKED BY Thanh V. Nguyen APPROVED BY Monica L. Poelking 6 MICROCIRCUIT, DIGITAL, CMOS, 8-BIT MICROCONTROLLER, MONOLITHIC SILICON DRAWING APPROVAL DATE 00-10-05 REVISION LEVEL A SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. 1 OF 5962-00518 20 5962-E559-02 14 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 Federal stock class designator \ RHA designator (see 1.2.1) 00518 01 Device type (see 1.2.2) / Q Device class designator (see 1.2.3) Q Case outline (see 1.2.4) X Lead finish (see 1.2.5) \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 Circuit function 80C32 CMOS 8-bit microcontroller 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Q X Descriptive designator CDIP2-T40 CQCC2-J44 Terminals Package style 40 44 dual-in-line package leaded chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL SHEET 2 1.3 Absolute maximum ratings. 1/ Supply voltage (VDD) ............................................................................................ Input voltage (VIN) ............................................................................................ Output current (IOUT) ............................................................................................... Power dissipation (PD) ............................................................................................ Storage temperature range (Tstg)............................................................................ Lead temperature (soldering 10 seconds).............................................................. Junction temperature (TJ) ....................................................................................... Thermal resistance, junction to case (θJC).............................................................. -0.3 V to +7.0 V -0.3 V to VDD +0.3 V 80 mA 0.3 W -65°C to 150°C +265°C 165°C 30°C/W 1.4 Recommended operating conditions. Supply voltage range (VDD)..................................................................................... Case operating temperature range (TC) ................................................................. 4.5 V dc to 5.5 V dc -55°C to +125°C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL A SHEET 3 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Functional diagram. The functional diagram shall be as specified on figure 2. 3.2.4 Timing waveforms. The timing waveforms shall be as specified on figure 3. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL A SHEET 4 3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 105 (see MIL-PRF-38535, appendix A). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL SHEET 5 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55°C ≤ TC ≤ +125°C unless otherwise specified Group A subgroups Device type Limits Unit VOH1 IOH = -400 µA VDD = 4.5 V, VSS = 0.0 V 1, 2, 3 All Min 2.4 VOH2 IOH = -60 µA VDD = 4.5 V, VSS = 0.0 V 1, 2, 3 All 2.4 V VOH3 1/ IOH = -150 µA VDD = 4.5 V, VSS = 0.0 V 1, 2, 3 All 3.375 V VOH4 1/ IOH = -25 µA VDD = 4.5 V, VSS = 0.0 V 1, 2, 3 All 3.375 V VOH5 1/ IOH = -40 µA VDD = 4.5 V, VSS = 0.0 V 1, 2, 3 All 4.05 V VOH6 1/ IOH = -10 µA VDD = 4.5 V, VSS = 0.0 V 1, 2, 3 All 4.04 V VOL1 IOL = 3.2 mA VDD = 4.5 V, VSS = 0.0 V 1, 2, 3 All 0.45 V VOL2 IOL = 1.6 mA VDD = 4.5 V, VSS = 0.0 V 1, 2, 3 All 0.45 V Quiescent current IDD 2/ VDD = 5.5 V, VSS = 0.0 V f = 30 MHz 1, 2, 3 All 15 mA Supply current IDD(S) 3/ VDD = 5.5 V, VSS = 0.0 V f = 30 MHz 1, 2, 3 All 50 mA Power down supply current IDD(PD1) 1/ 4/ VDD = 2.0 V, VSS = 0.0 V 1, 2, 3 All 75 µA IDD(PD2) 4/ VDD = 5.5 V, VSS = 0.0 V 1, 2, 3 All 75 µA Low level input leakage current IIL VIN (Under Test) = 0.45 V VDD = 5.5 V, VSS = 0.0 V 1, 2, 3 All -10 10 µA High level input leakage current IIH VIN (Under Test) = 5.5 V VDD = 5.5 V, VSS = 0.0 V 1, 2, 3 All -10 10 µA High output voltage Low output voltage Max V See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL SHEET 6 TABLE I. Electrical performance characteristics – Continued. Test Symbol Conditions -55°C ≤ TC ≤ +125°C unless otherwise specified Group A subgroups Device type Limits Unit Low level input current IIL2 VIN (Under Test) = 0.45 V VIN (Remaining Inputs) = 0.0 V VDD = 5.5 V, VSS = 0.0 V 1, 2, 3 All Min -75 High to low transition current IIT VIN (Under Test) = 2.0 V VIN (Remaining Inputs) = 0.0 V VDD = 5.5 V, VSS = 0.0 V 1, 2, 3 All -750 µA Input clamp voltage (to VSS) 1/ VIC1 IIN (Under Test) = 100 µA VDD = Open, VSS = 0.0 V 1, 2, 3 All 0.2 V Input clamp voltage (to VDD) 1/ VIC2 IIN (Under Test) = 100 µA VDD = 0.0 V, VSS = Open 1, 2, 3 All Reset resistor RRST VDD = 4.5 V 1, 2, 3 All Functional test 1 5/ Instruction set Verify truth table without load VIL = 0.0 V, VIH = 3.0 V VOUT = 1.5 V VDD = 4.0 V, VSS = 0.0 V f = 1.0 MHz See 4.4.1b 7, 8 All Functional test 2 5/ Internal register Verify truth table without load VIL = 0.0 V, VIH = 3.0 V VOUT = 1.5 V, f = 1.0 MHz VDD = 5.5 V, VSS = 0.0 V See 4.4.1b 7, 8 All Functional test 3 5/ Interrupts Verify truth table without load VIL = 0.8 V, VIH = 2.2 V VOUT = 1.5 V, f = 1.0 MHz VDD = 4.5 V, VSS = 0.0 V See 4.4.1b 7, 8 All Functional test 4 5/ Timer Verify truth table without load VIL = 0.8 V, VIH = 2.2 V VOUT = 1.5 V, f = 1.0 MHz VDD = 5.5 V, VSS = 0.0 V See 4.4.1b 7, 8 All Functional test 5 5/ Serial port Verify truth table with load VIL = 0.0 V, VIH = 3.0 V VOUT = 1.5 V, f = 1.0 MHz VDD = 4.5 V, VSS = 0.0 V See 4.4.1b Outputs: 1TTL +50 pF 7, 8 All 50 Max µA -0.2 V 200 kΩ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL SHEET 7 TABLE I. Electrical performance characteristics – Continued. Test Symbol Conditions -55°C ≤ TC ≤ +125°C unless otherwise specified Group A subgroups Device type Limits Min Functional test 6 5/ External data Verify truth table with load VIL = 0.0 V, VIH = 3.0 V VOUT = 1.5 V, , f = 1.0 MHz VDD = 5.5 V, VSS = 0.0 V See 4.4.1b Outputs: 1TTL +50 pF 7, 8 All Functional test 7 5/ Program counter Verify truth table with load VIL = 0.0 V, VIH = 3.0 V VOUT = 1.5 V, , f = 12 MHz VDD = 4.5 V, VSS = 0.0 V See 4.4.1b Outputs: 1TTL +50 pF 7, 8 All Functional test 8 5/ Ram Verify truth table with load VIL = 0.0 V, VIH = 3.0 V VOUT = 1.5 V, , f = 12 MHz VDD = 5.5 V, VSS = 0.0 V See 4.4.1b Outputs: 1TTL +50 pF 7, 8 All 4 All Input/output capacitance CIN/COUT VIN/OUT (Not under test) = 0 V VDD = VSS = 0.0 V f = 1.0 MHz, See 4.4.1c ALE pulse width 6/ tLHLL Address valid to ALE 6/ tAVLL f = 30 MHz VDD = 4.5 V and 5.5 V, VSS = 0.0 V See figure 4 Address hold to ALE 6/ tLLAX ALE to valid Inst. in 6/ tLLIV PSEN to valid Inst. in 6/ Address to valid Inst. in 6/ Unit Max 10 pF 9, 10, 11 All 60 ns 9, 10, 11 All 15 ns 9, 10, 11 All 35 ns 9, 10, 11 All 100 ns tPLIV 9, 10, 11 All 65 ns tAVIV 9, 10, 11 All 130 ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL SHEET 8 TABLE I. Electrical performance characteristics – Continued. Test Group A subgroups Device type 9, 10, 11 All Min 135 9, 10, 11 All 235 9, 10, 11 All 90 tAVWL 9, 10, 11 All 115 ns tAVRL 9, 10, 11 All 115 ns tLLPL 9, 10, 11 All 25 ns tPLPH 9, 10, 11 All 80 ns tPXIX 9, 10, 11 All tPXAV 9, 10, 11 All 30 ns tRLRH 9, 10, 11 All 180 ns tWLWH 9, 10, 11 All 180 ns tLLAXR 9, 10, 11 All 55 ns tRHDX 9, 10, 11 All tRHDZ 9, 10, 11 All 60 tAVDV 9, 10, 11 All 260 tLLRL 9, 10, 11 All 90 tQVWX 9, 10, 11 All 20 ns tQVWH 9, 10, 11 All 215 ns tWHQX 9, 10, 11 All 20 ns tRLAZ 9, 10, 11 All tWHLH 9, 10, 11 All Symbol tRLDV RD to valid data in 6/ ALE to valid data in 6/ Conditions -55°C ≤ TC ≤ +125°C unless otherwise specified tLLDV tLLWL ALE to WR 6/ f = 30 MHz VDD = 4.5 V and 5.5 V, VSS = 0.0 V See figure 4 Limits Unit Max ns ns 115 ns Address to WR 6/ Address to RD 6/ ALE to PSEN 1/ PSEN pulse width 1/ 0.0 ns PSEN to in Inst. hold 1/ PSEN to address valid 1/ RD pulse width 1/ WR pulse width 1/ ALE to data address hold 1/ 0.0 ns RD to data hold 1/ RD to data float 1/ Address to valid data in 1/ ns ns 115 ns ALE to RD 1/ Data valid to WR 1/ Data setup to WR high 1/ WR to data hold 1/ 0.0 ns 40 ns RD low to address float 1/ 20 WR high to ALE high 1/ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL SHEET 9 TABLE I. Electrical performance characteristics – Continued. Test Symbol tRHLH Conditions -55°C ≤ TC ≤ +125°C unless otherwise specified f = 30 MHz VDD = 4.5 V and 5.5 V, VSS = 0.0 V See figure 4 Group A subgroups Device type 9, 10, 11 All Min 20 9, 10, 11 All 400 ns 9, 10, 11 All 300 ns 50 RD high to ALE high 1/ Serial port clock cycle time 1/ Out data setup to clock 1/ tQVXH Clock to out data hold 1/ tXHQX 9, 10, 11 All Clock to in data hold 1/ tXHDX 9, 10, 11 All Clock high to in data valid 1/ tXHDV 9, 10, 11 All tXLXL Limits Unit Max 40 ns ns 0.0 ns 300 ns 1/ Guaranteed but not tested. 2/ IDD is measured with all output pins disconnected; XTAL1 driven with tCLCH = tCHCL = 5.0 ns, VIL = VSS +0.5 V, VIH = VDD –0.5V; XTAL2 = NC; EA = RST = VSS; PORT0 = VDD. 3/ IDD(S) is measured with all output pins disconnected; XTAL1 driven with tCLCH = tCHCL = 5.0 ns, VIL = VSS +0.5 V, VIH = VDD –0.5V; XTAL2 = NC; PORT0 = EA = RST = VSS. 4/ IDD(PD) is measured with all output pins disconnected; EA = PORT0 = VDD; XTAL2 = NC; XTAL1 = RST = VSS. 5/ Functional test includes: Instruction set, Internal registers, Interrupts, Timer, Serial port, External data, Program counter, Ram, Idle mode, Power-down mode. Other parameters (guaranteed): VIL min = -0.5 V VIL max = 0.2VDD –0.25 V (0.85 V at 5.5 V) Except pin EA: VIL max = 0.2VDD –0.45 V. VIH max = VDD +0.5 V VIH min = 0.2VDD +1.1 V (2.0 V at 4.5 V) Except pins XTAL1, RESET: VIH min = 0.7VDD +0.2 V. 6/ Measurements shall be performed on a 100 percent basis, Read and Record. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL SHEET 10 Device type Case outline Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Device type Case outline Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 NC = No connection. Pin Symbol T2/P1.0 T2EX/P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST P3.0/RXD P3.1/TXD P3.2/INT0 P3.3/INT1 P3.4/T0 P3.5/T1 P3.6/WR P3.7/RD XTAL2 XTAL1 VSS 01 Q Pin Number 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Pin Symbol P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 PSEN ALE EA P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 VDD Pin Symbol NC T2/P1.0 T2EX/P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST P3.0.RXD NC P3.1/TXD P3.2/INT0 P3.3/INT1 P3.4/T0 P3.5/T1 P3.6/WR P3.7/RD XTAL2 XTAL1 VSS 01 X Pin Number 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Pin Symbol NC P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 PSEN ALE NC EA P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 VDD FIGURE 1. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL A SHEET 11 NOTE: 1. For this device, the ROM is only externally addressable and by using EA signal requirements. FIGURE 2. Functional diagram. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL SHEET 12 FIGURE 3. Timing waveforms. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL SHEET 13 FIGURE 3. Timing waveforms – Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL SHEET 14 SHIFT REGISTER TIMING WAVEFORMS SYMBOL tXLXL tQVXH tXHQX tXHDX tXHDV PARAMETER Serial Port Clock Time Output Data Setup to Clock Rising Edge Output Data Hold After Clock Rising Edge Input Data Hold After Clock Rising Edge Clock Rising Edge to Input Data Valid MIN 12tCLCL 10tCLCL-133 2tCLCL-117 0 -- MAX 10tLCL-133 UNIT µs ns ns ns ns FIGURE 3. Timing waveforms – Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL SHEET 15 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition B. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. (2) TA = +125°C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL A SHEET 16 4.4.1 Group A inspection. a. Tests shall be as specified in table II herein. b. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device. c. Subgroup 4 (CIN and COUT measurements) shall be measured only for the initial test and after process or design changes which may affect input capacitance. A minimum sample of 3 devices with zero rejects shall be required. TABLE II. Electrical test requirements. Test requirements Subgroups (in accordance with MIL-PRF-38535, table III) Subgroups (in accordance with MIL-STD-883, method 5005, table I) Device class M Device class Q Device class V Interim electrical parameters (see 4.2) Final electrical parameters (see 4.2) 1/ 1, 2, 3, 4, 5, 6, 7, 8A, 8B, 9, 10, 11 1/ 1, 2, 3, 4, 5, 6, 7,8A, 8B, 9, 10, 11 2/ 1, 2, 3, 4, 5, 6, 7,8A, 8B, 9, 10, 11 Group A test requirements (see 4.4) 1, 2, 3, 4, 5, 6, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 4, 5, 6, 7,8A, 8B, 9, 10, 11 1, 2, 3, 4, 5, 6, 7,8A, 8B, 9, 10, 11 Group C end-point electrical parameters (see 4.4) 1, 4, 7, 9 1, 4, 7, 9 1, 2, 3, 4, 5, 6, 7, 8A, 8B, 9, 10, 11 Group D end-point electrical parameters (see 4.4) 1, 4, 7, 9 1, 4, 7, 9 1, 4, 7, 9 Group E end-point electrical parameters (see 4.4) 1, 4, 7, 9 1, 4, 7, 9 1, 4, 7, 9 1/ PDA applies to subgroup 1. 2/ PDA applies to subgroups 1 and 7. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein. 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition B. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. b. TA = +125°C, minimum. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL A SHEET 17 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table II herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25°C ±5°C, after exposure, to the subgroups specified in table II herein. c. When specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43216-5000, or telephone (614) 692-0547. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535, MIL-HDBK-1331, and as follows: STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL A SHEET 18 Pin descriptions. Port 0 - Port 0 is an 8-bit open drain bi-directional I/O port. Port 0 pins that have 1’s written to them float and in that state can be used as high impedance inputs. Port 0 is also the multiplexed low-order address and data bus during accesses to external program and data memory. In this application, it uses strong internal pull-ups when emitting 1’s. External pull-ups are required during program verification. Port 0 can sink eight LS TTL inputs. Port 0 also outputs the code bytes during program verification in the device. Port 1 - Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. Port 1 pins that have 1’s written to them are pulled high by the internal pull-ups, and in that state can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current because of the internal pull-ups. Port 1 also receives the low order address byte during program verification. It can drive CMOS inputs without external pull-ups. Also in this device Port 1 can sink/source three LS TTL inputs. Two inputs of Port 1 are also used for Timer/Counter 2: - P1.0 (T2): External clock inputs. - P1.1 (T2EX): Trigger input to be reloaded or captured causing Timer/Counter 2 to interrupt. Port 2 - Port2 is an 8-bit bi-directional I/O port with internal pull-ups. Port 2 pins that have 1’s written to them are pulled high by the internal pull-ups and in that state can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external Program Memory and during accesses to external Data Memory that use 16-bit addresses. In this application, it uses strong internal pull-ups when emitting 1’s. During access to external Data Memory that use 8-bit addresses, Port 2 emits the contents of the P2 Special Function Register. Port 2 can sink/source three LS TTL inputs. It can drive CMOS inputs with external pull-ups. And in this device Port 2 also receives the high-order address bits and control signals during program verification. Port 3 - Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. Port 3 pins that have 1’s written to them are pulled high by the internal pull-ups and in that state can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current because of the pull-ups. It also serves the functions of various special features of the MCS-51 Familyas listed below. PORT PIN P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 ALTERNATE FUNCTION RXD (Serial Input Port) TXD (Serial Output Port) INT0 (External Interrupt 0) INT1 (External Interrupt 1) T0 (Timer 0 External Input) T1 (Timer 1 External Input) WR (External Data Memory Write Strobe) RD (External Data Memory Read Strobe) Port 3 can sink/source three LS TTL inputs. It can drive CMOS inputs without external pull-ups. RST - A high level on this for two machine cycles while the oscillator is running, resets the device. An internal pull-down resistor permits Power-On reset using only a capacitor connected to VDD. As soon as the reset is applied (VIN), Ports 1, 2 and 3 are tied to “1”. This operation is achieved asynchronously even if the oscillator does not startup. ALE - Address Latch Enable output for latching the low byte of the address during accesses to external memory. ALE is activated as though for this purpose at a constant rate of 1/6 of the oscillator frequency except during an external data memory access at which time one ALE pulse is skipped. ALE can sink/source 8 LS TTL inputs. It can drive CMOS inputs without an external pull-up. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL SHEET 19 Pin descriptions - Continued. PSEN - Program Store Enable is the read strobe to external Program Memory. PSEN is activated twice each machine cycle during fetches from external Program Memory (however, when executing out of external Program Memory, two activations of PSEN are skipped during each access to external Data Memory). PSEN is not activated during fetches from internal Program Memory. PSEN can sink/source 8 LS TTL inputs. It can drive CMOS inputs without an external pull-up. EA - When EA is held high, the CPU executes out of internal Program Memory (unless the Program Counter exceeds 3FFFH). When EA is held low, the CPU executes only out of external Program Memory. EA must not be floated. XTAL1 - Input to the inverting amplifier that forms the oscillator. Receives the external oscillator signal when an external oscillator is used. XTAL2 - Output of the inverting amplifier that forms the oscillator and input of the internal clock generator. This pin should be floated when an external oscillator is used. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-00518 A REVISION LEVEL SHEET 20 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 02-08-27 Approved sources of supply for SMD 5962-00518 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962-0051801QQC F7400 MC-80C32E-30MQ 5962-0051801VQC F7400 SC-80C32E-30SV 5962-0051801QXC F7400 MJ-80C32E-30MQ 5962-0051801VXC F7400 SJ-80C32E-30SV 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. Vendor CAGE number F7400 Vendor name and address Atmel Nantes La Chantrerie 44306 Nantes CEDEX 3, France USA Point of contact: Atmel 2325 Orchard Parkway San Jose, CA 95131 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.