® DEM-PCM1702 EVALUATION FIXTURE FEATURES DESCRIPTION ● COMPLETE 20-BIT STEREO D/A CONVERSION SYSTEM The DEM-PCM1702 is an evaluation fixture for BurrBrown’s sign-magnitude, 20-bit digital-to-analog converter, the PCM-1702. It is primarily intended for quick evaluation of the PCM1702P’s spectral purity and sound fidelity. Two PCM1702s are provided to allow full stereo evaluation. The input to the DEM-PCM1702 can be the output serial data from DEM-PCM1760 (BurrBrown’s evaluation fixture for its 20-bit A/D and digital filter, the PCM1760 and DF1760), or other digital signal source through the interface connector. The number of digital input data bits and optional functions are selectable by switches on board. ● NEW SIGN-MAGNITUDE DAC: PCM1702P ● 8x DIGITAL FILTER: SM5842AP ● HIGH PERFORMANCE THD+N at (F/S): 0.0015% Dynamic Range: 108dB (EIAJ) S/N Ratio: 120dB (EIAJ) Non Zero Cross Distortion ● SERIAL DIGITAL INTERFACE ● ANALOG OUTPUT: ±3V ● POWER SUPPLY: ±9V to ±12V, +5V ● DIRECT INTERFACE TO DEM-PCM1760 ● BOARD SIZE: 182mm X 128mm International Airport Industrial Park • Mailing Address: PO Box 11400 Tel: (602) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • © 1994 Burr-Brown Corporation The analog output signal is filtered by a GIC type low pass filter (dual OP AMP) and the filtered output appears on the output connectors (BNCs). • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Telex: 066-6491 • FAX: (602) 889-1510 • Immediate Product Info: (800) 548-6132 LI-429 Printed in U.S.A. July, 1994 SM 5842P Digital In Operation Mode Selection PCM 1702P I/V LPF Analog Out Lch PCM 1702P I/V LPF Analog Out Rch SYSCLK BCKI DI LRCI DITHN CLKSLN 1W1N 1W2N ±5V Reg +VDD DGND +VCC AGND –VCC FIGURE 1. Block Diagram of the DEM-PCM1702. Power Supply for Digital: +5V +VDD Operation Mode Switch Power Supply for Analog: ±9V to ±12V DGND AGND –VCC +VCC 7905 7805 Pin Location of Connector 20 19 +VDD Option DGND Optional Function Jumpers SYSCLK SM5842P 182mm BCKI DI CN2 LRCI J1 ~ J6 NC AGND –VCC PCM1702 PCM1702 +VCC 2 1 Interface Connector Analog Out Rch (BNC) Analog Out Lch (BNC) 128mm FIGURE 2. Component Location and Function. ® DEM-PCM1702P 2 OPERATION MODE SELECT SWITCH The Operation Mode Select switch provides for the selection of dither, system clock and input format as described in the tables below. From the factory, Jumpers J1, J2, J5 and J6 are installed, as shown below, setting the system clock at 32kHz, no deemphasis and no mute. J1 NAME FUNCTION L H DITHN Dither Select Dither On Dither Off CLKSL System Clock Select 256fs 384fs 1W1N (2N) Input Format Select First, First, First, First, Right-justified, Right-justified, Right-justified, Right-justified, 1W1N 1W2N H L H L H H L L 16-Bit 18-Bit 20-Bit 24-Bit H L J6 A system clock (SYSCLK) is required for operation of the DEM-PCM1702. If the DEM-PCM1702 is being used with the DEM-PCM1760, the 256fs or 384fs system clock is provided by the DEM-PCM1760 through pin 16 of the Interface Connector, as described below. (NOTE: Care must be taken to insure both boards are set to the same master clock.) If the DEM-PCM1702 is being used where it must generate the 256fs or 384fs master clock, the appropriate crystal can be connected to the SM5842. 1 1 W W 1 2 N N H L COMBINATION WITH DEM-PCM1760 The DEM-PCM1702 can be directly combined with the DEM-PCM1760 (20-bit stereo A/D conversion system). In this case, the connector pins of the DEM-PCM1702 and the DEM-PCM1760 are connected directly together. The power supply for the DEM-PCM1760 is provided by the DEM-PCM1702 and the serial digital data (within system clock) is provided to the DEM-PCM1702 from the DEM-PCM1760. L H (Standard Position) FIGURE 3. Opearation Mode Select Switch. OPTIONAL FUNCTION JUMPERS Power Supply for Digital: +5V The optional functions of right and left channel de-emphasis, the de-emphasis system clock, and right and left channel mute are controlled by jumpers J1 through J6 as shown in the following table. JUMPER # J5 SYSTEM CLOCK OPERATION From the factory, these switches are set to provide for no dither, system clock equal 256fs and data format set for MSB first, right justified, 20-bit, as shown below. C L K S L N J4 FIGURE 4. Optional Function Jumpers. For detailed timing infomation, see the data sheet for the NPC SM5842AP. D I T H N J3 Table of Below INPUT FORMAT MSB MSB MSB MSB J2 FUNCTION JUMPER NO JUMPER J1 De-emphasis, Rch OFF ON J2 De-emphasis, Lch OFF ON J3 De-emphasis, fs-32kHz X J4 De-emphasis, fs-32kHz X J3 De-emphasis, fs-41.4kHz X J4 De-emphasis, fs-41.4kHz X J3 De-emphasis, fs-48kHz X J4 De-emphasis, fs-48kHz J5 Mute, Rch No Mute Mute J6 Mute, Lch No Mute Mute Power Supply for Analog: ±9V to ±12V Jumper Line DEM-PCM1760 DEM-PCM1702 CN1 CN2 X Analog In Analog Out FIGURE 5. Combination with DEM-PCM1760. ® 3 DEM-PCM1702P +5VDD D I T H N C K I I S W W L 1 2 N N N DGND AGND –VCC +VCC C31 + C33 C34 + C32 IC-cS5842AP + C35 C36 IC-d IC-a 7905 J J J J J J 1 2 3 4 5 6 +5V DD DGND SYSCLK BCX1 D1 LAC1 NC AGND –5VCC +5VCC C43 C41 PCM1702P IC-c + C48 + R16 C55 C53 + + C56 + C86 R17 C86 IC-g C54 IC-i + + C50 C51 R15 C87 R11 C86 IC-f + R12 R11 C83 C81 R13 R17 R21 R22 ANALOG OUT Rch ANALOG OUT Lch DEM-1702 P2084-69A FIGURE 6. DEM-PCM1702 Board Layout and Component Location. ® DEM-PCM1702P C48 + + 4 C46 + IC-h + R14 R18 PCM1702P + C85 C84 C82 IC-b C47 ® C54 + C44 C42 + + C54 + 7805 C37 C38 C40 C38 C45 C52 + + TOP BOTTOM FIGURE 7. DEM-PCM1702 Layer 1 and Layer 2. ® 5 DEM-PCM1702P 6 –VCC AGND +VCC DGND SYSCLK SCK1 D1 LRC1 NC AGND + + –VCC +VCC +VDD C33 100µF to 470µF C34 100µF to 470µF –VCC C35 0.1µF C36 0.1µF +VCC V1 G V0 N D IC-d 7905 IC-c 7805 V1 G V0 N D + + C37 100µF C38 100µF SCKO WCKO DOL DOR VDD BITHN –VCC +VCC 20 19 18 17 16 15 26 25 24 23 22 21 LRC1 28 MUTEL MUTER FSEL2 FSEL1 DEMPL DEMPR SM5842AP 10 1W2N 11 0W1N 7 XTO 8 VSS D1 SCK1 CKSLN INF1N 1W1N XT1 FIGURE 8. DEM-PCM1702 Circuit Diagram. CN2 1 2 3 4 5 6 + C 39 3.3µF J6 J5 J4 J3 J2 J1 C40 0.1µF +VDD DGND +VDD –VCC C32 0.1µF + GND C31 100µF to 470µF +VDD +5V 9 IOUT 11 BPO DC 10 15 14 13 12 –5V 16 REF DC SERV DC GND GND PCM1702 5 6 –5V LE C44 3.3µF + C42 3.3µF 4 + 1 2 DATA 3 SCK +5V +5V 9 IOUT 11 BPO DC 10 15 14 13 12 –5V 16 REF DC SERV DC GND GND PCM1702 5 –5V 6 LE + C 43 3.3µF 4 GND + C 41 3.3µF 1 DATA 2 SCK 3 +5V + C 48 3.3µF C52 100µF +VCC + C 54 100µF C50 100µF + C46 3.3µF C51 100µF +VCC + C 53 100µF C49 100µF C45 3.3µF + C 47 3.3µF + DEM-PCM1702P + + +VCC + + ® –VCC +VCC –VCC –VCC +VCC + 1/2 IC–i C66 3.3µF 1/2 IC–g C56 220µF RF2 2.5kΩ + C65 3.3µF 1/2 IC–f C55 220µF RF1 2.5kΩ 1/2 IC–h –VCC C58 2200µF R12 2.7kΩ C57 2200µF R11 2.7kΩ C60 2200µF R20 1.5kΩ R18 1.5kΩ R14 1.5kΩ C59 2200µF R19 1.5kΩ R17 1.5kΩ R15 1.5kΩ R20 510Ω R19 510Ω R22 100kΩ R21 100kΩ + C64 3.3µF –VCC 1/2 IC–g +VCC –VCC NOTE: IC-f to IC-i are type 5532. +VCC = +5V –VCC = –5V +VDD = +5V 1/2 IC–i C62 2200µF 1/2 IC–h C61 2200µF + C63 3.3µF 1/2 IC–f +VCC Rch Analog Out Lch Analog Out