® DEM-PCM1800 INSTRUCTION MANUAL DESCRIPTION In Master Mode, LRCK, BCK, FSYNC, and DATA, are outputs. In Slave Mode, DEM-PCM1800 requires LRCK, BCK, FSYNC inputs, and outputs DATA. DEM-PCM1800 is an evaluation board for the PCM1800 20-bit stereo audio analog-to-digital converter. The board contains a 24-pin SSOP IC socket, mode control switch, and some bypass capacitors. DEM-PCM1800 can be operated by connecting only a power supply and system clock (either of 256fS or 384fS or 512fS). There are two kinds of operation modes: Master Mode, and Slave Mode for operation of the PCM1800. BLOCK DIAGRAM Power Supply Digital Inerface Lch IN PCM1800 A/D Rch IN Mode Control Switch International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ® © 1997 Burr-Brown Corporation LI-502 1 DEM-PCM1800 Printed in U.S.A. November, 1997 DEM-PCM1800 BASIC CONNECTIONS AND OPERATION • Audio data format can be controlled by switch FMT0, FMT1. • Power supply can be provided at +VCC, GND connector CN1. • To enable the reset function push RESET (switch SW2). Master Mode Operation • Audio analog inputs are VINL, VINR connector CN2. • LRCK, BCK, DATA, are outputs for PCM Audio data. • Digital ground return to digital interface source should be connected at GND, connector CN3. • LRCK, BCK, DATA, outputs are located at connector CN3. • System clock (either of 256fS or 384fS or 512fS) should be provided at SCLK, connector CN3. Slave Mode Operation • Operation Mode (master mode or slave mode) and selection of system clock can be controlled by switch MODE 0, MODE 1. • LRCK, BCK, DATA, are inputs for PCM Audio data. Synchronized timing between LRCK (fS) and system clock (256fS, 384fS, 512fS) is required. • The high pass filter function can be controlled by the switch bypass. • LRCK, BCK, DATA, inputs are located at connector CN3 and are selected by setting FSYNC = H connecting JP2. 1 2 1 CN4 2 CN1 VCC GND VCC GND SCHEMATIC DIAGRAM JP2-1 JP2-2 + C1 100µF C9 1µF + C2 0.1µF CN2 3 2 C10 + + 4.7µF PUSH = OFF JP2 SW1 DIPSW 2 +5V + 4.7µF SW2 PUSHSW R1 10kΩ 1 FSYNC C12 1 AGND 24 VINL GND VINR 1µF U1 PCM1800 C11 1 VINL 2 VREF1 VCC 23 3 SGND CINPL 22 + C5 4.7µF C6 0.1µF C7 470pF 4 VREF2 CINNL 21 5 VINR CINPR 20 6 RSTB CINNR 19 7 BYPS VDD 18 8 FMT0 DGND 17 SYSCK 16 9 FMT1 10 MODE0 11 MODE1 BCK 14 12 FSYNC LRCK 13 C8 470pF + C3 4.7µF C4 0.1µF DOUT 15 CN3 SCKI GND LRCK NC BCK DOUT 6 5 4 3 2 1 The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® DEM-PCM1800 2 PCB LAYOUT ® 3 DEM-PCM1800