ETC 587206A

Ordering number : EN*6008
CMOS IC
LC587208A, 587206A, 587204A, 587202A
4-Bit Single-Chip Microcontroller
LCD Driver ROM: 2, 4, 6, or 8 K × 16 bits, RAM: 512 × 4 bits
Preliminary
Overview
The LC587202A through LC587208A are 4-bit CMOS
microcontrollers that integrate ROM, RAM, and an
extensive set of peripheral functions around a CPU core
that supports low-voltage operation. Memory capacities
include 2, 4, 6, or 8 K of 16-bit ROM, 512 × 4 bits of
RAM, and a special-purpose RAM for the 8-level stack.
Peripheral functions include two 8-bit timers (one of
which can be used as an event counter), an 8-bit
synchronous serial interface, an alarm signal generator, a
remote controller carrier signal generator, and an LCD
controller/driver circuit. These microcontrollers provide a
powerful set of standby functions for reduced power
dissipation.
Applications
• Portable electronic equipment that uses an LCD display
(These microcontrollers are particularly well-suited for
portable equipment that requires low-power operation
for extended battery life.)
• Control and LCD display in portable CD players, timers,
and consumer health maintenance equipment
• Remote controls for CD players, VCRs, and tuners
Features
ROM
•
•
•
•
LC587208A (8192 × 16 bits)
LC587206A (6144 × 16 bits)
LC587204A (4096 × 16 bits)
LC587202A (2048 × 16 bits)
RAM
•
•
•
•
LC587208A (512 × 4 bits)
LC587206A (512 × 4 bits)
LC587204A (512 × 4 bits)
LC587202A (512 × 4 bits)
Package Dimensions
Unit: mm
3159-QFP64E
[LC587208A/06A/04A/02A]
SANYO: QFP64E(QIP64E)
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
91598RM (OT) No. 6008-1/15
LC587208A, 587206A, 587204A, 587202A
Instruction cycle times
Except for the table reference instruction, all instructions execute in a single cycle.
Cycle time
Supply voltage
System clock oscillator
Oscillator frequency
667 ns
4.5 to 6.0 V
CF (ceramic) oscillator
6 MHz
1 µs
2.8 to 6.0 V
CF (ceramic) oscillator
4 MHz
4 µs
2.5 to 6.0 V
CF (ceramic) oscillator
1 MHz
10 µs
2.2 to 6.0 V
CF (ceramic) oscillator
400 kHz
122 µs
2.0 to 6.0 V
Crystal oscillator
32.768 kHz
Ports
Input-only pins
• Port S (4 pins)
• The INT pin (1 pin)
I/O Pins
• Port K (4 pins)
The output circuits are CMOS circuits, and cannot be modified.
• Port M (4 pins)
The output circuits are either CMOS or p-channel circuits, and the type can be selected under program control in single-port units.
(The M4 pin is set to its input pin function when timer 2 is used as an event counter.)
• Port SO (4 pins)
The output circuits are either CMOS or n-channel circuits, and the type can be selected under program control in single-port units.
The three pins SO1, SO2, and SO3 also function as the serial interface pins. (Two-pin serial interface operation is also supported.)
• Port P (4 pins)
The output circuits are either CMOS or p-channel circuits, and the type can be selected under program control in single-port units.
Output-only pins
• Port N (4 pins)
The N3 pin also functions as the remote controller carrier output pin, and the N4 pin also functions as the alarm output pin.
LCD drive pins
• Common pins (4 pins)
• Segment pins (23 pins)
The segment pin circuits include built-in memory (called “segment memory”) that holds the output data. These pins can also
be switched in single-pin units in the mask options to function as general-purpose outputs (CMOS, p-channel, or n-channel).
Wide selection of LCD drive techniques
LCD drive technique
Number of segments that can be driven
Required common pins
1/3bias 1/4duty
1/3bias 1/3duty
1/2bias 1/4duty
1/2bias 1/3duty
Duplex
Static
92 segments
69 segments
92 segments
69 segments
46 segments
23 segments
COM1 to COM4
COM1 to COM3
COM1 to COM4
COM1 to COM3
COM1, COM2
COM1
LCD controller (Hardware functions that facilitate the development of display control software)
Segment PLA (option)
This technique allows the LCD drivers (common 1 through common 4) to be controlled according to user software
design, i.e. the relationship between LCD segment control strobe signals and the data. This technique is more difficult
for the chip manufacturer, but it allows software design and the LCD panel layout design to be completely independent.
Thus it supports highly efficient product development and is a major plus for the user. Furthermore, there is no need for
a routine that converts data held in RAM to LCD driver output data.
Segment decoder
These microcontrollers provide a decoder for 7-segment displays. This circuit also allows binary data to be output
without modification for display control of flag areas that display various operating states.
Strobe decoder
This function groups segments for easier program development and display control.
No. 6008-2/15
LC587208A, 587206A, 587204A, 587202A
Timers
Timer 1
• Six-bit prescaler + 8-bit programmable reload timer
(The prescaler is shared by timer 1, timer 2, and the serial interface.)
• Supports the generation of remote control carrier signals under program control.
Timer 2
• Six-bit prescaler + 8-bit programmable timer
(The prescaler is shared by timer 1, timer 2, and the serial interface.)
• Can also be used as an event counter.
Base timer (When the 32.768 kHz crystal oscillator option is selected)
• Two frequencies from a set of four base frequencies (either 125 ms and 500 ms, or 100 ms and 250 ms) can be selected as a
combination of mask option and program selection to flexibly support end products.
Standby functions
Halt mode
• Instruction execution is stopped in this mode. The oscillator circuits, the timers, the LCD controller and driver circuits,
and the serial interface continue to operate. This mode allows unnecessary loops to be avoided and therefore power
dissipation can be reduced by the effective use of this mode.
• The halt mode clear (exit) conditions can be set by application programs. The following functions can be used to clear
halt mode.
— Transitions on the INT pin signal (1 factor)
— Timer 1 (1 factor)
— Timer 2 (1 factor)
— Base timer (1 factor)
— Transitions on either the serial interface pins or the SO4 pin (One or the other of these two factors)
— Transitions on the S and K port signals as defined by the SSW instruction (8 factors)
— The reset signal
Hold mode
• This is a full standby mode in which the oscillator circuits are stopped.
• The hold mode clear (exit) conditions can be set by application programs. The following functions can be used to clear hold mode.
— Transitions on the INT pin signal (1 factor)
— Timer 2 in event counter mode (1 factor)
— Transitions on either the serial interface pins or the SO4 pin (One or the other of these two factors)
— Transitions on the S and K port signals as defined by the SSW instruction (8 factors)
— The reset signal
Interrupt function (5 factors with 4 vector addresses)
— Transitions on the INT pin signal (1 factor)
— Timer 1 (1 factor)
— Timer 2 (1 factor)
— Transitions on either the serial interface pins or the SO4 pin (One or the other of these two factors)
Watchdog timer
A 16-bit counter is used. This circuit supports reset based on a combination of two points the program passes through for
flexible application support. This watchdog timer circuit supports the following operating times.
Crystal oscillator used (32.768 kHz, 1 or 2 cycles): Up to 2000 ms (max)
CF oscillator used (1 MHz, 1 cycle):
Up to 65.536 ms (max)
Subroutine stack
These microcontrollers provide an 8-level stack in special-purpose RAM for subroutines and interrupt handling. Thus
data RAM is not required for saving the program counter.
Instruction set
These microcontrollers provide 126 easy-to-use instructions, including accumulator manipulation, register to/from
memory transfer, arithmetic, logical operation, flag manipulation, and I/O port control instructions, as well as a full set of
conditional branch instructions.
No. 6008-3/15
LC587208A, 587206A, 587204A, 587202A
Oscillator circuits (three types)
Single-oscillator specifications: One oscillator, either a CF, RC, or crystal oscillator.
Dual-oscillator specifications: Either a CF and a crystal oscillator, or an RC and a crystal oscillator.
CF (ceramic) oscillator circuit
• Used for the system clock in fast mode
• 400 kHz to 6 MHz
RC (resistor/capacitor) oscillator circuit
• Used for the system clock in fast mode
• 400 kHz to 800 kHz
• Two-terminal oscillator circuit
Crystal oscillator circuit
• Used for the system clock in slow mode
• 32.768, 38.2293, or 65.536 kHz
Package options
• QIP64E (flat package)
• Chip
Pin Assignment
Top view
• Pin 35 (TST) must be connected to VSS during normal operation.
• Consult your Sanyo representative in advance before using solder bath or spray techniques for mounting.
No. 6008-4/15
LC587208A, 587206A, 587204A, 587202A
Pad Arrangement
(Applies to the chip version of the product.)
Chip size: 4.10 × 3.69 mm
Thickness: 480 µm
Jacket opening dimensions: 110 × 110 µm
Bonding must be performed
within the jacket opening area.
Enlargement View of a Pad
Pad Coordinates (unit: µm)
(Applies to the chip version of the product.)
No.
Pad
X
Y
No.
Pad
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
VDD
CFIN
CFOUT
S1
S2
S3
S4
K1
K2
K3
K4
M1
M2
M3
M4
N1
N2
N3
N4
TST
SEG01
SEG02
SEG03
SEG04
SEG05
SEG06
SEG07
SEG08
SEG09
SEG10
SEG11
SEG12
SEG13
–1854
–1396
–1236
–1071
–901
–731
–561
–391
–221
–51
119
289
459
629
799
1034
1333
1854
1854
1854
1854
1854
1854
1854
1854
1854
1854
1854
1854
1854
1854
1854
1854
–1345
–1650
–1650
–1650
–1650
–1650
–1650
–1650
–1650
–1650
–1650
–1650
–1650
–1650
–1650
–1650
–1650
–1234
–935
–705
–545
–385
–225
–65
95
255
415
575
735
895
1055
1215
1375
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
——
——
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
COM4
COM3
COM2
COM1
CUP1
CUP2
RES
INT
SO1
SO2
SO3
SO4
P1
P2
P3
P4
XTOUT
XTIN
VDD2
VDD1
VSS
X
1452
1292
1132
972
812
652
492
332
172
12
–148
–308
–468
–628
–788
–948
–1108
–1268
–1854
–1854
–1854
–1854
–1854
–1854
–1854
–1854
–1854
–1854
–1854
–1854
–1854
–1854
–1854
Y
1650
1650
1650
1650
1650
1650
1650
1650
1650
1650
1650
1650
1650
1650
1650
1650
1650
1650
1488
1323
1153
983
813
643
473
303
133
–37
–202
–362
–594
–898
–1122
• Pad 20 must be connected to VSS.
• Pads 34 and 35 must be left open.
No. 6008-5/15
LC587208A, 587206A, 587204A, 587202A
System Block Diagram
K port
M port
SO port
Serial interface
OSC1
Base timer (freerunning timer)
Watchdog timer
Table reference function
Reset function
Alarm signal
generator
Strobe decoder
Segment PLA
LCD driver
Carrier control circuit
8-bit reload timer
(timer 2)
Segment pins
Common pins
8-bit preset timer
(timer 1)
Note: Shaded blocks can be selected
by the user as mask options.
Mask options overview
Mask options are provided to allow the microcontroller hardware functions to closely match the specifications of the end
product. The user can select any combination of options desired. In addition, these microcontroller also provide, as a
mask option, a segment PLA function that can set up a correspondence, in single-segment units, between the operation of
independently developed software and the actual LCD segments.
Oscillator Circuit Options
• Oscillator selection: Selects oscillator specifications appropriate for the application.
1: CF, 2: EXT, 3: RC, 4: Crystal, 5: CF & crystal, 6: EXT & crystal, 7 RC & crystal
• CF/EXT frequency: Selects the frequency of the CF (ceramic) or external oscillator.
1: 400 kHz/10 µs, 2: 800 kHz/5 µs, 3: 2 MHz/2 µs, 4: 4 MHz/1 µs, 5: 6 MHz/0.7µs
• RC frequency: Selects the frequency of the RC (resistor/capacitor) oscillator.
1: 400 kHz/10 µs, 2: 800 kHz/5 µs
• Xtal selection: Selects the frequency of the crystal oscillator.
1: 32 kHz/122 µs, 2: 38 kHz/105 µs, 3: 65 kHz/61 µs
• Crystal oscillator specification: Selects the Rd and Cd used with the crystal oscillator.
1: Internal Rd and Cd used, 2: Internal Rd and Cd unused
LCD Controller/Driver Options
• LCD driver: Selects the LCD driver/controller operating mode appropriate for the drive technique used by the LCD
panel used.
1: Static, 2: Duplex, 3: 1/2B-1/3D, 4: 1/2B-1/4D, 5: 1/3B-1/3D, 6: 1/3B-1/4D, 7 Unused
• LCD frequency: Selects the drive frequency (frame frequency) appropriate for the LCD panel used.
1: Slow, 2: Typ, 3: Fast
No. 6008-6/15
LC587208A, 587206A, 587204A, 587202A
Base Timer Options
• Base timer overflow signal: Selects the base timer basic frequency.
1: DIVIN divided by 8192 or 32768, 2: DIVIN divided by 4096 or 16384
Serial Interface Options
• SIO counter internal clock speed: Selects the frequency of the internal clock used by the serial interface.
1: 1 machine cycle, 2: 2 machine cycles, 3: 4 machine cycles
INT Pin Options
• INT pin resistor: Selects the type of INT pin input circuit appropriate for the application
1: Pulled down, 2: Pulled up, 3: Open
• INT pin interrupt edge: Selects the input level at which the INT external interrupt pin operates.
1: Falling edge (high to low), 2: Rising edge (low to high)
• INT pin hold transistor: Selects whether or not the level hold function built into the INT pin circuit is used.
1: Low/high level hold transistor used, 2: Low/high level hold transistor unused
Reset Options
• RESET pin resistor: Selects the type of RES pin input circuit appropriate for the application
1: Pulled down (high resistance), 2 Pulled up (low resistance), 3: Open (high resistance), 4: Open (low resistance)
• Internal reset: Selects whether or not the internal reset circuit should be used in conjunction with the external reset
function.
1: Used, 2: Unused
Port Internal Resistor Options
• Resistor connection selection: Selects the programmable resistors and the level hold functions that are built into the
input ports.
1. Pull-down resistor, 2: Pull-up resistor
Port Built-in Level Hold Function Options (Selected in 4-bit units): These depend on which of the above-described
options were selected.
• Port S hold transistor: Selects whether or not the port S level hold function is used.
1: Low/high level hold transistors used, 2: Low/high level hold transistors unused
• Port K hold transistors: Selects whether or not the port K level hold function is used.
1: Low/high level hold transistors used, 2: Low/high level hold transistors unused
• Port M hold transistors: Selects whether or not the port M level hold function is used.
1: Low/high level hold transistors used, 2: Low/high level hold transistors unused
• Port P hold transistors: Selects whether or not the port P level hold function is used.
1: Low/high level hold transistors used, 2: Low/high level hold transistors unused
• Port SO hold transistors: Selects whether or not the port SO level hold function is used.
1: Low/high level hold transistors used, 2: Low/high level hold transistors unused
Port N Options
• N1 pin output type: Selects the type of the port N1 output circuit.
1: CMOS type, 2: N-channel type
• N2 pin output type: Selects the type of the port N2 output circuit.
1: CMOS type, 2: N-channel type
• N3 pin output type: Selects the type of the port N3 output circuit.
1: CMOS type, 2: N-channel type
• N4 pin output type: Selects the type of the port N4 output circuit.
1: CMOS type, 2: N-channel type
• Port N initial output state: Selects the output levels for port N (N1 through N4) when the reset signal is applied.
1: High level or off, 2: Low level
No. 6008-7/15
LC587208A, 587206A, 587204A, 587202A
Pin Functions
Pin
I/O
Function
VSS
—
Ground (–)
VDD
—
Power supply (+)
State during a reset
• LCD power supply connections
• The external handling of these pins differs depending on the LCD drive
bias technique used.
LCD drive bias
VDD1
—
VDD2
—
Unused
1/1
1/2
1/3
VDD
VDD1
VDD2
VSS
C1, C2, C3 = 0.1 µF (typ)
• LCD drive pins
• The external handling of these pins differs depending on the LCD drive
bias technique used.
LCD drive bias
CUP1
—
CUP2
—
Unused
1/1
1/2
1/3
CUP1
CUP2
C1, C2, C3 = 0.1 µF (typ)
CFIN
Input
CFOUT
Output
XTIN
Input
XTOUT
Output
INT
Input
S1
Input
S2
Input
S3
Input
S4
Input
K1
I/O
K2
I/O
K3
I/O
K4
I/O
• OSC1 (fast mode) oscillator element connections
CF specifications: 400 kHz to 6 MHz
RC specifications: 400 kHz to 800 kHz
EXT specifications: 200 kHz to 4 MHz
• OSC2 (slow mode) oscillator element connections
Xtal: 32, 38, or 65 kHz
• 1-bit input
• External interrupt input
• The input circuit type and the interrupt level are set in the mask options.
• Interrupt reception: disabled
(Pulled up, pulled down, or open)
• Level hold function: operational
(Rising edge or falling edge)
• A level hold function, which is designed to prevent input floating states
from occurring, is also available as an option.
• 4-bit input port
• Pull-up and pull-down resistors, which can be enabled or disabled under
program control in a single port unit, are built in.
• Input signal transition detection circuits and chattering exclusion circuits,
• Pull-down or pull-up resistors: enabled
which can be enabled or disabled under program control in 1-bit units, are
(After the reset is cleared: disabled)
built in.
• Level hold function: operation disabled
• The chattering exclusion time differs depending on the oscillator
(After the reset is cleared: operation starts)
specifications.
When a 32.768 kHz crystal oscillator is used the time will be 1.95 or 7.8 ms.
• A level hold function, which is designed to prevent input floating states
from occurring on these pins, is also available as an option.
• 4-bit I/O port
• Pull-up and pull-down resistors, which can be enabled or disabled under
program control in a single port unit, are built in.
• Input signal transition detection circuits and chattering exclusion circuits,
which can be enabled or disabled under program control in a single port
unit, are built in.
• The chattering exclusion time differs depending on the oscillator
specifications.
When a 32.768 kHz crystal oscillator is used the time will be 1.95 or 7.8 ms.
• Output circuit type: CMOS
• A level hold function, which is designed to prevent input floating states
from occurring on these pins, is also available as an option.
• Input mode
• Pull-down or pull-up resistors: enabled
(After the reset is cleared: disabled)
• Level hold function: operation disabled
(After the reset is cleared: operation starts)
• Output latch data: high
Continued on next page.
No. 6008-8/15
LC587208A, 587206A, 587204A, 587202A
Continued from preceding page.
Pin
I/O
SO1
I/O
SO2
I/O
SO3
I/O
SO4
I/O
M1
I/O
M2
I/O
M3
I/O
M4
I/O
P1
I/O
P2
I/O
P3
I/O
P4
I/O
N1
Output
N2
Output
N3
Output
N4
Output
Function
State during a reset
• 4-bit I/O port (also used for the serial interface)
SO1: Serial interface input
SO2: Serial interface output
SO3: Serial interface clock
• The serial interface can also be used as a 2-wire interface.
• When the serial interface function is not used, the SO4 pin can be used to
clear halt mode or as an interrupt pin.
• Pull-up and pull-down resistors, which can be enabled or disabled under
program control in a single port unit, are built in.
• The output circuit type can be switched under program control in a single
port unit. (CMOS/n-channel)
• A level hold function, which is designed to prevent input floating states
from occurring on these pins, is also available as an option.
• Input mode
• Pull-down or pull-up resistors: enabled
(After the reset is cleared: disabled)
• Level hold function: operation disabled
(After the reset is cleared: operation starts)
• 4-bit parallel mode
• Output latch data: high
• 4-bit I/O port
• Pull-up and pull-down resistors, which can be enabled or disabled under
program control in a single port unit, are built in.
• The output circuit type can be switched under program control in a single
port unit. (CMOS/n-channel)
• The M4 pin functions as a clock input when timer 2 is operated in event
counter mode.
• A level hold function, which is designed to prevent input floating states
from occurring on these pins, is also available as an option.
• Input mode
• Pull-down or pull-up resistors: enabled
(After the reset is cleared: disabled)
• Level hold function: operation disabled
(After the reset is cleared: operation starts)
• Output latch data: high
• 4-bit I/O port
• Pull-up and pull-down resistors, which can be enabled or disabled under
program control in a single port unit, are built in.
• The output circuit type can be switched under program control in a single
port unit. (CMOS/n-channel)
• A level hold function, which is designed to prevent input floating states
from occurring on these pins, is also available as an option.
• Input mode
• Pull-down or pull-up resistors: enabled
(After the reset is cleared: disabled)
• Level hold function: operation disabled
(After the reset is cleared: operation starts)
• Output latch data: high
• 4-bit output port
• The output circuit type can be switched under program control in 1-bit
units. (CMOS/n-channel)
• This port handles medium-level voltages when the n-channel open-drain • The output levels are specified as mask options
output circuit type is selected.
• N3 is the remote controller carrier signal output pin.
• N4 is the alarm pulse signal output pin.
• The LCD drive state is specified as a mask option.
(Either all lit or all off.)
LCD panel segment drive pins
• The LCD driver/controller either operates or stops
Six drive techniques are supported.
depending on the oscillator specifications and other
These pins can be used as general-purpose outputs (either CMOS,
mask options.
p-channel, or n-channel) by specifying mask options.
• The states of those pins set up as general-purpose
Any combination of LCD drive and general-purpose output pins can be set
outputs are determined by the mask options.
up.
If all segments lit is specified: High or off.
If all segments off is specified: Low or off.
Output
•
•
•
SEG23
Output
•
COM1
Output
COM2
Output
COM3
Output
COM4
Output
• LCD panel common plate drive pins
• One of four pins COM1 to COM4 is selected according to the LCD drive • The LCD driver/controller either operates or stops
duty technique used.
depending on the oscillator specifications and other
• The LCD drive frequency (frame frequency) is determined by the mask
mask options
option.
RES
Input
• Microcontroller reset input
Applications must apply the reset signal level for at least 200 µs.
• The input circuit and the reset level are specified as mask options.
TST
Input
• Test input
• This pin must be tied to the VSS level (the minus side of the power
supply).
SEG1
to
No. 6008-9/15
LC587208A, 587206A, 587204A, 587202A
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Parameter
Maximum supply voltage
Symbol
Maximum output voltage
Ratings
min
–0.3
+7.0
V
–0.3
VDD
V
VDD2
–0.3
VDD
V
Voltages up to the generated voltage are allowed.
VI2
Allowable levels in the specified circuit. XTIN, CFIN
S1 to 4, K1 to 4, P1 to 4, SO1 to 4, RES, INT, TST
(With the K, P, M, and SO ports in input mode)
VO1
Allowable levels in the specified circuit. XTOUT, CFOUT
Voltages up to the generated voltage are allowed.
VO2
K1 to 4, P1 to 4, SO1 to 4, N1 to 4, CUP1, CUP2,
Seg1 to 23, COM1 to 4
(With the K, P, M, and SO ports in output mode)
–0.3
VO3
With the open-drain specifications N1 o 4 (Nch)
–0.3
+16
V
0
+10
mA
mA
IO2
–0.3
VDD + 0.3
VDD + 0.3
V
V
–10
0
IO3
0
5
mA
IO4
–5
0
mA
40
mA
300
mW
∑ IO1
∑ IO2
Allowable power dissipation
Unit
max
VDD
IO1
Pin output current
typ
VDD1
VI1
Maximum input voltage
Conditions and applicable pins
Pd max
Per pin. K1 to 4, P1 to 4, M1 to 4, SO1 to 4
Total current for all pins: K1 to 4, P1 to 4, M1 to 4, SO1 to 4
N1 to 4, Seg1 to 35
–40
mA
QFP64E(QIP64E) flat package
Operating temperature
Topr
–30
+70
°C
Storage temperature
Tstg
–55
+125
°C
Allowable Operating Ranges at Ta = –30 to +70°C, VSS = 0 V
Parameter
Supply voltage
Symbol
VDD
Conditions and applicable pins
Ratings
min
typ
max
Unit
LCD unused specifications: VDD1 = VDD2 = VDD
2.0
6.0
V
Static drive specifications: VDD1 = VDD2 = VDD
2.0
6.0
V
1/2 bias specifications: VDD1 = VDD2 ≈ 1/2VDD
2.8
6.0
V
1/3 bias specifications: VDD1 ≈ 2 × 1/3VDD, VDD2 ≈ 1/3VDD
2.8
6.0
V
2.0
VDD
V
Memory retention supply voltage
VHD
Voltages at which the RAM and register contents are retained*
High-level input voltage
VIH1
S1 to 4, K1 to 4, P1 to 4, M1 to 4, SO1 to 4, INT
(With the K, P, M, and SO ports in input mode)
0.7 VDD
VDD
V
Low-level input voltage
VIL1
S1 to 4, K1 to 4, P1 to 4, M1 to 4, SO1 to 4, INT
(With the K, P, M, and SO ports in input mode)
0
0.3 VDD
V
High-level input voltage
VIH2
RES
0.75 VDD
VDD
V
Low-level input voltage
VIL2
RES
0
0.25 VDD
V
High-level input voltage
VIH3
CFIN
0.75 VDD
VDD
V
Low-level input voltage
VIL3
CFIN
0
0.25 VDD
Operating frequency 1
fopg1
VDD = 2.0 V to 6.0 V, XTIN/XOUT, 32 kHz Crystal oscillator
32
33
kHz
Operating frequency 2
fopg2
VDD = 2.2 V to 6.0 V, XTIN/XOUT, 38 kHz Crystal oscillator
37
39
kHz
Operating frequency 3
fopg3
VDD = 2.2 V to 6.0 V, XTIN/XOUT, 65 kHz Crystal oscillator
60
70
kHz
Operating frequency 4
fopg4
VDD = 2.2 V to 6.0 V CFIN, CFOUT CF specifications
390
810
kHz
Operating frequency 5
fopg5
VDD = 2.5 V to 6.0 V CFIN, CFOUT CF specifications
390
1200
kHz
Operating frequency 6
fopg6
VDD = 2.8 V to 6.0 V CFIN, CFOUT CF specifications
390
4200
kHz
Operating frequency 7
fopg7
VDD = 4.5 V to 6.0 V CFIN, CFOUT CF specifications
390
6000
kHz
Operating frequency 8
fopg8
VDD = 4.5 V to 6.0 V CFIN, CFOUT RC specifications
400
800
kHz
Operating frequency 9
fopg9
VDD = 3.0 V to 6.0 V CFIN, CFOUT EXT specifications
190
4000
kHz
Operating frequency 10
fopg10
VDD = 3.0 V to 6.0 V Pins SO1 and SO3 (in serial interface mode)
Rising and falling edges on the input signal and clock
waveform must be ≤ 10 µs
DC
200
kHz
V
Note * : The state where the CF/RC and crystal oscillators are completely stopped, and all internal circuits completely stopped.
No. 6008-10/15
LC587208A, 587206A, 587204A, 587202A
Electrical Characteristics at Ta = –30 to +70°C, VDD = 2.5 to 3.2 V, VSS = 0 V
Parameter
Input resistance
Symbol
Conditions and applicable pins
Ratings
min
typ
Unit
max
RIN1 A
VIN = 0.2 VDD, Low level hold transistor*
60
300
1200
RIN1 B
Pull-down resistor*
30
150
500
kΩ
RIN1 C
VIN = 0.8 VDD, High level hold transistor*
60
300
1200
kΩ
RIN1 D
VIN = VSS, Pull-up resistor*
30
150
500
kΩ
RIN2 A
VIN = 0.2 VDD, INT pin low level hold transistor
60
300
1200
kΩ
300
1500
5000
kΩ
60
300
1200
kΩ
kΩ
RIN2 B
VIN = VDD, INT pin pull-down resistor
RIN2 C
VIN = 0.8 VDD, INT pin high level hold transistor
RIN2 D
VIN = VSS, INT pin pull-up resistor
kΩ
300
1500
5000
RIN3
VIN = VDD, RES pin pull-down resistor
10
30
50
kΩ
RIN4
VIN = VSS, RES pin pull-up resistor
10
30
50
kΩ
10
30
50
kΩ
RIN5
VIN = VDD, TST pin pull-down resistor
High-level output voltage
VOH1
IOH = –500 µA, N1 to 4
Low-level output voltage
VOL1
IOL = 1.0 mA, N1 to 4
High-level output voltage
VOH2
IOH = –400 µA, K1 to 4, P1 to 4, M1 to 4, SO1 to 4
(With the K, P, M, and SO ports in output mode)
Low-level output voltage
VOL2
IOL = 400 µA, K1 to 4, P1 to 4, M1 to 4, SO1 to 4
(With the K, P, M, and SO ports in output mode)
0.5
V
VOH = 10.5 V, N1 to 4 (Open specifications)
1.0
µA
Output off leakage current
I OFF
VDD – 0.5
V
0.5
VDD – 0.5
V
V
Segment Port Output Impedances
[CMOS output port mode]
High-level output voltage
VOH3
IOH = –100 µA, Seg 1 to 23
Low-level output voltage
VOL3
IOL = 100 µA, Seg 1 to 23
VDD – 0.5
V
0.5
V
1.0
µA
[P-channel open-drain output port mode]
High-level output voltage
VOH3
Output off leakage current
I OFF
IOH = –100 µA, Seg 1 to 23
VDD – 0.5
VOL = VSS, Seg 1 to 23
V
[N-channel open-drain output port mode]
Low-level output voltage
Output off leakage current
VOL3
I OFF
IOL = 100 µA, Seg 1 to 23
0.5
V
VOH = VDD, Seg 1 to 23
1.0
µA
[Static drive]
High-level output voltage
VOH4
IOH = –20 µA, Seg 1 to 23
Low-level output voltage
VOL4
IOL = 20 µA, Seg 1 to 23
High-level output voltage
VOH5
IOH = –100 µA, COM1
Low-level output voltage
VOL5
IOL = 100 µA, COM1
VDD – 0.2
V
0.2
VDD – 0.2
V
V
0.2
V
Note *: The 20 pins S1 to S4, K1 to K4, P1 to P4, M1 to M4, and SO1 to SO4.
No. 6008-11/15
LC587208A, 587206A, 587204A, 587202A
Electrical Characteristics at Ta = –30 to +70°C, VDD = 3.0 to 4.5 V, VSS = 0 V
Parameter
Input resistance
Symbol
Conditions and applicable pins
Ratings
min
typ
Unit
max
RIN1 A
VIN = 0.2 VDD, Low level hold transistor*
35
200
800
kΩ
RIN1 B
Pull-down resistor*
15
80
300
kΩ
RIN1 C
VIN = 0.8 VDD, High level hold transistor*
35
200
800
kΩ
RIN1 D
VIN = VSS, Pull-up resistor*
15
80
300
kΩ
RIN2 A
VIN = 0.2 VDD, INT pin low level hold transistor
RIN2 B
VIN = VDD, INT pin pull-down resistor
RIN2 C
VIN = 0.8 VDD, INT pin high level hold transistor
RIN2 D
VIN = VSS, INT pin pull-up resistor
35
200
800
kΩ
150
800
3000
kΩ
35
200
800
kΩ
150
800
3000
kΩ
RIN3
VIN = VDD, RES pin pull-down resistor
10
30
50
kΩ
RIN4
VIN = VSS, RES pin pull-up resistor
10
30
50
kΩ
10
30
50
kΩ
RIN5
VIN = VDD, TST pin pull-down resistor
High-level output voltage
VOH1
IOH = –1.0 mA, N1 to 4
Low-level output voltage
VOL1
IOL = 2.0 mA, N1 to 4
High-level output voltage
VOH2
IOH = –500 µA, K1 to 4, P1 to 4, M1 to 4, SO1 to 4
(With the K, P, M, and SO ports in output mode)
Low-level output voltage
VOL2
IOL = 500 µA, K1 to 4, P1 to 4, M1 to 4, SO1 to 4
(With the K, P, M, and SO ports in output mode)
0.5
V
VOH = 10.5 V, N1 to 4 (Open specifications)
1.0
µA
Output off leakage current
I OFF|
VDD – 0.5
V
0.5
VDD – 0.5
V
V
Segment Port Output Impedances
[CMOS output port mode]
High-level output voltage
VOH3
IOH = –300 µA, Seg 1 to 23
Low-level output voltage
VOL3
IOL = 300 µA, Seg 1 to 23
VDD – 0.5
V
0.5
V
1.0
µA
[P-channel open-drain output port mode]
High-level output voltage
VOH3
Output off leakage current
I OFF
IOH = –300 µA, Seg 1 to 23
VDD – 0.5
VOL = VSS, Seg 1 to 23
V
[N-channel open-drain output port mode]
Low-level output voltage
Output off leakage current
VOL3
I OFF
IOL = 300 µA, Seg 1 to 23
0.5
V
VOH = VDD, Seg 1 to 23
1.0
µA
[Static drive]
High-level output voltage
VOH4
IOH = –20 µA, Seg 1 to 23
Low-level output voltage
VOL4
IOL = 20 µA, Seg 1 to 23
High-level output voltage
VOH5
IOH = –100 µA, COM1
Low-level output voltage
VOL5
IOL = 100 µA, COM1
VDD – 0.2
V
0.2
VDD – 0.2
V
V
0.2
V
[1/2 bias drive]
High-level output voltage
VOH4
IOH = –20 µA, Seg 1 to 23
Low-level output voltage
VOL4
IOL = 20 µA, Seg 1 to 23
High-level output voltage
VOH5
IOH = –100 µA, COM1 to 4
VDD – 0.2
IOH = –100 µA, COM1 to 4
Output middle-level voltage
VOM
Low-level output voltage
VOL5
IOL = 100 µA, COM1 to 4
IOL = 100 µA, COM1 to 4
VDD – 0.2
V
0.2
V
VDD/2 – 0.2
VDD/2 + 0.2
V
–0.2
+0.2
V
0.2
V
V
[1/3 bias drive]
High-level output voltage
Output middle-level voltage
VOH4
IOH = –20 µA, Seg1 to 23
VDD – 0.2
VOM1-1
IOH = –20 µA, Seg1 to 23
2VDD/3 – 0.2
2VDD/3 + 0.2
V
VDD/3 – 0.2
VDD/3 + 0.2
V
0.2
V
V
VOM1-2
IOL = 20 µA, Seg1 to 23
Low-level output voltage
VOL4
IOL = 20 µA, Seg 1 to 23
High-level output voltage
VOH6
IOH = –100 µA, COM1 to 4
VDD – 0.2
VOM2-1
IOH = –100 µA, COM1 to 4
2VDD/3 – 0.2
2VDD/3 + 0.2
V
VOM2-2
IOL = 100 µA, COM1 to 4
VDD/3 – 0.2
VDD/3 + 0.2
V
VOL6
IOL = 100 µA, COM1 to 4
0.2
V
Output middle-level voltage
Low-level output voltage
Note *: The 20 pins S1 to S4, K1 to K4, P1 to P4, M1 to M4, and SO1 to SO4.
V
Continued on next page.
No. 6008-12/15
LC587208A, 587206A, 587204A, 587202A
Continued from preceding page.
Parameter
Supply leakage current
Input leakage current
Output voltage 1
Symbol
0.2
1.0
µA
VDD = 3.0 V, Ta = 50°C
1.0
5.0
µA
1.0
µA
I OFF
VDD1-1
IDD1-2
IDD2-2
IDD3-2
IDD4-1
Supply current 4
Oscillator startup voltage
IDD4-2
VSTT
Oscillator hold voltage
VHOLD
Oscillator startup time
TSTT
Oscillator stability
Oscillator startup voltage
∆f
VSTT
VDD = 3.0 V, S1 to 4, K1 to 4, P1 to 4, M1
VIN = VDD
to 4, SO1 to 4, INT, RES
(With the K, P, M, and SO ports in input
mode and with the open specifications
VIN = VSS
selected for the INT and RES pins.)
VDD = 3.0 V, C1 = C2 = 0, 1 µF, VDD1 = VDD2, 1/2Bias,
fopg = 32.768 kHz
µA
20
µA
150
µA
200
µA
Tstt ≤ 5 s
VDD = 2.2 V
Crystal oscillator specifications
Crystal: 32 kHz (Cd and Rd built in)
Cg = 11 pF, CI = 31 kΩ
2.0
VDD = 2.95 to 3.05 V
Tstt ≤ 5 s
Tstt ≤ 30 ms
Oscillator hold voltage
VHOLD
Oscillator startup time
TSTT
VDD = 2.2 V
VSTT
Tstt ≤ 30 ms
Oscillator hold voltage
VHOLD
Oscillator startup time
TSTT
VDD = 2.5 V
VSTT
Tstt ≤ 30 ms
Cd
15
160
VSTT
Oscillator correction capacitance
7
VDD = 3.0 V, Ta = 25°C CF oscillator specifications
CF: 4000 kHz
Ccg = Ccd = 33 pF
VDD = 3.0 V, Ta = 50°C Halt mode, LCD = 1/3 bias
Oscillator startup voltage
TSTT
V
150
VDD = 2.4 V
Oscillator startup time
1.7
VDD = 3.0 V, Ta = 25°C CF oscillator specifications
CF: 1000 kHz
Ccg = Ccd = 100 pF
VDD = 3.0 V, Ta = 50°C Halt mode, LCD = 1/3 bias
TSTT
VHOLD
1.5
100
Oscillator startup time
Oscillator startup voltage
1.3
µA
VDD = 3.0 V, Ta = 25°C CF oscillator specifications
CF: 455 kHz
Ccg = Ccd = 220 pF
VDD = 3.0 V, Ta = 50°C Halt mode, LCD = 1/3 bias
VHOLD
Oscillator hold voltage
–1.0
VDD = 3.0 V, Ta = 25°C Crystal oscillator specifications
Crystal: 32 kHz (Cd and Rd built in)
Cg = 11 pF, CI = 31 kΩ
VDD = 3.0 V, Ta = 50°C Halt mode, LCD = 1/3bias
Oscillator hold voltage
Oscillator startup voltage
Unit
max
VDD = 3.0 V, Ta = 25°C
IDD3-1
Supply current 3
typ
ILEK2
IDD2-1
Supply current 2
Ratings
min
ILEK1
IDD1-1
Supply current 1
Conditions and applicable pins
VDD = 2.8 V
Crystal oscillator specifications
Crystal: 38 or 65 kHz
XCg = 12 pF, CI ≤ 31 kΩ
2.2
CF oscillator specifications
With a 455-kHz CF element used
Ccg = Ccd = 220 pF
2.1
CF oscillator specifications
With a 1-MHz CF element used
Ccg = Ccd = 100 pF
2.4
CF oscillator specifications
With a 4-MHz CF element used
Ccg = Ccd = 33 pF
VDD = 3.0 V, XTOUT (built in)
2.7
20
200
µA
300
µA
220
µA
330
µA
2.2
V
6.0
V
5
s
3
ppm
2.4
V
6.0
V
5
s
2.2
V
6.0
V
30
ms
2.5
V
6.0
V
30
ms
2.8
V
6.0
V
30
ms
pF
Continued on next page.
No. 6008-13/15
LC587208A, 587206A, 587204A, 587202A
Continued from preceding page.
Parameter
Input resistance
Symbol
Conditions and applicable pins
Ratings
min
typ
Unit
max
RIN1 A
VIN = 0.2 VDD, Low level hold transistor*
30
120
500
kΩ
RIN1 B
VIN = VDD, Pull-down resistor*
10
50
200
kΩ
RIN1 C
VIN = 0.8 VDD, High level hold transistor*
30
120
500
kΩ
RIN1 D
VIN = VSS, Pull-up resistor*
10
50
200
kΩ
RIN2 A
VIN = 0.2 VDD, INT pin low level hold transistor
RIN2 B
VIN = VDD, INT pin pull-down resistor
RIN2 C
VIN = 0.8 VDD, INT pin high level hold transistor
RIN2 D
VIN = VSS, INT pin pull-up resistor
30
120
500
kΩ
100
500
2000
kΩ
30
120
500
kΩ
100
500
2000
kΩ
RIN3
VIN = VDD, RES pin pull-down resistor
10
30
50
kΩ
RIN4
VIN = VSS, RES pin pull-up resistor
10
30
50
kΩ
10
30
50
kΩ
RIN5
VIN = VDD, TST pin pull-down resistor
High-level output voltage
VOH1
IOH = –5.0 mA, N1 to 4
Low-level output voltage
VOL1
IOL = 5.0 mA, N1 to 4
High-level output voltage
VOH2
IOH = –1.0 mA, K1 to 4, P1 to 4, M1 to 4, SO1 to 4
(With the K, P, M, and SO ports in output mode)
Low-level output voltage
VOL2
IOL = 2.0 mA, K1 to 4, P1 to 4, M1 to 4, SO1 to 4
(With the K, P, M, and SO ports in output mode)
0.5
V
VOH = 10.5 V, N1 to 4 (Open specifications)
1.0
µA
Output off leakage current
I OFF
VDD – 0.5
V
0.5
VDD – 0.5
V
V
Segment Port Output Impedances
[CMOS output port mode]
High-level output voltage
VOH3
IOH = –500 µA, Seg 1 to 23
Low-level output voltage
VOL3
IOL = 500 µA, Seg 1 to 23
VDD – 0.5
V
0.5
V
1.0
µA
[P-channel open-drain output port mode]
High-level output voltage
VOH3
Output off leakage current
I OFF
IOH = –500 µA, Seg 1 to 23
VDD – 0.5
VOL = VSS, Seg 1 to 23
V
[N-channel open-drain output port mode]
Low-level output voltage
Output off leakage current
VOL3
I OFF
IOL = 500 µA, Seg 1 to 23
0.5
V
VOH = VDD, Seg 1 to 23
1.0
µA
[Static drive]
High-level output voltage
VOH4
IOH = –40 µA, Seg 1 to 23
Low-level output voltage
VOL4
IOL = 40 µA, Seg 1 to 23
High-level output voltage
VOH5
IOH = –400 µA, COM1
Low-level output voltage
VOL5
IOL = 400 µA, COM1
VDD – 0.2
V
0.2
VDD – 0.2
V
V
0.2
V
[1/2 bias drive]
High-level output voltage
VOH4
IOH = –40 µA, Seg 1 to 23
Low-level output voltage
VOL4
IOL = 40 µA, Seg 1 to 23
High-level output voltage
VOH5
IOH = –400 µA, COM1 to 4
VDD – 0.2
IOH = –400 µA, COM1 to 4
IOL = 400 µA, COM1 to 4
Output middle-level voltage
VOM
Low-level output voltage
VOL5
IOL = 400 µA, COM1 to 4
VDD – 0.2
V
0.2
V
VDD/2 – 0.2
VDD/2 + 0.2
V
VDD/2 – 0.2
VDD/2 + 0.2
V
0.2
V
V
[1/3 bias drive]
High-level output voltage
Output middle-level voltage
VOH4
IOH = –40 µA, Seg1 to 23
VDD – 0.2
VOM1-1
IOH = –40 µA, Seg1 to 23
2VDD/3 – 0.2
2VDD/3 + 0.2
V
2VDD/3 – 0.2
2VDD/3 + 0.2
V
0.2
V
V
VOM1-2
IOL = 40 µA, Seg1 to 23
Low-level output voltage
VOL4
IOL = 40 µA, Seg 1 to 23
High-level output voltage
VOH6
IOH = –400 µA, COM1 to 4
VDD – 0.2
VOM2-1
IOH = –400 µA, COM1 to 4
2VDD/3 – 0.2
2VDD/3 + 0.2
V
VOM2-2
IOL = 400 µA, COM1 to 4
VDD/3 – 0.2
VDD/3 + 0.2
V
VOL6
IOL = 400 µA, COM1 to 4
0.2
V
Output middle-level voltage
Low-level output voltage
V
Continued on next page.
No. 6008-14/15
LC587208A, 587206A, 587204A, 587202A
Continued from preceding page.
Parameter
Supply leakage current
Input leakage current
Output voltage 2
Output voltage 3
Current drain 1
Symbol
0.2
1.0
µA
VDD = 6.0 V, Ta = 50°C
1.0
5.0
µA
1.0
µA
VDD1-2
VDD = 3.0 V, S1 to 4, K1 to 4, P1 to 4, M1
VIN = VDD
to 4, SO1 to 4, INT, RES
(With the K, P, M, and SO ports in input
mode and with the open specifications
VIN = VSS
selected for the INT and RES pins.)
VDD = 5.0 V, C1 = C2 = 0.1 µF, VDD1 = VDD2, 1/2Bias,
fopg = 32.768 kHz
I OFF
–1.0
µA
2.4
2.5
2.6
V
VDD1-3
VDD = 5.0 V, C1 = C2 = 0.1 µF
1.4
1.67
1.8
V
VDD2-3
1/3 bias, fopg = 32.768 kHz
3.1
3.33
3.5
V
IDD1-1
VDD = 5.0 V, Ta = 25°C Crystal oscillator specifications
Crystal: 32 kHz (Cd and Rd built in)
Cg = 11 pF, CI = 31 kΩ
VDD = 5.0 V, Ta = 50°C Halt mode, LCD = 1/3bias
45.0
60.0
µA
65
µA
VDD = 5.0 V, Ta = 25°C CF oscillator specifications
CF: 455 kHz
Ccg = Ccd = 220 pF
VDD = 5.0 V, Ta = 50°C Halt mode, LCD = 1/3 bias
450
600
µA
650
µA
VDD = 5.0 V, Ta = 25°C CF oscillator specifications
CF: 4000 kHz
Ccg = Ccd = 33 pF
VDD = 5.0 V, Ta = 50°C Halt mode, LCD = 1/3 bias
500
VDD = 5.0 V, Ta = 25°C CF oscillator specifications
CF: 6000 kHz
Ccg =. Ccd = 33 pF
VDD = 5.0 V, Ta = 50°C Halt mode, LCD = 1/3 bias
800
IDD3-1
IDD3-2
IDD4-1
IDD4-2
Oscillator correction capacitance
Unit
max
VDD = 6.0 V, Ta = 25°C
IDD2-2
Current drain 4
typ
ILEK2
IDD2-1
Current drain 3
Ratings
min
ILEK1
IDD1-2
Current drain 2
Conditions and applicable pins
Cd
VDD = 5.0 V, XTOUT (built in)
700
µA
800
µA
1000
µA
1150
µA
20
pF
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer’s
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer’s products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any and all SANYO products described or contained herein fall under strategic
products (including services) controlled under the Foreign Exchange and Foreign Trade Control Law of
Japan, such products must not be exported without obtaining export license from the Ministry of
International Trade and Industry in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification”
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
This catalog provides information as of September, 1998. Specifications and information herein are
subject to change without notice.
PS No. 6008-15/15