19-2964; Rev 0; 8/03 KIT ATION EVALU E L B AVAILA Parallelable, Clamped Two-Switch Power-Supply Controller IC The MAX5051 power-supply controller is primary as well as secondary-side parallelable, allowing the design of scaleable power systems when necessary. When paralleling the primary side, dedicated pins allow for simultaneous wakeup or shutdown of all paralleled units, thus preventing current-hogging during startup or fault conditions. The MAX5051 generates a lookahead signal for driving secondary-side synchronous MOSFETs. Special primary-side synchronization inputs/outputs allow two primaries to be operated 180° out of phase for increased output power and lower input ripple currents. The MAX5051 is available in a 28-pin TSSOP-EP package and operates over a wide -40°C to +125°C temperature range. Warning: The MAX5051 is designed to work with high voltages. Exercise caution. Features ♦ Wide Input Voltage Range, 11V to 76V ♦ Voltage Mode with Input Voltage Feed-Forward ♦ Ripple-Phased Parallel Topology for High Current/Power Output ♦ 2A Integrated High- and Low-Side MOSFET Drivers ♦ SYNCIN And SYNCOUT Pins Enable 180° Out-OfPhase Operation ♦ Programmable Brownout and Bootstrap UVLOs ♦ High-Side Driver Bootstrap Capacitor Precharge Driver ♦ Low Current-Limit Threshold for High Efficiency ♦ Programmable Switching Frequency ♦ Reference Voltage Soft-Start for Startup Without Overshoots ♦ Startup Synchronization with Multiple Paralleled Primaries ♦ Programmable Integrating Current-Limit Fault Protection ♦ Look-Ahead PWM Signal for Secondary-Side Synchronous Rectifier Drivers ♦ Look-Ahead Drivers for Either A High-Speed Optocoupler or Pulse Transformer ♦ Wide -40°C to +125°C Operating Range ♦ Thermally Enhanced 28-Pin TSSOP Package Applications High-Efficiency, Isolated Telecom/Datacom Power Supplies 48V and 12V Server Power Supplies 48V Power-Supply Modules 42V Automotive Power Systems Industrial Power Supplies Ordering Information PART MAX5051AUI TEMP RANGE -40°C to +125°C PIN-PACKAGE 28-TSSOP-EP* *EP = Exposed pad. Pin Configuration appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX5051 General Description The MAX5051 is a clamped, two-switch power-supply controller IC. This device can be used both in forward or flyback configurations with input voltage ranges from 11V to 76V. It provides comprehensive protection mechanisms against possible faults, resulting in very high reliability power supplies. When used in conjunction with secondary-side synchronous rectification, power-supply efficiencies can easily reach 92% for a +3.3V output power supply operated from a 48V bus. The integrated high- and low-side gate drivers provide more than 2A of peak gate-drive current to two external N-channel MOSFETs. Low startup current reduces the power loss across the bootstrap resistor. A feed-forward voltagemode topology provides excellent line rejection while avoiding the pitfalls of traditional current-mode control. MAX5051 Parallelable, Clamped Two-Switch Power-Supply Controller IC ABSOLUTE MAXIMUM RATINGS AVIN, PVIN, XFRMRH to GND................................-0.3V to +80V BST to GND ............................................................-0.3V to +95V BST, DRVH to XFRMRH..........................................-0.3V to +12V REG9, DRVDD, DRVL to GND................................-0.3V to +12V DRVB, LXVDD, LXL, LXH to GND ..........................-0.3V to +12V UVLO, STT, COMP, CON to GND ..........................-0.3V to +12V FLTINT, RCFF to GND ............................................-0.3V to +12V REG5, CS, CSS, FB to GND .....................................-0.3V to +6V STARTUP, SYNCIN to GND......................................-0.3V to +6V SYNCOUT, RCOSC to GND .....................................-0.3V to +6V PGND to GND .......................................................-0.3V to +0.3V LXL, LXH Current Continuous...........................................±50mA DRVL, DRVH Current Continuous...................................±100mA DRVL, DRVH Peak Current (<500ns) ....................................±5A PVIN, REG9 Continuous Current ....................................+120mA REG5 Continuous Current ................................................+80mA DRVB, RCFF, RCOSC, CSS Continuous Current .............±20mA COMP, SYNCOUT Continuous Current ............................±20mA REG9, REG5, and COMP Short to GND ....................Continuous Continuous Power Dissipation (TA = +70°C) 28-Pin TSSOP (derate 23.8mW/°C above +70°C) .....1905mW 28-Pin TSSOP (θJA)......................................................42°C/W Operating Temperature Range .........................-40°C to +125°C Maximum Junction Temperature (TJ) ..............................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (AVIN = 12V, PVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7µF, CREG5 = 4.7µF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. All driver, voltage-regulator, and reference outputs unconnected except for bypass capacitors.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS VAVIN = VPVIN = 11V to 76V; VSTARTUP = VCS = 0V; VBST = VXFRMRH = VDRVDD = VREG9; RCFF floating 300 450 µA 400 650 µA VAVIN = VPVIN = 11V to 76V; VCS = 0V; VBST = VDRVDD = VREG9; VXFRMRH = 0V; STARTUP, RCFF floating 0.65 1 mA 8 12 mA 76 V SUPPLY CURRENT (AVIN, PVIN) AVIN Standby Current IASTBY PVIN Standby Current IPSTBY AVIN Supply Current IAVIN PVIN Supply Current IPVIN AVIN Input Voltage Range Inferred from AVIN supply current test 11 +9V LDO (REG9) PVIN Input Voltage Range VPVIN Inferred from PVIN supply current test 11 76 V REG9 Output-Voltage Set Point VREG9 VPVIN = 11V 8.3 9.0 V REG9 Line Regulation VPVIN = 11V to 76V REG9 Load Regulation IREG9 = 0 to 80mA REG9 Dropout Voltage IREG9 = 80mA REG9 Undervoltage Lockout Threshold VREG9 falling 0.1 mV/V 250 0.5 5.7 REG9 Undervoltage Lockout Threshold Hysteresis mV V 6.7 750 V mV +5V LDO (REG5) REG5 Output-Voltage Set Point VREG5 4.8 REG5 Load Regulation IREG5 = 0 to 40mA REG5 Dropout Voltage IREG5 = 40mA, measured with respect to VREG9 2 0.5 _______________________________________________________________________________________ 5.1 V 50 mV V Parallelable, Clamped Two-Switch Power-Supply Controller IC (AVIN = 12V, PVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7µF, CREG5 = 4.7µF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. All driver, voltage-regulator, and reference outputs unconnected except for bypass capacitors.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 1.215 1.235 1.255 V SOFT-START/REFERENCE (CSS) Reference Voltage VCSS Soft-Start Pullup Current ICSS 70 µA ERROR AMPLIFIER (CSS, FB, COMP) FB Input Range VFB Inferred from FB offset voltage test FB Input Current IFB VFB = VREF COMP Output Range Inferred from FB offset voltage test COMP Output Sink Current VFB = 3V COMP Output Source Current 0 2.1 3 V ±250 nA 6.0 V 20 mA mA VFB = 0V 30 Open-Loop Gain GA 2.1V < VCOMP < 6V 80 dB Unity-Gain Bandwidth BW CCOMP = 50pF, ICOMP = ±5mA 3 MHz FB Offset Voltage VOS VFB = 0 to 3V; VCOMP = 2.1V to 6V; ICOMP = -5mA to +5mA COMP Output Slew Rate SR CCOMP = 50pF -3 +3 1 mV V/µs PVIN UNDERVOLTAGE LOCKOUT (STT) PVIN Undervoltage Lockout STT Threshold VSTT STT Input Impedance RSTT VPVIN rising 22 23.5 25 VSTT rising 1.18 1.24 1.30 V V 100 kΩ VFLTINT = 0V 90 µA VFLTINT = rising 2.9 V 0.9 V µs INTEGRATING FAULT PROTECTION (FLTINT) FLTINT Source Current IFLTINT FLTINT Shutdown Threshold VFLTINTSD FLTINT Restart Hysteresis VFLTINTHY OSCILLATOR (RCOSC, SYNCIN, SYNCOUT) PWM Period Maximum PWM Duty Cycle tS RRCOSC = 24kΩ, CRCOSC = 100pF 3.9 DMAX RRCOSC = 24kΩ, CRCOSC = 100pF 48 % 1 MHz 500 kHz Maximum RCOSC Frequency fRCOSCMAX Maximum SYNCIN Frequency fSYNCIN 50% duty cycle SYNCIN High-Level Voltage VHSYNCIN Pulse rising SYNCIN Low-Level Voltage VLSYNCIN Pulse falling 2.1 V 0.8 V SYNCIN Pulldown Resistor 100 kΩ SYNCIN Rising to SYNCOUT Falling Delay 30 ns SYNCIN Falling to SYNCOUT Rising Delay 70 ns _______________________________________________________________________________________ 3 MAX5051 ELECTRICAL CHARACTERISTICS (continued) MAX5051 Parallelable, Clamped Two-Switch Power-Supply Controller IC ELECTRICAL CHARACTERISTICS (continued) (AVIN = 12V, PVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7µF, CREG5 = 4.7µF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. All driver, voltage-regulator, and reference outputs unconnected except for bypass capacitors.) PARAMETER SYMBOL SYNCOUT Voltage High CONDITIONS Sourcing 1.2mA SYNCOUT Voltage Low MIN TYP 4.5 Sinking 2.4mA RCOSC Peak Trip Level VTH MAX UNITS 5.1 V 0.3 V 2.5 V RCOSC Valley Trip Level 0.2 V RCOSC Input Bias Current -0.3 µA RCOSC Discharge MOSFET RDS(ON) Sinking 10mA 50 RCOSC Discharge Pulse Width 100 50 Ω ns UNDERVOLTAGE LOCKOUT (UVLO) UVLO Threshold UVLO Hysteresis UVLO Input Bias Current VUVLO VUVLO rising 1.18 VUVLO = 2.5V -100 +100 nA 0 3 V 100 Ω 0 6 V VHYS IBUVLO 1.24 1.30 130 V mV PWM COMPARATOR RCFF Input Voltage Range Feed-Forward Discharge MOSFET RDS(ON) RDS(RCFF) Sinking 10mA CON Input Voltage Range 50 RCFF Level-Shift Voltage VCPWM 2.2 2.4 V CON Input Bias Current ICON -2 +2 µA Propagation Delay to Output tdCPWM DRVH, DRVL = unconnected, overdrive = 50mV, measured from CON to DRVL 90 ns SYNCHRONOUS RECTIFIER PULSE TRANSFORMER DRIVER (LXVDD, LXH, LXL) High-Side MOSFET RDS(ON) RDSLXH LXH sourcing 10mA, VLXVDD = VREG5 Low-Side MOSFET RDS(ON) RDSLXL LXL sinking 10mA, VLXVDD = VREG5 3 2.0 LXH Rising to DRVL Rising Delay 6.5 12 5 10 90 Ω Ω ns CURRENT-LIMIT COMPARATOR (CS) Current-Limit Threshold Voltage VILIM Current-Limit Input Bias Current IBILIM 0 < VCS < 0.3V 144 Propagation Delay to Output tdILIM DRVH, DRVL = unconnected, overdrive = 10mV, measured from CS to DRVL 154 -2 164 mV +2 µA 100 ns LOW-SIDE MOSFET DRIVER (DRVDD, DRVL, PGND) Peak Source Current VDRVL = 0V, pulse width < 100ns; VDRVDD = VREG9 2 A Peak Sink Current VDRVL = VREG9, pulse width < 100ns; VDRVDD = VREG9 5 A DRVL Resistance Sourcing IDRVL = 50mA, VDRVDD = VREG9 1.7 3.5 Ω DRVL Resistance Sinking IDRVL = -50mA, VDRVDD = VREG9 0.6 1.4 Ω 4 _______________________________________________________________________________________ Parallelable, Clamped Two-Switch Power-Supply Controller IC (AVIN = 12V, PVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7µF, CREG5 = 4.7µF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. All driver, voltage-regulator, and reference outputs unconnected except for bypass capacitors.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS HIGH-SIDE MOSFET DRIVER (BST, DRVH, XFRMRH) Peak Source Current VDRVH = GND, pulse width < 100ns, VBST = VREG9, VXFRMRH = 0V 2 A Peak Sink Current VDRVH = VBST, pulse width < 100ns, VBST = VREG9, VXFRMRH = 0V 5 A DRVH Resistance Sourcing IDRVH = 50mA, VBST = VREG9, VXFRMRH = 0V 1.7 3.5 Ω DRVH Resistance Sinking IDRVH = -50mA, VBST = VREG9, VXFRMRH = 0V 0.6 1.4 Ω Skew Between Low-Side and High-Side Drivers 0 ns BOOST CAPACITOR CHARGE MOSFET (DRVB) DRVB Resistance Sourcing IDRVB = 50mA 8 35 Ω DRVB Resistance Sinking IDRVB = 50mA 5 35 Ω Delay from Clock Fall 200 ns One-Shot Pulse Width 300 ns STARTUP (STARTUP) Startup Threshold VSTARTUP VSTARTUP rising Startup Threshold Hysteresis Internal Pullup Current ISTARTUP STARTUP Pulldown MOSFET RDS(ON) 1.4 2.1 V 330 mV 50 µA 100 Ω Sinking 10mA 50 Temperature rising 150 °C 10 °C OVERTEMPERATURE SHUTDOWN Shutdown Junction Temperature Hysteresis _______________________________________________________________________________________ 5 MAX5051 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VAVIN = VPVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7µF, CREG5 = 4.7µF, TA = +25°C, unless otherwise noted.) AVIN STANDBY CURRENT vs. TEMPERATURE 260 250 240 230 220 20 30 40 50 60 70 230 220 210 200 MAX5051 toc03 500 400 300 200 100 0 -50 80 -25 0 25 50 75 100 125 10 40 50 60 PVIN SUPPLY VOLTAGE (V) PVIN STANDBY CURRENT vs. TEMPERATURE PVIN STARTUP VOLTAGE vs. TEMPERATURE REG9 OUTPUT VOLTAGE vs. PVIN VOLTAGE 300 200 100 23.5 23.4 23.3 23.2 0 25 50 75 100 125 80 8.799 8.796 8.970 -50 -25 0 25 50 75 100 125 10 20 30 40 50 60 TEMPERATURE (°C) TEMPERATURE (°C) PVIN VOLTAGE (V) REG9 OUTPUT VOLTAGE vs. TEMPERATURE REG9 OUTPUT VOLTAGE vs. REG9 OUTPUT CURRENT REG5 OUTPUT VOLTAGE vs. REG5 OUTPUT CURRENT 8.84 8.82 8.80 8.78 8.76 8.9 8.8 8.7 8.6 8.5 8.4 8.3 8.74 8.2 8.72 8.1 8.70 25 50 75 TEMPERATURE (°C) 100 125 5.6 5.2 4.8 4.4 4.0 8.0 0 6.0 MAX5051 toc09 8.86 9.0 REG5 OUTPUT VOLTAGE (V) 8.88 REG9 OUTPUT VOLTAGE (V) MAX5051 toc07 8.90 -25 70 8.802 8.793 23.0 -25 80 8.805 23.1 0 70 MAX5051 toc06 STT = FLOATING REG9 OUTPUT VOLTAGE (V) 400 MAX5051 toc05 23.6 PVIN STARTUP VOLTAGE (V) 500 -50 30 TEMPERATURE (°C) VUVLO = 0V -50 20 AVIN SUPPLY VOLTAGE (V) MAX5051 toc04 10 PVIN STANDBY CURRENT (µA) 240 180 200 6 250 VUVLO = 0V 190 210 600 260 600 PVIN STANDBY CURRENT (µA) 270 VUVLO = 0V 270 MAX5051 toc08 AVIN STANDBY CURRENT (µA) 280 280 PVIN STANDBY CURRENT vs. SUPPLY VOLTAGE MAX5051 toc02 VUVLO = 0V 290 AVIN STANDBY CURRENT (µA) 300 MAX5051 toc01 AVIN STANDBY CURRENT vs. AVIN SUPPLY VOLTAGE REG9 OUTPUT VOLTAGE (V) MAX5051 Parallelable, Clamped Two-Switch Power-Supply Controller IC 0 20 40 60 80 100 120 140 160 REG9 OUTPUT CURRENT (mA) 0 10 20 30 40 50 60 70 REG5 OUTPUT CURRENT (mA) _______________________________________________________________________________________ 80 90 Parallelable, Clamped Two-Switch Power-Supply Controller IC AVIN SUPPLY CURRENT vs. TEMPERATURE 4.996 4.995 4.994 4.993 4.992 500 400 300 200 4.990 -25 0 25 50 75 100 -50 -25 0 25 50 75 100 TEMPERATURE (°C) TEMPERATURE (°C) SOFT-START/REFERENCE VOLTAGE vs. TEMPERATURE CSS SOFT-START CURRENT vs. TEMPERATURE 1.230 1.225 1.220 1.215 1.210 6.8 -25 0 25 50 75 100 125 TEMPERATURE (°C) UVLO THRESHOLD vs. TEMPERATURE 1.240 85 1.235 1.230 80 UVLO (V) 1.235 6.9 -50 MAX5051 toc14 1.240 7.0 125 90 CSS SOFT-START CURRENT (µA) MAX5051 toc13 1.245 75 1.225 1.220 1.215 70 1.210 65 1.205 1.205 60 1.200 -25 0 25 50 75 100 -50 125 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) STT STARTUP THRESHOLD vs. TEMPERATURE FLTINT CURRENT vs. TEMPERATURE RCFF LEVEL-SHIFT VOLTAGE vs. TEMPERATURE 95 MAX5051 toc16 1.240 1.235 94 93 FLTINT CURRENT (µA) 1.230 1.225 1.220 1.215 1.210 92 91 90 89 88 87 1.205 1.200 0 25 50 75 TEMPERATURE (°C) 100 125 2.29 2.28 2.27 2.26 2.25 2.24 2.23 2.22 2.20 85 -25 2.30 125 2.21 86 -50 1.200 MAX5051 toc18 -50 RCFF LEVEL-SHIFT VOLTAGE (V) SOFT-START/REFERENCE VOLTAGE (V) 125 7.1 6.6 0 -50 VPVIN = 12V 6.7 100 4.991 STT (V) 7.2 MAX5051 toc15 4.997 600 MAX5051 toc17 OUTPUT VOLTAGE (V) 4.998 VUVLO = 0V PVIN SUPPLY CURRENT (mA) 4.999 700 MAX5051 toc11 5.000 AVIN SUPPLY CURRENT (µA) MAX5051 toc10 5.001 PVIN SUPPLY CURRENT vs. TEMPERATURE MAX5051 toc12 REG5 OUTPUT VOLTAGE vs. TEMPERATURE -50 -25 0 25 50 75 TEMPERATURE (°C) 100 125 -50 -25 0 25 50 75 100 125 TEMPERATURE (°C) _______________________________________________________________________________________ 7 MAX5051 Typical Operating Characteristics (continued) (VAVIN = VPVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7µF, CREG5 = 4.7µF, TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (VAVIN = VPVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7µF, CREG5 = 4.7µF, TA = +25°C, unless otherwise noted.) GAIN 210 180 60 155 150 150 40 120 90 20 PHASE 145 60 0 -20 0.01 140 -25 0 25 50 75 100 125 0.1 1 10 100 FREQUENCY (kHz) DRVH AND DRVL RDSON vs. TEMPERATURE LXL AND LXH RDSON vs. TEMPERATURE RDSON (Ω) 2.0 LXH SOURCING 10mA 8 7 1.0 6 DRVH AND DRVL SINKING 50mA -25 0 25 50 75 100 100 30 25 20 15 10 0 -15 10 35 60 85 0 110 40 80 120 160 TEMPERATURE (°C) RRCOSC (kΩ) NORMALIZED SWITCHING FREQUENCY vs. TEMPERATURE SYNCIN TO SYNCOUT PROPAGATION DELAY vs. TEMPERATURE DRVH MAXIMUM DUTY CYCLE vs. TEMPERATURE 0.990 0.980 0.970 100 90 80 70 60 50 0.960 SWITCHING -25 0 25 50 75 TEMPERATURE (°C) 100 125 49.2 48.8 48.4 48.0 47.6 47.2 46.4 30 -50 49.6 46.8 SYNCIN RISE TO SYNCOUT FALL 40 0.950 200 MAX5051 toc27 110 DRVH DUTY CYCLE (%) 1.000 SYNCIN FALL TO SYNCOUT RISE 120 50.0 MAX5051 toc26 MAX5051 toc25 130 PROPAGATION DELAY (ns) 1.010 125 35 TEMPERATURE (°C) 1.020 8 75 5 -40 125 50 40 4 -50 25 45 5 0 0 50 LXH SINKING 10mA 0.5 -25 SWITCHING PERIOD vs. RRCOSC 9 1.5 -50 SWITCHING PERIOD (µs) DRVH AND DRVL SOURCING 50mA ISINK = 5mA 2 0 10 2.5 3 0 1000 10,000 11 3.0 4 1 12 MAX5051 toc22 3.5 5 TEMPERATURE (°C) TEMPERATURE (°C) 4.0 ISOURCE = 5mA 6 30 MAX5051 toc23 -50 7 MAX5051 toc24 160 8 240 COMP OUTPUT VOLTAGE (V) 80 270 PHASE (DEGREES) MAX5051 toc19 165 MAX5051 toc20 100 GAIN (dB) CS THRESHOLD VOLTAGE (mV) 170 RDSON (Ω) COMP OUTPUT VOLTAGE vs. TEMPERATURE OPEN-LOOP GAIN/PHASE vs. FREQUENCY MAX5051 toc21 CURRENT-LIMIT THRESHOLD vs. TEMPERATURE NORMALIZED SWITCHING FREQUENCY MAX5051 Parallelable, Clamped Two-Switch Power-Supply Controller IC 46.0 -50 -25 0 25 50 75 TEMPERATURE (°C) 100 125 -50 -25 0 25 50 75 TEMPERATURE (°C) _______________________________________________________________________________________ 100 125 Parallelable, Clamped Two-Switch Power-Supply Controller IC CS CURRENT LIMIT TO DRVH PROPAGATION DELAY vs. TEMPERATURE CON TO DRVL PROPAGATION DELAY vs. TEMPERATURE 150 100 95 90 85 80 75 70 MAX5051 toc29 50mV OVERDRIVE 50mV OVERDRIVE 140 PROPAGATION DELAY (ns) PROPAGATION DELAY (ns) 105 MAX5051 toc28 110 130 120 110 100 90 65 80 60 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) Pin Description PIN NAME 1 RCOSC 2 SYNCOUT FUNCTION Oscillator Frequency Set Input. Connect a resistor from RCOSC to REG5 and a capacitor from RCOSC to GND to set the oscillator frequency. Switching frequency is 1/2 the frequency of the sawtooth signal at RCOSC. Synchronization Output. Synchronization signal to drive SYNCIN of a second MAX5051, if used. 3 RCFF Feed-Forward Input. Connect a resistor from RCFF to AVIN and a capacitor from RCFF to GND. This is the PWM ramp. 4 CON PWM Comparator Noninverting Input. Connect CON to the optocoupler output for isolated applications, or to COMP for nonisolated applications. 5 CSS Soft-Start and Reference. Connect a 0.01µF or greater capacitor from CSS to GND. The 1.24V reference voltage appears across this capacitor. 6 COMP Internal Error Amplifier Output Feedback Input. Inverting input of the internal error amplifier. The soft-started reference is connected to the noninverting input of this amplifier. 7 FB 8 REG5 5V Linear Regulator Output. Bypass REG5 to GND with a 4.7µF ceramic capacitor. 9 REG9 9V Linear Regulator Output. Bypass REG9 to GND with a 4.7µF ceramic capacitor. 10 PVIN Regulator Voltage Input. Voltage input to the internal 5V and 9V linear regulators. A high-value resistor connected from the input supply to PVIN provides the necessary current to charge up the startup capacitor, and the 400µA standby current required by the MAX5051. After startup, the output of a tertiary winding is used to provide continued bias to the controller. 11 STT Startup Threshold Input. Leave STT floating for a default startup voltage of 24V at PVIN. STT can be modified by connecting external resistors. For high accuracy, choose external resistors with 50kΩ or less impedance looking back into the divider. 12 LXVDD Supply Input for the Secondary-Side Synchronous Pulse Transformer or Optocoupler Driver. LXVDD is normally connected to REG5. _______________________________________________________________________________________ 9 MAX5051 Typical Operating Characteristics (continued) (VAVIN = VPVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7µF, CREG5 = 4.7µF, TA = +25°C, unless otherwise noted.) Parallelable, Clamped Two-Switch Power-Supply Controller IC MAX5051 Pin Description (continued) PIN NAME FUNCTION 13 LXH Synchronous-Pulse Transformer Driver, PMOS Open Drain. LXH is the high-side driver for the secondaryside synchronous-pulse transformer. LXH can also drive a high-speed switching optocoupler. If not used, connect LXH to LXVDD. 14 LXL Synchronous-Pulse Transformer Driver, NMOS Open Drain. LXL is the low-side driver for the secondaryside synchronous-pulse transformer. LXL can also drive a high-speed switching optocoupler. If not used, connect LXL to PGND. 15 CS Current-Sense Input. The current-limit threshold is internally set to 156mV relative to PGND. The device has an internal noise filter. If necessary, connect an additional external RC filter. 16 DRVL Gate-Drive Output for Low-Side MOSFET. DRVL is capable of sourcing and sinking approximately 2A peak current. 17 PGND Power Ground 18 DRVDD Supply Input for Low-Side MOSFET Driver. Bypass DRVDD locally with good quality 1µF || 0.1µF ceramic capacitors. DRVDD is normally connected to REG9. 19 DRVB Gate-Drive Output for Boost MOSFET. Connect the gate of a small high-voltage external FET to this pin to enable charging of the high-side boost capacitor connected between pins 20 and 22. This FET may be necessary to keep the boost capacitor charged at light loads. 20 XFRMRH 21 DRVH 22 BST Boost Input. Boost supply connection point for the high-side MOSFET driver. Connect at least a 1µF || 0.1µF ceramic capacitor from BST to XFRMRH with short and wide PC board traces. If the voltage across the boost capacitor falls below the high-side undervoltage lockout threshold, the DRVH output stops switching. 23 AVIN Supply Voltage Input. Connect AVIN directly to the input supply line. 24 GND Analog Signal Ground 25 UVLO Undervoltage Lockout Input. An external voltage-divider from the input supply sets the startup voltage; the threshold is 1.24V with 130mV hysteresis. UVLO can also be used as a shutdown input. If unused, connect UVLO to REG5 26 STARTUP 27 FLTINT Fault Integration Input. During persistent current-limit faults, a capacitor connected to FLTINT is charged with an internal 90µA current source. Switching is terminated when the voltage reaches 2.9V. An external resistor connected in parallel discharges the capacitor. Switching resumes when the voltage drops to 2V. SYNCIN Synchronization Input. SYNCIN accepts the synchronization signal from SYNCOUT of another MAX5051 and shifts the switching of the synchronized unit by 180° allowing the reduction of input bypass capacitors. The MAX5051 switches at the same frequency at SYNCIN. SYNCIN must be 50% duty cycle. Leave SYNCIN floating if unused. 28 10 Transformer Input. Transformer primary high-side connection. Gate-Drive Output for High-Side MOSFET Startup Input. STARTUP coordinates simultaneous startup of multiple units from faults, during initial turnon, and UVLO recovery. When paralleling the secondaries of two MAX5051’s, the STARTUP inputs of each device must be connected together. ______________________________________________________________________________________ Parallelable, Clamped Two-Switch Power-Supply Controller IC 9V LDO PVIN REG9 5V LDO REG9 OK 18R REG5 REG5 OK MAX5051 OVER TEMP STT R THERMAL SHUTDOWN BST LEVEL SHIFT 1.25V 1.125V 25µs RISINGEDGE DELAY DRVH 60ns RISINGEDGE DELAY SHDN XFRMRH DRVDD DRVL UVLO PGND 1.25V 1.125V LXVDD INTERNAL REGULATOR AVIN INTERNAL SUPPLY 1.25V REFERENCE LEVEL SHIFT LXH LXL 80µA OSC RCOSC FLTINT SYNCIN 2.7V/1.8V SYNCOUT CS RCFF 2.34V CPWM CILIM SHDN 1 156mV 10MHz S D Q CON Q R 50µA COMP 2.7V/1.8V FB STARTUP E/A 64µA CSS DRVDD SHDN GND SSA 1.25V 200ns RISINGEDGE DELAY 300ns ONE SHOT LEVEL SHIFT DRVB ______________________________________________________________________________________ 11 MAX5051 Functional Diagram MAX5051 Parallelable, Clamped Two-Switch Power-Supply Controller IC Detailed Description The MAX5051 controller IC is designed for two-switch forward converter power-supply topologies. It incorporates an advanced set of protection features that makes it uniquely suitable when high reliability and comprehensive fault protection are required, as in power supplies intended for telecommunication equipment. The device operates over a wide 11V to 76V supply range. By using the MAX5051 with a secondary-side synchronous rectifier circuit, a very efficient low output voltage and high output-current power supply can be designed. In a typical application, the AVIN pin is connected directly to the input supply. The PVIN pin is connected to the input supply through a bleed resistor. This is used to charge up a reservoir capacitor. When the voltage across this capacitor reaches approximately 24V, then primary switching commences. If the tertiary winding is able to supply bias to the IC, then self boot-strapping takes place and operation continues normally. If the voltage across the reservoir capacitor connected to PVIN falls below 6.2V, then switching stops and the capacitor starts charging up again until the voltage across it reaches 24V. This device incorporates synchronization circuitry, enabling the direct paralleling of two devices for higher output power and lower input ripple current. Using a single pin, the circuitry synchronizes and shifts the phase of the second device by 180°. To enable simultaneous wakeup and shutdown, a STARTUP pin is provided. Connect all the STARTUP pins of all MAX5051 devices together to facilitate parallel operation in the primary side. When each power supply generates different output voltages, connecting the STARTUP pins is not necessary. Power Topology The two-switch forward-converter topology offers outstanding robustness against faults and transformer saturation while allowing the use of SO-8 power MOSFETs with a voltage rating equal to only that of the input supply voltage. Voltage-mode control with feed-forward compensation allows the rejection of input supply disturbances within a single cycle, similar to that of current-mode controlled topologies. This control method offers some significant benefits not possible with current-mode control. These benefits are: • No minimum duty-cycle requirement because of current-signal blanking; 12 • Clean modulator ramp and higher amplitude for increased stability; • Stable operating current of the optocoupler LED and phototransistor for maximized control-loop bandwidth (in current-mode applications, the optocoupler bias point is output-load dependent); • Predictable loop dynamics simplifying the design of the control loop. The two-switch power topology has the added benefit of recovering practically all magnetizing as well as the leakage energy stored in the parasitics of the isolation transformer. The lower clamped voltages on the primary power FETs allow for the use of low RDS(ON) devices. Figure 2 shows the schematic diagram of a 48V input 3.3V/10A output power supply built around the MAX5051. MOSFET Drivers The MAX5051’s integrated high- and low-side MOSFET drivers source and sink up to 2A of peak currents, resulting in very low losses even when switching high gate charge MOSFETs. The high-side gate driver requires its own bypass capacitor connected between BST and XFRMRH. Use high-quality ceramic capacitors close to these two pins for bypass. Under normal operating conditions, the energy stored in the transformer parasitics swings the XFRMRH pin to ground while the transformer is resetting. During this time, the charge on the boost capacitor connected to the BST pin is replenished. However, under certain conditions, such as when the magnetizing inductance of the transformer is very high or when using conventional rectification at the output, the duty cycle with light loads may become very small. Thus, the energy stored could be insufficient to swing XFRMRH to ground and replenish the boost capacitor. Figure 3 shows the equivalent circuit during the magnetizing inductance reset interval, assuming synchronous rectification where the output inductor is not allowed to run discontinuous. If the magnetizing inductance is kept below the following minimum, then the boost capacitor charge will not deplete: LM ≤ 0.294 d2 VIN 2 fs Qgtotal + (0.005A) fs where d is the duty cycle, VIN is the input voltage, fS is the switching frequency, and Qgtotal is the total gate charge for the high-side MOSFET. The above formula is only an approximation; the actual value will depend on other parasitics as well. ______________________________________________________________________________________ Parallelable, Clamped Two-Switch Power-Supply Controller IC D4 MA111CT R6 47Ω C8 4.7µF D3 BAT46W R5 10Ω C11 0.1µF R12 1MΩ C5 1µF BST REG9 PVIN FLTINT SYNCIN AVIN CSS STT C7 4.7µF C12 220nF XFRMRH GND N1 SI4486 DRVDD D1 RCOSC C13 100pF DRVH STARTUP MAX5051 USED FOR BOOST CAPACITOR PRECHARGE DRVL CS PGND fs = 250kHz L1 2µH D5 T1 3.3V 10A C4 3 x 270µF N2 SI4486 RLOAD D2 B2100 LXL LXH LXVDD SYNCOUT REG5 FB UVLO CON COMP R13 100kΩ N3 BSS123 DRVB RCFF C14 390pF T1 LM: 150µH P: 14T S: 4T T: 6T B2100 R9 15kΩ MAX5051 VIN+ R3 475Ω R4 28mΩ R14 24.9kΩ C3 150nF U2 R8 2.2kΩ R15 1MΩ R10 10Ω R11 39.2kΩ C10 4.7µF PS2913 R7 360Ω C9 1µF C2 220nF C6 270nF C1 47nF R1 11.5kΩ MAX8515 R2 2.55kΩ VIN- Figure 2. Typical Application Circuit If the charge stored on the boost capacitor is not adequately replenished then the gate-driver lockout for the high-side MOSFET is triggered, stopping the high side from switching. The low side continues switching, eventually recharging the capacitor, at which point the high side starts switching again. To prevent this behavior, use the boost capacitor’s cycle-by-cycle charging circuit to prevent unwanted shutdowns of the high side (Figure 2). Connect the gate of a small high-voltage FET (with the same voltage rating or higher as the main FETs) to the DRVB output of the MAX5051. Connect the drain of this FET to XFRMRH, and connect the source to the primary ground. DRVB will briefly (300ns) turn this FET ON every cycle after the main PWM clock terminates. This allows the boost capacitor to be replenished under all conditions, even when switching stops completely. A suitable FET for this is BSS123 or equivalent (100V, 170mA rated). The boost-capacitor charge IBST BST IBST IGD DRVH XFMRH VIN ILM LM REG9 DRVL Figure 3. Boost Capacitor Charging Path During Transformer Reset ______________________________________________________________________________________ 13 MAX5051 Parallelable, Clamped Two-Switch Power-Supply Controller IC diode is a high-voltage, small-signal Schottky type. It may be helpful to connect a resistor in series with this diode to minimize noise as well as reduce the peak charging currents. As in any other switching powersupply circuit, the gate-drive loops must be kept to a minimum. Plan PC board layout with the critical current carrying loops of the circuit as a starting point. Secondary-Side Synchronization The MAX5051 has additional (LXH and LXL) outputs to make the driving of secondary-side synchronous rectifiers possible with a signal from the primary. These signals lead in time, the actual gate drive applied to the main power FETs, and allow the secondary-side synchronous FETs to be commutated in advance of the power pulse. The synchronizing pulse is generated approximately 90ns ahead of the main pulse that drives the two power FETs. Synchronization is accomplished by connecting a small pulse transformer between LXH and LXL, along with some clamp diodes (D1 and D2 in Figure 4). This is a small integrated two-switch driver configuration that allows for full recovery of the stored energy in the magnetizing inductance of the pulse transformer, thereby significantly reducing the running bias current of the controller. It also allows for correct transfer of DC levels without requiring series capacitors with large time constants, assuring correct drive levels for the secondary circuit. Select a pulse transformer, T1, so the current buildup in its magnetizing inductance is low enough not to create a significant voltage droop across the internal driver FETs. Use the following formula to calculate the R1 4.7Ω MAX5051 approximate value of the primary magnetizing inductance of T1: RdsLXH + RdsLXL ts ≤ LM ≤ fs 16 Cds fs 2.5 where RdsLXH and RdsLXL are the internal high- and lowside pulse transformer driver on-resistances, fs is the switching frequency, LM is the pulse transformer primary magnetizing inductance, ts is the transition time at the drains of these FETs (typically < 40ns), and Cds is the total drain-source capacitance (approximately 10pF). Alternatively, a high-speed optocoupler (Figure 5) can be used instead of the pulse transformer. The lookahead pulse accommodates the propagation delays of the high-speed optocoupler as well as the delays through the gate drivers of the secondary-side FETs. Choose optocouplers with propagation delays of less than 50ns. Error Amplifier And Reference Soft-Start The error amplifier in the MAX5051 has an uncommitted inverting input (FB) and output (COMP). Use this amplifier when secondary isolation is not required. COMP can then be directly connected to CON (the input of the PWM comparator). The noninverting input of the error amplifier is connected to the soft-start generator and is also available externally at CSS. A capacitor connected to CSS is slewed linearly during initial startup with the 70µA internal current source (see Figure 2). This provides a linearly increasing reference to the noninverting input of the error amplifier forcing the output voltage also to slew proportionally. This method of soft-start is superior to other methods because the loop is always R1 4.7Ω MAX5051 REG5 REG5 LXVDD C1 1µF D1 LXH T1 D3 1N4148 R3 560Ω R2 2kΩ LXL D2 T1: PULSE ENGINEERING, PE-68386. D1, D2: CENTRAL SEMICONDUCTOR, CMOSH-3. Figure 4. Secondary-Side Synchronous Rectifier Driver Using Pulse Transformer U2 LXH LXL PGND 14 5V LXVDD PGND R2 2kΩ C1 1µF PS9715 HIGH-SPEED OPTO C2 Figure 5. Secondary-Side Synchronous Rectifier Driver Using High-Speed Optocoupler ______________________________________________________________________________________ Parallelable, Clamped Two-Switch Power-Supply Controller IC CCSS = 56µF / s × t SS where CCSS is the capacitor connected to CSS, tSS is the soft-start time required for the output voltage to rise from 0V to the rated output voltage. This only applies when this amplifier is used for output voltage regulation. PWM Ramp The PWM ramp is generated at RCFF. Connect a capacitor CRCFF from RCFF to ground and a resistor R RCFF from RCFF to AVIN. The ramp generated on RCFF is internally offset by 2.3V and applied to the noninverting input of the PWM comparator. The slope of the ramp is part of the overall loop gain. The dynamic range of RCFF is 0 to 3V, and so the ramp peak must be kept below that. Assuming the maximum duty cycle approaches 50% at minimum input voltage, use the following formula to calculate the minimum value of either the ramp capacitor or resistor: V RRCFF CRCFF ≥ INUVLO 2 fs VRPP where VINUVLO is the minimum input supply voltage (typically the PWM UVLO turn-on voltage), f S is the switching frequency, and V RPP is the peak-to-peak ramp voltage, typically 2V. Allow the ramp peak to be as high as possible to maximize the signal-to-noise ratio. The low-frequency smallsignal gain of the power stage, Gps (the gain from the inverting input of the PWM comparator to the output) can be calculated by using the following formula: Gps = Nsp RRCFF CRCFF fs where Nsp is the secondary-to-primary power transformer turns ratio. Internal Regulators The MAX5051 has two internal linear regulators that are used to power internal and external control circuits. The 9V regulator, REG9, is primarily used to power the high- and low-side gate drivers. Bypass REG9 with a 4.7µF ceramic capacitor or any other high-quality capacitor; use low-value ceramics in parallel as necessary. A 5V regulator also is provided, REG5, primarily used to bias the internal circuitry of the MAX5051. Bypass REG5 with a 4.7µF ceramic capacitor similar to the one used for REG9. Both of these regulators are always powered. When using bootstrapped startup through a bleed resistor, do not load these outputs while the MAX5051 is in standby as it may fail to start. Any external loading to this output should be such that the sum of their load and the standby current through PVIN of the MAX5051 is less than the current that the bleed resistor can supply. Startup Modes The MAX5051 can be configured for two different startup modes, allowing operation in either bootstrapped or direct power mode. Direct Power Mode In direct power mode, AVIN and PVIN are connected directly to the input supply. This is typical in 12V to 24V systems. The undervoltage lockout set at STT needs to be adjusted down with an external resistor-divider to an appropriate level. Bootstrapped Startup In bootstrap mode, a resistor is connected from the input supply to PVIN, where a capacitor to GND is charged towards the input supply. When this voltage reaches the startup threshold, the device wakes up and begins switching. A tertiary winding from the transformer is then used to sustain operation. The MAX5051 draws little current from PVIN before reaching the threshold, which allows a large-value bootstrap resistor and reduces its power dissipation after startup. A large startup hysteresis helps the design of the bootstrap circuit by providing longer running times during startup. After coming out of standby and before initiating the soft-start, the MAX5051 turns on the low-side FET to charge up the boost capacitor. A voltage detector has been incorporated in the high-side driver that prevents the high-side switch from turning on with insufficient voltage. It is also used to indicate when the boost capacitor has been charged. Once the capacitor is charged, soft-start commences. If the duty cycle is low, the magnetizing energy in the transformer may be insufficient to keep the bootstrap capacitor charged. DRVB (see Figure 2 dotted lines) has been provided to drive a small external FET connected between XFRMRH and PGND, and is pulsed every cycle to keep the capacitor charged. ______________________________________________________________________________________ 15 MAX5051 in control. Thus, the output-voltage slew rate is constant at light or heavy loads. Once the soft-start ends, the voltage on CSS regulates to 1.24V. Do not load CSS with external circuitry. A suitable range of capacitors connected to CSS is from 10nF to 0.1µF. Calculate the required soft-start capacitor based on the total outputvoltage startup time as follows: MAX5051 Parallelable, Clamped Two-Switch Power-Supply Controller IC Normally PVIN is derived from a tertiary winding of the transformer. However, at startup there is no energy delivered through the transformer, hence, a special bootstrap sequence is required. Figure 6 shows the voltages on PVIN, REG9, and REG5 during startup. Initially, PVIN, REG9, and REG5 are 0V. After the input voltage is applied, C21 (Figure 8) charges PVIN through the startup resistor, R22, to an intermediate voltage. At this point, the internal regulators begin charging C3 and C4. The MAX5051 uses only 400µA (typ) of the current supplied by R22, and the remaining current charges C21, C3, and C4. The charging of C4 and C3 stops when their voltages reach approximately 5V and 9V, respectively, while PVIN continues rising until it reaches the wakeup level of 24V. Once PVIN exceeds this wakeup level, switching of the external MOSFETs begins and energy is transferred to the secondary and tertiary outputs. When the voltage on the tertiary output builds to higher than 9V, startup has been accomplished and operation is sustained. However, if REG9 drops below 6.2V (typ) before startup is complete, the device goes back into standby. In this case, increase the value of C21 to store enough energy allowing for voltage buildup at the tertiary winding. Startup Time Considerations The PVIN bypass capacitor, C21, supplies current immediately after wakeup (see Figure 8). The size of C21 and the connection of the tertiary winding determine the number of cycles available for startup. Large values of C21 increase the startup time and supply gate charge for more cycles during initial startup. If the value of C21 is too small, REG9 drops below 6.2V PVIN 10V/div REG9 5V/div REG5 5V/div 40ms/div because the MOSFETs did not have enough time to switch and build up sufficient voltage across the tertiary output to power the device. The device goes back into standby and will not attempt to restart until PVIN rises above 24V. Use a low-leakage capacitor for C21, C3, and C4 (see Figure 8). Generally, power supplies keep typical startup times to less than 500ms even in low-line conditions (36VDC for telecom applications). Size the startup resistor, R22 (Figure 8) to supply both the maximum startup bias of the device and the charging current for C21, C3, and C4. Oscillator and Synchronization The MAX5051 oscillator is externally programmable through a resistor and capacitor connected to RCOSC. The PWM frequency will be 1/2 the frequency at RCOSC with a 50% duty cycle, and is available at SYNCOUT. The maximum duty cycle is limited to < 50% by a 60ns internal blanking circuit in the power drivers in addition to the gate and driver delays. Use the following formula to calculate the oscillator components: RRCOSC ≈ 1 REG5 2 fs (CRCOSC + CPCB ) In REG5 − VTH where CPCB is the stray capacitance on the PC board (about 14pF), REG5 = 5V, VTH is the RCOSC peak trip level, and fs is the switching frequency. The MAX5051 contains circuitry that allows it to be synchronized to an external clock whose duty cycle is 50%. For proper synchronization, the frequency of this clock should be 15% to 20% higher than half the RCOSC frequency of the MAX5051’s internal oscillator. This is because the external source SYNCIN directly drives the power stage, whereas the internal clock is divided by two. The synchronization feature in the MAX5051 has been designed primarily for two devices connected to the same power source with a short physical distance between the two circuits. Under these circumstances, the SYNCOUT from one of the circuits can be connected to the SYNCIN of the other one; this forces the power cycle of the second unit to be 180° out-of-phase. To synchronize a second MAX5051, feed the SYNCOUT of the first device to the SYNCIN of the second device. If necessary, many devices can be daisy-chained in this manner. Each device will then have 180° phase difference from the device that drives it. Figure 6. PVIN, REG5, and REG9 During Startup in Bootstrapped Mode 16 ______________________________________________________________________________________ Parallelable, Clamped Two-Switch Power-Supply Controller IC I t CFLTINT = FLTINT SH 0.9V where IFLTINT = 90µA, tSH is the desired fault integration time after the first shutdown cycle during which current-limit events from the current-limit comparator are ignored. For example, a 0.1µF capacitor gives a fault integration time of 2.25ms. Some testing may be required to fine-tune the actual value of the capacitor. To calculate the required bleed resistance RFLTINT, use the following formula: RFLTINT = tRT 0.372 × CFLTINT where tRT is the desired recovery time. Typically choose tRT = 10 x tSH. Typical values for tSH range from a few hundred microseconds to a few milliseconds. MAX5051 Integrating Fault Protection The integrating fault protection feature allows transient overcurrent conditions to be ignored for a programmable amount of time, giving the power supply time to behave like a current source to the load. This can happen, for example, under load-current transients when the control loop requests maximum current to keep the output voltage from going out of regulation. The fault integration time can be programmed externally by connecting a suitably sized capacitor to the FLTINT pin. Under sustained overcurrent faults, the voltage across this capacitor is allowed to ramp up towards the FLTINT shutdown threshold (2.9V, typ). Once the threshold is reached, the power supply shuts down. A high-value bleed resistor connected in parallel with the FLTINT capacitor allows it to discharge towards the restart threshold (1.8V, typ). Once this threshold is reached, the supply restarts with a new soft-started cycle. Note that cycle-by-cycle current limiting is provided at all times by CS with a threshold of 154mV (typ). The fault integration circuit works by forcing a 90µA current out of FLTINT every time that the current-limit comparator (Figure 1, CILIM) is tripped. Use the following formula to calculate the value of the capacitor necessary for the desired shutdown time of this circuit. #1 RCOSC SYNCOUT SYNCIN MAX5051 FLTINT RCFF STARTUP CON UVLO #2 SYNCIN RCOSC SYNCOUT MAX5051 FLTINT RCFF STARTUP CON UVLO Figure 7. Connection for Synchronized STARTUP of Two or More MAX5051s helps prevent startup conflicts when the secondaries of the power supplies are paralleled. Connecting SYNCOUT to SYNCIN is not necessary; however, when used, this minimizes the ripple current though the input bypass capacitors. Applications Information Isolated Telecom Power Supply Figure 8 shows a complete design of an isolated synchronously rectified power supply with a 36V to 72V telecom voltage range. This power supply is fully protected and can sustain a continuous short circuit at its output terminals. Figures 9 though 14 show some of the performance aspects of this power-supply design. This circuit is available as a completely built and tested evaluation kit. Synchronizing Primary-Side STARTUP For Parallel Operation Figure 7 shows the connection diagram of two or more MAX5051s for synchronized primary-side operation. The common connection of STARTUP ensures all paralleled modules wakeup and shutdown in tandem. This ______________________________________________________________________________________ 17 18 2 R27 10Ω PVIN REG9 REG5 TP3 3 4 C19 1µF C18 100pF C17 0.33µF R11 360Ω R3 2.2kΩ REG5 LXH REG5 C6 0.1µF C3 4.7µF C4 4.7µF R15 31.6kΩ 1% D8 R16 10.5kΩ 1% C2 390pF C5 4700pF TP1 C1 100pF 1 R25 100kΩ R21 24.9kΩ 1% C24 1000pF +VIN REG5 RCFF 14 13 12 11 10 9 8 7 6 17 18 19 20 21 2 1 REG9 R12 100kΩ 1% R19 475Ω Figure 8. Schematic of a 48V Input 3.3V at 15A Output Synchronously Rectified, Isolated Power Supply ______________________________________________________________________________________ R23 10Ω 2 VOUT OUT FB 4 1 2 65 U3 R17 0.027Ω 1% D3 1 PVIN 3 2 C34 330pF 4 IN 1 PGND 2 GND C21 4.7µF 80V 2 2 D2 VOUT 3 1 2 4 R24 10Ω 3 2 1 87 5 6 N1 8 7 D7 2 10 2T 8 +VIN T1 XFRMRH R22 15kΩ 6 4T 1 5 8T 2 1 XFRMRH R18 4.7Ω D5 R13 47Ω REG9 R5 38.3kΩ 1% 8 7 N2 R6 1MΩ 1% +VIN R7 0Ω R8 8.2Ω R2 2.55kΩ 1% 5 SENSE (+) SENSE (-) TRIM 1 3 R9 8.2Ω +VIN R14 150Ω C9 1µF DRVB XFRMRH C8 4.7µF +VIN ON/OFF D1 R4 1MΩ 1% C7 0.22µF C27 0.15µF C20 220pF R20 0Ω 16 DRVL 15 CS PGND DRVDD DRVB XFRMRH DRVH BST 22 23 24 25 26 27 28 C36 C28 R1 0.22µF 0.047µF 11.5kΩ 1% VOUT U2 LXL LXH LXVDD STT PVIN REG9 REG5 FB COMP AVIN GND UVLO STARTUP IC_PADDLE SYNCOUT FLTINT MAX5051 RCOSC U1 SYNCIN 4 COM 5 CSS 3 2 1 D6 1 1 6 5 4 N3 C23 1000pF 5V 1 4 N4 56 C32 1µF C22 2200pF 2kV 3 2 1 1 V+ M_OUT U7 P_OUT V+ U5 7 8 5 N.C. 6 WDI OUT HOLD C12 1µF 100V C13 270µF 4V REG9 C26 0.1µF GND 4 IN- 5 IN+ 6 6 5V IN+ 5V C25 0.07µF 100V 4 N_OUT GND U4 2 5 P_OUT IN- 3 RESET L1 2.4µH GND EN IN C29 0.1µF 4 3 2 1 C11 0.47µF 100V C30 5V 0.1µF 1 87 D4 R10 2 3 20Ω 2 2 C35 1µF C10 0.47µF 100V +VIN 2 N5 3 3 4 5 GND OUT VCC U6 C15 270µF 4V 1 CA AN 2 1 LXH C33 1µF 10V R29 1Ω XFRMRH VOUT -VIN U1: MAX5051 U2: PS2913-1-M U3: MAX8515 U4, U7: MAX5048A U5: MAX5023M U6: PS9715 N1, N2: SI4486 N3, N4: SI4864 N5: BSS123 C31 5V 0.1µF C14 270µF 4V C16 3.3µF +VIN R28 2kΩ R26 560Ω SGND VOUT DRVB MAX5051 Parallelable, Clamped Two-Switch Power-Supply Controller IC Parallelable, Clamped Two-Switch Power-Supply Controller IC 90 7 POWER DISSIPATION (W) 8 EFFICIENCY (%) 85 80 75 70 65 MAX5051 95 6 5 4 3 2 1 60 0 0 2 4 6 8 10 12 14 0 LOAD CURRENT (A) 2 4 6 8 10 12 14 LOAD CURRENT (A) Figure 9. Efficiency at Nominal Output Voltage vs. Load Current 48V Nominal Input Voltage Figure 10. Power Dissipation at Nominal Output Voltage vs. Load Current for 48V Input Voltage. RL = 0.22Ω VOUT 100mV/div VOUT 1V/div IOUT 5A/div IOUT 5A/div 4ms/div Figure 11. Turn-On Transient at Full Load (Resistive Load) 1ms/div 50% > 75% > 50% OF IOUT(MAX), dl/dt = 5A/µs Figure 12. Output Voltage Response to Step-Change in Load Current ______________________________________________________________________________________ 19 MAX5051 Parallelable, Clamped Two-Switch Power-Supply Controller IC A IOUT 10A/div B IOUT 10A/div VOUT 50mV/div A: 1ms/div B: 20ms/div 2µs/div Figure 13. Output Voltage Ripple At Nominal Input Voltage and Full Load Current (Scope Bandwidth = 20MHz) Pin Configuration Figure 14. Load Current (10A/div) as a Function of Time When the Converter Attempts to Turn On into a 50mΩ Short Circuit Chip Information TRANSISTOR COUNT: 2049 PROCESS: BiCMOS/DMOS TOP VIEW RCOSC 1 28 SYNCIN SYNCOUT 2 27 FLTINT RCFF 3 26 STARTUP CON 4 25 UVLO CSS 5 Exposed Paddle Connected to GND MAX5051 COMP 6 24 GND 23 AVIN FB 7 22 BST REG5 8 21 DRVH REG9 9 20 XFRMRH PVIN 10 19 DRVB STT 11 18 DRVDD LXVDD 12 17 PGND LXH 13 16 DRVL LXL 14 15 CS TSSOP EXPOSED PADDLE IS INTERNALLY CONNECTED TO GND. 20 ______________________________________________________________________________________ Parallelable, Clamped Two-Switch Power-Supply Controller IC TSSOP 4.4mm BODY.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 21 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX5051 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)