www.fairchildsemi.com FAN8002D2 2-Channel Motor Drive Features Description • • • • • • • • • The FAN8002D is a monolithic integrated circuit, suitable for a 2-ch motor driver which drives the focus actuator, tracking actuator. 2-Channel BTL driver with mute circuit Built-in 2-regulator Built-in 2-comparator Built-in thermal shutdown circuit Built-in mute circuit Built-in switch circuit Built-in OP-AMP circuit Operating supply voltage: 4.5~13.2V Corresponds to 3.6V DSP 28-SSOPH-300 Ordering Information Device Package Operating Temperature FAN8002D2 28-SSOPH-300 −35°C ~ 85°C FAN800D2TF 28-SSOPH-300 −35°C ~ 85°C Rev. 1.0.1 Jul. 2000. ©2000 Fairchild Semiconductor International FAN8002D2 IN2 PGND DO2- DO2+ 21 20 19 18 17 16 15 8 9 10 11 12 13 14 PVCC2 DO1- DO1+ 22 REG2 MUTE 23 IN1 RSTOUT 24 REG1 CRST 25 VREF OPOUT 26 PVCC1 OPIN- 27 REG2CONT OPIN+ 28 FIN (GND) SWOUT SVCC Pin Assignments 1 2 3 4 5 6 7 COUT1 CIN1- CIN1+ CIN2+ CIN2- COUT2 RSTIN FAN8002D2 FIN (GND) Pin Definitions Pin Function Description Pin Number Pin Name I/O 1 COUT1 O Comparator1 Output 2 CIN1- I Comparator1 (-) Input 3 CIN1+ I Comparator1 (+) Input 4 CIN2+ I Comparator2 (+) Input 5 CIN2- I Comparator2 (-) Input 6 COUT2 O Comparator2 Output 7 RSTIN I Reset Input 8 SWOUT O Switch Output 9 PVCC1 - Power Supply1 (Reg,switch Part) 10 REG1 O Regulator1 Output 11 REG2 O Regulator2 Output 12 PVCC2 - Power Supply 2 ( Drive Power Output Part) 13 DO1- O Drive1 Output (-) 14 DO1+ O Drive1 Output (+) 15 DO2+ O Drive1 Output (+) 16 DO2- O Drive1 Output (-) 17 PGND - Power Ground 18 IN2 I CH2 Drive Input 2 19 IN1 I CH1 Drive Input 20 VREF I Reference Voltage 21 REG2 CONT I Regulator2 On/off Control 22 MUTE I Drive Mute Rev. 1.0.1 Jul. 2000. FAN8002D2 Pin Definitions (Continued) Pin Number Pin Name I/O Pin Function Description 23 RSTOUT O Reset Output 24 CRST - Reset Capacitor 25 OPOUT - Opamp Output 26 OPIN - - Opamp Input - 27 OPIN + - Opamp Input + 28 SVCC - Signal Supply (Comparator, Reset, Opamp Drive Pre-amp Part) DO2- DO2+ MUTE 22 PGND RSTOUT 23 IN2 CRST 24 IN1 OPOUT 25 VREF OPIN26 REG2CONT OPIN+ 27 21 20 19 18 17 16 15 REG2 Control - + - DRIVER Mute + - - + 28 FIN (GND) - + SVCC Block Diagram + PVCC1 - + TSD I/V-Convertor + Switch I/V-Convertor Pref - CIN2- COUT2 RSTIN 10 11 12 13 14 DO1+ CIN2+ 9 DO1- CIN1+ FIN (GND) 8 PVCC2 7 REG2 6 REG1 5 PVCC1 4 - SWOUT 3 CIN1- 2 COUT1 - 1 - + + + - + Comparator2 Regulator2 + Regulator1 + Comparator1 + VREG Rev. 1.0.1 Jul. 2000. 3 FAN8002D2 Equivalent Circuits Comparator Output Comparator Input 1 2.5 k Ω 23Ω 6 2 3 4 5 1kΩ 23Ω Reset Input & Reset Capacitor 65 k Ω 7 10 k Ω 1kΩ 23Ω 24 80 k Ω 23Ω Switch Output 8 2k Ω 30 k Ω 30 k Ω Regulator Output 10 k Ω 1.7 k Ω Btl Driver Output 10 13 15 11 14 16 5kΩ 20 k Ω Vref & Btl Driver Input 14 k Ω Reg2 & Switch Control Input 1k Ω 18 19 4 21 20 23Ω 14 k Ω 23Ω 23Ω Rev. 1.0.1 Jul. 2000. 30 k Ω 50 k Ω 30 k Ω 50 k Ω FAN8002D2 Equivalent Circuits (Continued) Mute Input Reset Output 23 50 k Ω 23Ω 22 23Ω 20 k Ω 50 k Ω Op-amp Output Op-amp Input 8kΩ 27 25 23Ω 23Ω 26 23Ω Absolute Maximum Ratings (Ta = 25 °C) Parameter Symbol Value Unit Maximum supply voltage VCCmax 15 V Power dissipation 1.4 Pd note W Operating temperature range Topr -35 ~ +85 °C Storage temperature range Tstg -55 ~ +150 °C NOTE: 1. When mounted on a 76.2mm × 114mm × 1.57mm PCB (Phenolic resin material). 2. Power dissipation reduces 11.2mW/°C for using above Ta = 25°C 3. Do not exceed Pd and SOA(Safe operating area). PD (temporary) Pd (mW) 2,000 1,200 400 0 SOA 0 25 50 85 100 125 150 Rev. 1.0.1 Jul. 2000. 175 Ambient Temperature, Ta (°C) 5 FAN8002D2 Recommended Operating Conditions Parameter Symbol Min. Typ. Max. Unit Signal Supply Voltage SVCC 4.5 - 13.2 V Power Supply Voltage 1 PVCC1 4.5 - SVCC V Power Supply Voltage 2 PVCC2 4.0 - SVCC V Electrical Characteristics (Unless otherwise specified, Ta = 25 °C, VCC = VM12 = VM3,4 = 5V,Vref=1.65V, Comparator out=Hi-Z) Parameter Symbol Conditions Min. Typ. Max. Unit Quiescent Current 1 ICC1 VIN =Vref, Pin21=0V, Pin22=5V - 9 - mA Quiescent Current 2 ICC2 VIN = Vref, Pin21=5V, Pin22=5V - 19 - mA Quiescent Current 3 ICC3 VIN = Vref, Pin21=5V, Pin22=0V - 15 - mA Quiescent Current 4 Icc4 VIN = Vref, Pin21=0V, Pin22=0V - 6 - mA Output Offset Voltage VOO VIN = Vref -50 - +50 mV Maximum output voltage1 VOM1 SVCC=5V, RL=24ohm, 3.1 3.5 - V Maximum output voltage2 VOM2 SVCC=12V, RL=24ohm 3.6 4.0 - V GVC DRIVE PART Closed loop voltage gain VIN=0.1Vrms, f=1KHz, Rext=0 10.5 12 13.5 dB Mute on voltage VMON Pin22 = Variation GND - 0.5 V Mute off voltage VMOFF Pin22 = Variation 2 - Vcc V 200 - - mA REGULATOR PART Maximum output current Iomax - Regulator output voltage Vreg IL=50mA 3.5 3.6 3.7 V Load regulation ∆Vrl IL=0~200mA -40 - 10 mV Line regulation ∆Vcc VCC=4.5~5.5V - 10 30 mV Regulator2 on voltage Vr2on Pin21=Variation 2.0 - Vcc V Regulator2 off voltage Vr2off Pin21=Variation GND - 0.5 V COMPARATOR PART Input offset voltage Vio - - - 4.0 mV Input offset current Iio - - 5.0 - nA Input bias current Ib - - 25 250 nA Common mode input voltage Vicm - 0 - 3.5 V Output sink current Isink - 3.0 - - mA - 1.3 - us Slew rate SR VIN=4Vp_p, f=100KHz,Square RESET PART Reset on voltage Vrston VCTl=H / L 4.1 4.2 4.3 V Reset hysteresis voltage Vrsthys VCTl=H / L /H 100 - 200 mV Low level output voltage VoL RL=4.7 K - 100 200 mV VCC=5V, Iout=150mA - 0.13 0.2 V VCC=5V - - 20 µA SWITCH PART Upper satuaration voltage Output off current Vupsat Ioff OP-AMP PART 6 Rev. 1.0.1 Jul. 2000. FAN8002D2 Electrical Characteristics (Continued) (Unless otherwise specified, Ta = 25 °C, VCC = VM12 = VM3,4 = 5V,Vref=1.65V, Comparator out=Hi-Z Parameter Symbol Conditions Min. Typ. Max. Unit Input offset voltage VOF - -7 0 +7 mV Input bias current IB1 - - - 200 nA High level output voltage VOH1 - 4.4 4.7 - V Low level output voltage VOL1 - - 0.1 0.4 V Output sink current ISINK RL=1Kohm 2 4 - mA Output source current ISOU1 RL=1Kohm 2 4 - mA Common mode input range VICM -0.3 - 4.0 V Open Loop voltage gain GVO1 f=1kHz, VIN=-75dB - 80 - dB Ripple rejection ratio RR1 f=120Hz, VIN=-20dB - 65 - dB slew rate SR1 f=120Hz, 2Vp-p - 1.2 - V/us f=1kHz, VIN=-20dB - 80 - dB Common Mode rejection ratio CMRR - Rev. 1.0.1 Jul. 2000. 7 FAN8002D2 Application Information 1. Reference Input Pin 20 (REF) is a reference Input pin. • Reference Input The applied voltage at the reference input pin must be between 1.5 (V) and 3.5 (V), when Vcc = 5V. 2. Channel Mute Function These pins are used for channel mute operation. • When the mute pin (pin22) is Low level, the mute circuit is enabled and the output circuits are muted.(both CH1, CH2) • When the voltage of the mute pin (pin22) is High level, the mute circuit is disabled and the output circuits operate normally. • If the chip temperature rises above 175 °C, then the thermal shutdown (TSD) circuit is activated and the output circuits are muted. • Mute(pin 22)-CH1, 2 mute control input pin. 3. Protection Function Thermal Shutdown (TSD) • 1) If the chip temperature rises above 175 °C the thermal shutdown (TSD) circuit is activated and the output circuit is in the Mute state, that is Off state. • The TSD circuit has a temperature hysteresis of 25°C. 4. Focus, Tracking Actuator • The reference voltage REF is given externally through pin 20 • The input signal is amplified by R2/R1 times and then fed to the level shift circuit. • The level shift circuit produces the differential output voltages and drives the two output power amplifiers. Since the differential gain of the output amplifiers is equal to 2 × (1+ R4/R3), the input signal is amplified by (R2/R1) × 2 × (1+R4/R3). • If the total gain is too high, you can reduce the closed loop gain by adding an external resistance at pin18, 19 • The power reference voltage (Vr) is about a half of the supply voltage(VM). M 13 16 14 15 Power Amp R4 R4 AP3 AP2 - + + Vr R3 20 R3 + - - + LEVEL SNIFT AP1 + - R2 R1 Vref Vin 18 19 8 Rev. 1.0.1 Jul. 2000. FAN8002D2 5. Regulator & Control Function The regulator circuit is illustrated in the figure.1. • The capacitor is used as a ripple eliminator and should have a good temperature characteristics. • The regulator output voltage is calculated as follows V REG = ( 1 + R1 ⁄ R2 ) × 2.5 = 3.4V + + - R1 R1 R2 R2 - REG2 CONT 21 11 9 10 Regulator1 REG2 OUT PVCC1 REG1 OUT Regulator2 Figure 1. • When the voltage of the pin21 is high (above 2.0V), the regulator operates normally. On the other hand, when the voltage of the pin21 is low (below 0.5V), the regulator will be turned off. Truth table is as follows Pin#21 Regulator 2 High Turn On Low Turn Off Rev. 1.0.1 Jul. 2000. 9 FAN8002D2 6. Reset Circuit The reset circuit is illustrated in the figure.2. • 1) The capacitor is used for delay. RESET IN RESET OUT CRST 24 23 - 7 R2 + R1 VREG Figure 2. • 2) When the voltage of the pin7 is above 4.2V, the output of the reset circuit is OPEN (no load). On the other hand, when the voltage of the pin7 is low , the output of the reset circuit is low. Truth table is as follows Pin#7 Reset Output High Open Low Low 7. Switch Circuit The switch circuit is illustrated in the figure.3. SWITCH IN PVCC1 SWITCH OUT 21 9 8 Switch When the voltage of the pin21 is high (above 2.0V), the output of the switch circuit is above 4.8V. On the other hand, when the voltage of the pin21 is low (below 0.5V), the routput of the reset circuit is below 0.5V. Truth table is as follows 10 Pin#21 Switch Output High Above 4.8v Low Below 0.5v Rev. 1.0.1 Jul. 2000. FAN8002D2 The regulator2 control pin and the switch control pin is same(pin21). If the pin21 is high, first switch circuit operates and then regulator circuit operates normally. The operation is illustrated in the following time table Control Signal Switch Output Reg2 Output OFF ON ON OFF ON OFF Delay time Rev. 1.0.1 Jul. 2000. 11 FAN8002D2 Test Circuit TRACKING FOCUS ~ 2 + OP OUT OP IN (-) OP IN (+) ~ REG2 CONT VREF MUTE 1 3 SW3 8Ω 10µF 2 + 1 3 SW2 + 28 27 26 25 24 23 22 21 20 19 18 17 16 15 9 10 11 12 13 14 FAN8002D2 4 5 6 7 8 + COMP IN (+) COMP IN (-) COMP OUT + COMP OUT 3 COMP IN (-) 2 COMP IN (+) 1 SW1 1 2 + RESET INPUT 1000µF + RIPPLE ~ REG1 REG2 8Ω 100µF VCC OP-AMP & COMPARATOR PART COMP IN(+) OPIN(+) COMP IN(−) OPIN(−) A COMP OUT OPOUT B D 1 VPULSE 2 3 VA 1 2 3 VOUT 50Ω VB C 1 12 Rev. 1.0.1 Jul. 2000. 2 VCC FAN8002D2 Application Circuit (Voltage Control Mode) [SERVO PRE AMP] MUTE OPAMP OPAMP OPAMP IN+ INOUT REG2 CONTROL FOCUS TRACKING INPUT INPUT VREF RESET OUT TRACKING + 28 27 26 25 24 23 22 21 20 19 18 17 16 15 9 10 11 12 13 14 FAN8002D2 1 2 3 4 5 6 7 RESET IN TRACKING 8 SWITCH OUT + COMP1 COMP1 COMP1 COMP2 COMP2 COMP2 OUT IN+ INOUT ININ+ + FOCUS + REG1 REG2 100µF VCC Rev. 1.0.1 Jul. 2000. 13 FAN8002D2 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 12/1/00 0.0m 001 Stock#DSxxxxxxxx 2000 Fairchild Semiconductor International