LMC6041 CMOS Single Micropower Operational Amplifier General Description Features Ultra-low power consumption and low input-leakage current are the hallmarks of the LMC6041. Providing input currents of only 2 fA typical, the LMC6041 can operate from a single supply, has output swing extending to each supply rail, and an input voltage range that includes ground. The LMC6041 is ideal for use in systems requiring ultra-low power consumption. In addition, the insensitivity to latch-up, high output drive, and output swing to ground without requiring external pull-down resistors make it ideal for single-supply battery-powered systems. Other applications for the LMC6041 include bar code reader amplifiers, magnetic and electric field detectors, and handheld electrometers. This device is built with National’s advanced Double-Poly Silicon-Gate CMOS process. See the LMC6042 for a dual, and the LMC6044 for a quad amplifier with these features. Y Y Y Y Y Low supply current 14 mA (Typ) Operates from 4.5V to 15.5V single supply Ultra low input current 2 fA (Typ) Rail-to-rail output swing Input common-mode range includes ground Applications Y Y Y Y Y Y Y Battery monitoring and power conditioning Photodiode and infrared detector preamplifier Silicon based transducer systems Hand-held analytic instruments pH probe buffer amplifier Fire and smoke detection systems Charge amplifier for piezoelectric transducers Connection Diagram 8-Pin DIP/SO TL/H/11136 – 1 Ordering Information Temperature Range Package C1995 National Semiconductor Corporation Industrial b 40§ C to a 85§ C NSC Drawing Transport Media 8-Pin Small Outline LMC6041AIM LMC6041IM M08A Rail Tape and Reel 8-Pin Molded DIP LMC6041AIN LM6041IN N08E Rail TL/H/11136 RRD-B30M75/Printed in U. S. A. LMC6041 CMOS Single Micropower Operational Amplifier February 1995 Absolute Maximum Ratings (Note 1) Current at Power Supply Pin If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Differential Input Voltage (V a b Vb) Voltage at Input/Output Pin Power Dissipation g Supply Voltage Supply Voltage Output Short Circuit to Vb Output Short Circuit to V a Lead Temperature (Soldering, 10 sec.) Storage Temperature Range Junction Temperature ESD Tolerance (Note 4) Current at Input Pin Current at Output Pin 35 mA (V a ) a 0.3V, (Vb) b 0.3V (Note 3) Operating Ratings 16V (Note 2) (Note 11) 260§ C b 65§ C to a 150§ C 110§ C 500V g 5 mA g 18 mA Temperature Range LMC6041AI, LMC6041I b 40§ C s TJ s a 85§ C Supply Voltage Power Dissipation Thermal Resistance (iJA) (Note 10) 8-Pin DIP 8-Pin SO 4.5V s V a s 15.5V (Note 9) 101§ C/W 165§ C/W Electrical Characteristics Unless otherwise specified, all limits guaranteed for TA e TJ e 25§ C. Boldface limits apply at the temperature extremes. V a e 5V, Vb e 0V, VCM e 1.5V, VO e V a /2, and RL l 1M unless otherwise specified. Symbol Parameter Typical (Note 5) Conditions VOS Input Offset Voltage 1 TCVOS Input Offset Voltage Average Drift 1.3 IB Input Bias Current 0.002 IOS Input Offset Current 0.001 RIN Input Resistance CMRR Common Mode Rejection Ratio 0V s VCM s 12.0V V a e 15V a PSRR Positive Power Supply Rejection Ratio b PSRR CMR AV LMC6041AI LMC6041I Limit (Note 6) Limit (Note 6) 3 3.3 6 6.3 Units (Limit) mV max mV/§ C 4 4 pA max 2 2 pA max 75 68 66 62 60 dB min 5V s V a s 15V VO e 2.5V 75 68 66 62 60 dB min Negative Power Supply Rejection Ratio 0V s Vb s b10V VO e 2.5V 94 84 83 74 73 dB min Input Common-Mode Voltage Range V a e 5V and 15V for CMRR t 50 dB b 0.4 b 0.1 b 0.1 0 0 V max V a b 1.9V V a b 2.3V V a b 2.5V V a b 2.3V V a b 2.4V V min Sourcing 1000 400 300 300 200 V/mV min Sinking 500 180 120 90 70 V/mV min Sourcing 1000 200 160 100 80 V/mV min Sinking 250 100 60 50 40 V/mV min Large Signal Voltage Gain l 10 RL e 100 kX (Note 7) RL e 25 kX (Note 7) 2 TeraX Electrical Characteristics Unless otherwise specified, all limits guaranteed for TA e TJ e 25§ C. Boldface limits apply at the temperature extremes. V a e 5V, Vb e 0V, VCM e 1.5V, VO e V a /2, and RL l 1M unless otherwise specified. Symbol VO Parameter Output Swing LMC6041AI LMC6041I Limit (Note 6) Limit (Note 6) 4.987 4.970 4.950 4.940 4.910 V min 0.004 0.030 0.050 0.060 0.090 V max 4.980 4.920 4.870 4.870 4.820 V min 0.010 0.080 0.130 0.130 0.180 V max 14.970 14.920 14.880 14.880 14.820 V min 0.007 0.030 0.050 0.060 0.090 V max 14.950 14.900 14.850 14.850 14.800 V min 0.022 0.100 0.150 0.150 0.200 V max Sourcing, VO e 0V 22 16 10 13 8 mA min Sinking, VO e 5V 21 16 8 13 8 mA min Sourcing, VO e 0V 40 15 10 15 10 mA min Sinking, VO e 13V (Note 11) 39 24 8 21 8 mA min VO e 1.5V 14 20 24 26 30 mA max V a e 15V 18 26 31 34 39 mA max Typical (Note 5) Conditions V a e 5V RL e 100 kX to V a /2 V a e 5V RL e 25 kX to V a /2 V a e 15V RL e 100 kX to V a /2 V a e 15V RL e 25 kX to V a /2 ISC ISC IS Output Current V a e 5V Output Current V a e 15V Supply Current 3 Units (Limit) AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TA e TJ e 25§ C. Boldface limits apply at the temperature extremes. V a e 5V, Vb e 0V, VCM e 1.5V, VO e V a /2, and RL l 1M unless otherwise specified. Symbol SR Parameter Slew Rate Typ (Note 5) Conditions (Note 8) LMC6041AI LMC6041I Limit (Note 6) Limit (Note 6) 0.015 0.010 0.010 0.007 0.02 Units (Limit) V/ms min GBW Gain-Bandwidth Product 75 kHz wm Phase Margin 60 Deg en Input-Referred Voltage Noise F e 1 kHz 83 in Input-Referred Current Noise F e 1 kHz 0.0002 T.H.D. Total Harmonic Distortion F e 1 kHz, AV e b5 RL e 100 kX, VO e 2 Vpp g 5V Supply 0.01 nV/ SHz pA/ SHz % Note 1: Absolute Maxium Ratings indicate limits beyond which damage to the device may occur. Operating conditions indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Note 2: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 110§ C. Output currents in excess of g 30 mA over long term may adversely affect reliability. Note 3: The maximum power dissipation is a function of TJ(max), iJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD e (TJ(max) b TA)/iJA. Note 4: Human body model, 1.5 kX in series with 100 pF. Note 5: Typical Values represent the most likely parametric norm. Note 6: All limits are guaranteed at room temperature (standard type face) or at operating temperature extremes (bold face type). Note 7: V a e 15V, VCM e 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V s VO s 11.5V. For Sinking tests, 2.5V s VO s 7.5V. Note 8: V a e 15V. Connected as Voltage Follower with 10V step input. Number specified in the slower of the positive and negative slew rates. Note 9: For operating at elevated temperatures the device must be derated based on the thermal resistance iJA with PD e (TJ b TA)/iJA. Note 10: All numbers apply for packages soldered directly into a PC board. Note 11: Do not connect output to V a when V a is greater than 13V or reliability may be adversely affected. 4 Typical Performance Characteristics VS e g 7.5V, TA e 25§ C unless otherwise specified Supply Current vs Supply Voltage Offset Voltage vs Temperature of Five Representative Units Input Bias Current vs Temperature Input Bias Current vs Input Common-Mode Voltage Input Common-Mode Voltage Range vs Temperature Output Characteristics Current Sinking Output Characteristics Current Sourcing Input Voltage Noise vs Frequency Power Supply Rejection Ratio vs Frequency TL/H/11136 – 2 5 Typical Performance Characteristics VS e g 7.5V, TA e 25§ C unless otherwise specified (Continued) CMRR vs Frequency CMRR vs Temperature Open-Loop Voltage Gain vs Temperature Open-Loop Frequency Response Gain and Phase Responses vs Load Capacitance Gain and Phase Responses vs Temperature Gain Error (VOS vs VOUT) Common-Mode Error vs Common-Mode Voltage of Three Representative Units Non-Inverting Slew Rate vs Temperature TL/H/11136 – 3 6 Typical Performance Characteristics VS e g 7.5V, TA e 25§ C unless otherwise specified (Continued) Inverting Slew Rate vs Temperature Non-Inverting Large Signal Pulse Response (AV e a 1) Non-Inverting Small Signal Pulse Response Inverting Large-Signal Pulse Response Inverting Small Signal Pulse Response Stability vs Capacitive Load (AV e a 1) Stability vs Capacitive Load (AV e g 10) TL/H/11136 – 4 7 Applications Hints AMPLIFIER TOPOLOGY CAPACITIVE LOAD TOLERANCE The LMC6041 incorporates a novel op-amp design topology that enables it to maintain rail-to-rail output swing even when driving a large load. Instead of relying on a push-pull unity gain output buffer stage, the output stage is taken directly from the internal integrator, which provides both low output impedance and large gain. Special feed-forward compensation design techniques are incorporated to maintain stability over a wider range of operating conditions than traditional micropower op-amps. These features make the LMC6041 both easier to design with, and provide higher speed than products typically found in this ultra-low power class. Direct capacitive loading will reduce the phase margin of many op-amps. A pole in the feedback loop is created by the combination of the op-amp’s output impedance and the capacitive load. This pole induces phase lag at the unitygain crossover frequency of the amplifier resulting in either an oscillatory or underdamped pulse response. With a few external components, op amps can easily indirectly drive capacitive loads, as shown in Figure 2a . COMPENSATING FOR INPUT CAPACITANCE It is quite common to use large values of feedback resistance with amplifiers with ultra-low input current, like the LMC6041. Although the LMC6041 is highly stable over a wide range of operating conditions, certain precautions must be met to achieve the desired pulse response when a large feedback resistor is used. Large feedback resistors and even small values of input capacitance, due to transducers, photodiodes, and circuits board parasitics, reduce phase margins. When high input impedance are demanded, guarding of the LMC6041 is suggested. Guarding input lines will not only reduce leakage, but lowers stray input capacitance as well. (See Printed-Circuit-Board Layout for High Impedance Work.) TL/H/11136 – 6 FIGURE 2a. LMC6041 Noninverting Gain of 10 Amplifier, Compensated to Handle Capacitive Loads In the circuit of Figure 2a , R1 and C1 serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier’s inverting input, thereby preserving phase margin in the overall feedback loop. Capacitive load driving capability is enhanced by using a pull up resistor to V a (Figure 2b ). Typically a pull up resistor conducting 10 mA or more will significantly improve capacitive load responses. The value of the pull up resistor must be determined based on the current sinking capability of the amplifier with respect to the desired output swing. Open loop gain of the amplifier can also be affected by the pull up resistor (see Electrical Characteristics). TL/H/11136–5 FIGURE 1. Cancelling the Effect of Input Capacitance The effect of input capacitance can be compensated for by adding a capacitor. Adding a capacitor, Cf, around the feedback resistor (as in Figure 1 ) such that: 1 1 t 2qR1 CIN 2qR2 Cf or R1 CIN s R2 Cf Since it is often difficult to know the exact value of CIN, Cf can be experimentally adjusted so that the desired pulse response is achieved. Refer to the LMC660 and the LMC662 for a more detailed discussion on compensating for input capacitance. TL/H/11136 – 18 FIGURE 2b. Compensating for Large Capacitive Loads with a Pull Up Resistor 8 Application Hints (Continued) PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK It is generally recognized that any circuit which must operate with less than 1000 pA of leakage current requires special layout of the PC board. When one wishes to take advantage of the ultra-low bias current of the LMC6041, typically less than 2fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite simple. First, the user must not ignore the surface leakage of the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination, the surface leakage will be appreciable. To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LMC6041’s inputs and the terminals of capacitors, diodes, conductors, resistors, relay terminals, etc. connected to the op-amp’s inputs, as in Figure 3 . To have a significant effect, guard rings should be placed on both the top and bottom of the PC board. This PC foil must then be connected to a voltage which is at the same voltage as the amplifer inputs, since no leakage current can flow between two points at the same potential. For example, a PC board trace-to-pad resistance of 1012X, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5V bus adjacent to the pad of the input. This would cause a 100 times degradation from the LMC6041’s actual performance. However, if a guard ring is held within 5 mV of the inputs, then even a resistance of 1011X would cause only 0.05 pA of leakage current. See Figures 4a, 4b, 4c for typical connections of guard rings for standard op-amp configurations. TL/H/11136 – 8 (a) Inverting Amplifier TL/H/11136 – 9 (b) Follower TL/H/11136 – 10 (c) Non-Inverting Amplifier FIGURE 4. Typical Connections of Guard Rings The designer should be aware that when it is inappropriate to lay out a PC board for the sake of just a few circuits, there is another technique which is even better than a guard ring on a PC board: Don’t insert the amplifier’s input pin into the board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 5 . TL/H/11136 – 7 FIGURE 3. Example of Guard Ring in P.C. Board Layout TL/H/11136 – 11 (Input pins are lifted out of PC board and soldered directly to components. All other pins connected to PC board.) FIGURE 5. Air Wiring 9 Typical Single-Supply Applications (V a e 5.0 VDC) Rejection of the common-mode component of the input is accomplished by making the ratio of R1/R2 equal to R3/ R4. So that where, R3 R2 e R4 R1 R4 R3 R2 a R3 a 1a VD VOUT e R3 R4 RO A suggested design guideline is to minimize the difference of value between R1 through R4. This will often result in improved resistor tempco, amplifier gain, and CMRR over temperature. If RN e R1 e R2 e R3 e R4 then the gain equation can be simplified: The extremely high input impedance, and low power consumption, of the LMC6041 make it ideal for applications that require battery-powered instrumentation amplifiers. Examples of these type of applications are hand-held pH probes, analytic medical instruments, magnetic field detectors, gas detectors, and silicon based pressure transducers. # J #1 J RN VD RO Due to the ‘‘zero-in, zero-out’’ performance of the LMC6041, and output swing rail-rail, the dynamic range is only limited to the input common-mode range of 0V to VS – 2.3V, worst case at room temperature. This feature of the LMC6041 makes it an ideal choice for low-power instrumentation systems. A complete instrumentation amplifier designed for a gain of 100 is shown in Figure 7 . Provisions have been made for low sensitivity trimming of CMRR and gain. VOUT e 2 TL/H/11136–12 FIGURE 6. Two Op-Amp Instrumentation Amplifier The circuit in Figure 6 is recommended for applications where the common-mode input range is relatively low and the differential gain will be in the range of 10 to 1000. This two op-amp instrumentation amplifier features an independent adjustment of the gain and common-mode rejection trim, and a total quiescent supply current of less than 28 mA. To maintain ultra-high input impedance, it is advisable to use ground rings and consider PC board layout an important part of the overall system design (see Printed-Circuit-Board Layout for High Impedance Work). Referring to Figure 6 , the input voltages are represented as a common-mode input VCM plus a differential input VD. a TL/H/11136 – 13 FIGURE 7. Low-Power Two-Op-Amp Instrumentation Amplifier 10 Typical Single-Supply Applications (V a e 5.0 VDC) (Continued) TL/H/11136 – 14 FIGURE 8. Low-Leakage Sample and Hold TL/H/11136 – 15 FIGURE 9. Instrumentation Amplifier TL/H/11136 – 17 FIGURE 11. AC Coupled Power Amplifier TL/H/11136 – 16 FIGURE 10. 1 Hz Square-Wave Oscillator Physical Dimensions inches (millimeters) 8-Pin Small Outline Order Number LMC6041AIM or LMC6041IM NS Package Number M08A 11 LMC6041 CMOS Single Micropower Operational Amplifier Physical Dimensions inches (millimeters) (Continued) 8-Pin Molded DIP Order Number LMC6041AIN or LMC6041IN NS Package Number N08E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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