Revised March 1999 74VHC02 Quad 2-Input NOR Gate General Description The VHC02 is an advanced high-speed CMOS 2-Input NOR Gate fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stages, including buffer output, which provide high noise immunity and stable output. An input protection circuit insures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mismatched supply and input voltages. Features ■ High Speed: tPD = 3.6 ns (typ) at VCC = 5V ■ Low power dissipation: ICC = 2 µA (max) at TA = 25°C ■ High noise immunity: VNIH = VNIL = 28% VCC (min) ■ Power down protection is provided on all inputs ■ Low noise: VOLP = 0.8V (max) ■ Pin and function compatible with 74HC02 Ordering Code: Order Number Package Number 74VHC02M M14A 74VHC02SJ M14D 74VHC02MTC 74VHC02N Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Logic Symbol IEEE/IEC Pin Descriptions Pin Names Truth Table Description A B O An , Bn Inputs L L H On Outputs L H L H L L H H L © 1999 Fairchild Semiconductor Corporation DS011515.prf www.fairchildsemi.com 74VHC02 Quad 2-Input NOR Gate November 1992 74VHC02 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) −0.5V to +7.0V DC Input Voltage (VIN) −0.5V to +7.0V Recommended Operating Conditions (Note 2) 2.0V to +5.5V Supply Voltage (VCC) −0.5V to VCC + 0.5V DC Output Voltage (VOUT) 0V to +5.5V Input Voltage (VIN) Input Diode Current (IIK) −20 mA Output Voltage (VOUT) Output Diode Current (IOK) ±20 mA Operating Temperature (TOPR) DC Output Current (IOUT ) ±25 mA Input Rise and Fall Time (tr, tf) DC VCC/GND Current (ICC) ±50 mA VCC = 3.3V ± 0.3V 0 ∼ 100 ns/V −65°C to +150°C VCC = 5.0V ± 0.5V 0 ∼ 20 ns/V Storage Temperature (TSTG) Lead Temperature (TL) (Soldering, 10 seconds) 0V to VCC −40°C to +85°C Note 1: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications. 260°C Note 2: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIH HIGH Level Input Voltage VIL VOL TA = 25°C Min TA = −40°C to +85°C Typ Max Min 2.0 1.50 1.50 3.0 − 5.5 0.7 VCC 0.7 VCC LOW Level Input Voltage VOH VCC (V) Parameter Max 2.0 0.50 0.50 0.3 VCC 0.3 VCC 2.0 1.9 2.0 1.9 Output Voltage 3.0 2.9 3.0 2.9 4.5 4.4 4.5 4.4 3.0 2.58 2.48 4.5 3.94 3.80 VIN = VIH IOH = −50 µA 2.0 0.0 0.1 0.1 3.0 0.0 0.1 0.1 4.5 0.0 0.1 0.1 ICC Quiescent Supply Current or VIL IOH = −4 mA V Output Voltage Input Leakage Current V V LOW Level IIN Conditions V 3.0 − 5.5 HIGH Level Units IOH = −8 mA VIN = VIH IOL = 50 µA V or VIL IOL = 4 mA 3.0 0.36 0.44 4.5 0.36 0.44 0 − 5.5 ±0.1 ±1.0 µA VIN = 5.5V or GND 5.5 2.0 20.0 µA VIN = VCC or GND V IOL = 8 mA Noise Characteristics Symbol Parameter VOLP Quiet Output Maximum (Note 3) Dynamic VOL VOLV Quiet Output Minimum (Note 3) Dynamic VOL VIHD Minimum HIGH Level (Note 3) Dynamic Input Voltage VILD Maximum LOW Level (Note 3) Dynamic Input Voltage TA = 25°C VCC (V) Typ Limits 5.0 0.3 0.8 V CL = 50 pF 5.0 −0.3 −0.8 V CL = 50 pF 5.0 3.5 V CL = 50 pF 5.0 1.5 V CL = 50 pF Note 3: Parameter guaranteed by design. www.fairchildsemi.com 2 Units Conditions Symbol tPHL Parameter Propagation Delay VCC (V) 3.3 ± 0.3 tPLH 5.0 ± 0.5 TA = 25°C Min TA = −40°C to +85°C Typ Max Min Max 5.6 7.9 1.0 9.5 8.1 11.4 1.0 13.0 3.6 5.5 1.0 6.5 1.0 8.5 5.1 7.5 CIN Input Capacitance 4 10 CPD Power Dissipation 15 10 Units ns ns Conditions CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF pF VCC = Open pF (Note 4) Capacitance Note 4: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr.) = CPD * VCC * fIN + ICC/4 (per gate). 3 www.fairchildsemi.com 74VHC02 AC Electrical Characteristics 74VHC02 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Package Number M14A 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D www.fairchildsemi.com 4 74VHC02 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package MTC14 5 www.fairchildsemi.com 74VHC02 Quad 2-Input NOR Gate Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N14A LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.