MDTIC MDT10P257

深圳市美芯微电子有限公司麦肯单片机授权一级代理商
电话:0755-36857609/27945551/29491882
地址:深圳市宝安区宝源路名优产品采购中心B1区721室
MDT10P257
EXT-R、RC:150 μs,20ms
XT、LF
:20ms,80ms
1. General Description
This EPROM-Based 8-bit micro-controller
uses a fully static CMOS design
technology to combine higher speed and
smaller size with the low power and high
noise immunity.
On chip memory system includes 2.0 K
words of ROM, and 80 bytes of static
RAM.
2. Features
The followings are some of the features
on the hardware and software :
Fully CMOS static design
8-bit data bus
On chip ROM size : 2 K words
Internal RAM size : 80 bytes
(72 general purpose, 8 special
registers)
36 single word instructions
14-bit instructions
2-level stacks
Operating voltage : 2.3 V ~ 5.5 V
Operating frequency : 0 ~ 20 MHz
The most fast execution time is 200 ns
under 20 MHz in all single cycle
instructions
except
the
branch
instructions.
Addressing modes include direct,
indirect and relative addressing modes
Power-on Reset (POR)
4 types of power edge-detector reset:
1.8v , 2.1v , always enable 1.8v and
Disable
Sleep mode for power saving
2 oscillator start-up time :
8-bit real time clock/counter(RTCC)
with 8-bit programmable prescaler
4 types of oscillator can be selected by
user options :
RC-Low cost RC oscillator
LFXT-Low frequency crystal
oscillator
XTAL-Standard crystal oscillator
EXT-R-Low cost R oscillator
On-chip RC oscillator based Watchdog
Timer(WDT) can be operated freely
20 I/O pins with their own independent
direction control
20 I/O pins own independent weak
pull-high and can be enabled by
software.
WDT can be enabled by software if
WDT Disable is selected in user
option.
3. Applications
This MDT10P257 can be used in
appliance motor control, high speed
automotive,
low
power
remote
transmitters/receivers, pointing devices,
and telecommunications processors.
Such as Remote controller, small
instruments, chargers, toy, automobile
and PC peripheral … etc.
This specification are subject to be changed without notice. Any latest information please visit our web
(http;//www.mdtic.com.tw)
(http;//www.mx
mcu.com.cn)for
fordetail
detail
P. 1
site
2011/02 VER 1.1
MDT10P257
4. Pin Assignment
RTCC
Vdd
N/C
Vss
N/C
PA0
PA1
PA2
PA3
PB0
PB1
PB2
PB3
PB4
MDT10P257P11
MDT10P257S11
MDT10P257K11
1
28
2
27
3
26
4
25
5
24
6
23
7
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
MDT10P257SS11
/MCLR
OSC1
OSC2
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
PB7
PB6
PB5
VSS
RTCC
VDD
VDD
PA0
PA1
PA2
PA3
PB0
PB1
PB2
PB3
PB4
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
/MCLR
OSC1
OSC2
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
PB7
PB6
PB5
5. Order Information
MARK
MDT10P257P11
MDT10P257S11
MDT10P257SS11
MDT10P257K11
28
Timer
(8 bit)
1
72
28
1
28-SOP
300 mil
72
72
28
28
1
1
28-SSOP
28-SKINNY
209 mil
300 mil
ROM
(Words)
2K
RAM
(Bytes)
72
2K
2K
2K
I/O
Package
Mil
28-DIP
600 mil
6. Pin Function Description
Pin Name
I/O
Function Description
PA0~PA3
I/O
Port A, TTL input level
PB0~PB7
I/O
Port B, TTL input level
PC0~PC7
I/O
Port C, TTL input level
RTCC
I
Real Time Clock/Counter, Schmitt Trigger input levels
/MCLR
I
Master Clear, Schmitt Trigger input levels
OSC1
I
Oscillator Input
OSC2
O
Oscillator Output
Vdd
Power supply
Vss
Ground
This specification are subject to be changed without notice. Any latest information please visit our web
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P. 2
site
2011/02 VER 1.1
MDT10P257
7. Memory Map
2. Register Map
Address
Description
00
Indirect Addressing Register
01
RTCC
02
PC
03
STATUS
04
MSR
05
Port A
06
Port B
07
Port C
08~0F
Internal RAM, General Purpose Register
10~1F
Internal Memory Select Register (bank 0)
30~3F
Internal Memory Select Register (bank 1)
50~5F
Internal Memory Select Register (bank 2)
70~7F
Internal Memory Select Register (bank 3)
Note : 00~0F, 20~2F, 40~4F, 60~6F are accessed to the same memory location.
2. IAR ( Indirect Address Register) : R0
(2) RTCC (Real Time Counter/Counter Register) : R1
(3) PC (Program Counter) : R2
Write PC, CALL --- always 0
LJUMP, JUMP, LCALL --- from instruction word
RTWI, RET --- from STACK
A10
A9
A8
A7~A0
Write PC, JUMP, CALL --- from b6-5 of STATUS
LJUMP, LCALL --- from instruction word
RTWI, RET --- from STACK
Write PC --- from ALU
LJUMP, JUMP, LCALL, CALL --- from instruction word
RTWI, RET --- from STACK
This specification are subject to be changed without notice. Any latest information please visit our web
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P. 3
site
2011/02 VER 1.1
MDT10P257
(4) STATUS (Status register) : R3
Bit
Symbol
Function
0
C
Carry bit
1
HC
Half Carry bit
2
Z
Zero bit
3
PF
Power loss Flag bit
4
TF
Time overflow Flag bit
page
Page select bit :
6—5
00 : 000H --- 1FFH
01 : 200H --- 3FFH
10 : 400H --- 5FFH
11 : 600H --- 7FFH
7
General purpose bit
——
(5) MSR (Memory Select Register) : R4
Memory Select Register :
00 : 10~1F
01 : 30~3F
10 : 50~5F
11 : 70~7F
b7
b6
b5
b4
b3
b2
b1
b0
Read only, always read as “1”
Indirect Addressing Mode
(6) PORT A : R5
PA3~PA0, I/O Register
(7) PORT B : R6
PB7~PB0, I/O Register
(8) PORT C : R7
PC7~PC0, I/O Register
This specification are subject to be changed without notice. Any latest information please visit our web
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detail
P. 4
site
2011/02 VER 1.1
MDT10P257
(9) TMR (Time Mode Register)
Bit
2—0
3
4
5
6
7
Symbol
Function
Prescaler Value
RTCC rate
WDT rate
1:2
0 0 0
1:1
1:4
0 0 1
1:2
1:8
0 1 0
1:4
1 : 16
0 1 1
1:8
PS2—0
1 0 0
1 : 16
1 : 32
1 0 1
1 : 64
1 : 32
1 1 0
1 : 128
1 : 64
1 1 1
1 : 256
1 : 128
Prescaler assignment bit :
PSC
0 — RTCC
1 — Watchdog Timer
RTCC signal Edge :
TCE
0 — Increment on low-to-high transition on RTCC pin
1 — Increment on high-to-low transition on RTCC pin
RTCC signal set :
TCS
0 — Internal instruction cycle clock
1 — Transition on RTCC pin
Global Pull High Enable set :
0 — Enable weak internal Pull High
PHEN
1 — Disable weak internal Pull High
This bit will be ignored if the “I/O pull-hi” is disable in user
option.
Watchdog timer Enable set :
WDTEN
0 — Enable WDT 1 — Disable WDT
(10) CPIO A, CPIO B, CPIO C (Control Port I/O Mode Register)
The CPIO register is “write-only”
=“0”, I/O pin in output mode;
=“1”, I/O pin in input mode.
(11) Set Pull hi mode
The Pull hi register is “write-only”
=“0”, Disable I/O pin Pull hi
=“1”, Enable I/O pin Pull hi
Do the CPIO instructions twice within three instructions on the same I/O port, then
the second CPIO instruction will set the corresponding pull-hi of I/O pins to enable
when global pull high Enable.
Correct instruction sequence to enable pull-high
Ex1:
LDWI 0FFH
CPIO 06H
←First:set PortB I/O
LDWI 0FH
←Second
This specification are subject to be changed without notice. Any latest information please visit our web
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P. 5
site
2011/02 VER 1.1
MDT10P257
CPIO
06H
Ex2:
LDWI 0FFH
CPIO 06H
CPIO 06H
←Third:enable Pull hi of PB3-0
←First:set PortB I/O
←Second:Enable Pull hi of PB7-0
Incorrect instruction sequence to enable pull-high
Ex1: (over three instructions)
LDWI 0FFH
CPIO 06H
←First:set PortB I/O
LDWI 0FFH
←Second
NOP
←Third
CPIO 06H
←Fourth:set PortB I/O
Ex2:
LDWI
CPIO
CPIO
(Different port)
0FFH
06H
←First:set PortB I/O
05H
←set PortA I/O
(12) User Options by writer programming :
OSC Type
Description
Ext-R
Low cost external R oscillator
XT
Crystal oscillator
LF
Low frequency crystal oscillator
RC
Low cost RC oscillator
OST
Description
150 us\ 20 ms OST= 150 us (for RC) or 20ms (for crystal)
20 ms\80 ms OST= 20 ms (for RC) or 80ms (for crystal)
WDT
Disable
Enable
PED
Disable
Low level
Mid level
L(all on)
Security
Disable
Enable
Description
Watchdog timer disable all the time
(can be enabled by software,if software WDT enable)
Watchdog timer enable all the time
(always enable)
Description
PED disable
1.8V (disable during sleep)
2.1V (disable during sleep)
always Enable 1.8V
Description
Security Disable
Security Enable
This specification are subject to be changed without notice. Any latest information please visit our web
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P. 6
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2011/02 VER 1.1
MDT10P257
Software WDT
Enable
Disable
Freq x 2
Enable
Disable
Description
WDT can be enabled by software
WDT can’t be enabled by software
Description
System clock is doubled
System clock is the oscillation frequency
I/O pull-hi
Enable
Disable
CLKOUT
Enable
Disable
Reset on Err
Enable
Disable
Description
Allow software to enable independent I/O pin
pull-high
Disable all pull-high resistors
Description
Allow OSC2 to output CLKOUT signal
OSC2 will be floating
Description
The MCU will be reset if two illegal instructions are
executed continuously.
Disable the illegal instruction reset function
8. Reset Condition for all Registers
Register
Address
Power-On Reset
/MCLR or WDT Reset
CPIO A
--
1111 1111
1111 1111
CPIO B
--
1111 1111
1111 1111
CPIO C
--
1111 1111
1111 1111
TMR
--
1111 1111
1111 1111
IAR
00h
-
-
RTCC
01h
xxxx xxxx
uuuu uuuu
PC
02h
1111 1111
1111 1111
STATUS
03h
0001 1xxx
000# #uuu
MSR
04h
100x xxxx
100u uuuu
PORT A
05h
- - - - xxxx
- - - - uuuu
PORT B
06h
xxxx xxxx
uuuu uuuu
PORT C
07h
xxxx xxxx
uuuu uuuu
Note : u = unchanged, x = unknown, - = unimplemented, read as “0”
# = value depends on the condition of the following table
This specification are subject to be changed without notice. Any latest information please visit our web
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P. 7
site
2011/02 VER 1.1
MDT10P257
Condition
Status: bit 4
Status: bit 3
/MCLR reset (not during SLEEP)
u
u
/MCLR reset during SLEEP
1
0
WDT reset (not during SLEEP)
0
1
WDT reset during SLEEP
0
0
9. Instruction Set
Mnemonic
Operands
010000 00000000 NOP
No operation
None
010000 00000001 CLRWT
Clear Watchdog timer
0→WT
TF, PF
010000 00000010 SLEEP
Sleep mode
0→WT,stop OSC
TF, PF
010000 00000011 TMODE
Load W to TMODE register W→TMODE
None
010000 00000100 RET
Return
Stack→PC
None
Control I/O port register
W→CPIO
Store W to register
W→R
Instruction Code
R
Function
Operating
Status
010000 00000rrr
CPIO
010001 1rrrrrrr
STWR
011000 trrrrrrr
LDR R, t
Load register
R→t
Z
111010 iiiiiiii
LDWI I
Load immediate to W
I→W
None
010111 trrrrrrr
SWAPR R,t Swap halves register
None
011001 trrrrrrr
INCR R,t
[R(0~3) ↔
R(4~7)]→t
R + 1→t
011010 trrrrrrr
INCRSZ R,
R + 1→t
None
011011 trrrrrrr
Increment register,skip if
zero
ADDWR R,t Add W and register
W + R→t
C,HC,Z
011100 trrrrrrr
SUBWR R,t Subtract W from register
C,HC,Z
011101 trrrrrrr
DECR R,t
R ﹣W→t
(R+/W+1→t)
R ﹣1→t
011110 trrrrrrr
R ﹣1→t
None
010010 trrrrrrr
DECRSZ R,t Decrement register,
skip if zero
ANDWR R,t AND W and register
R ∩ W→t
Z
110100 iiiiiiii
ANDWI I
AND W and immediate
I ∩ W→W
Z
010011 trrrrrrr
IORWR R,t
Inclu. OR W and register
R ∪ W→t
Z
110101 iiiiiiii
IORWI I
Inclu. OR W and immediate I ∪ W→W
Z
010100 trrrrrrr
XORWR R,t Exclu. OR W and register
110110 iiiiiiii
R
Increment register
Decrement register
r
None
None
Z
Z
R ♁ W→t
Z
XORWI I
Exclu. OR W and immediate I ♁ W→W
Z
011111 trrrrrrr
COMR R, t
Complement register
/R→t
Z
010110 trrrrrrr
RRR R,t
Rotate right register
R(n)→R(n-1),
C→R(7) R(0)→C
C
This specification are subject to be changed without notice. Any latest information please visit our web
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P. 8
site
2011/02 VER 1.1
MDT10P257
010101 trrrrrrr
Mnemonic
Operands
RLR R, t
Rotate left register
010000 1xxxxxxx
CLRW
010001 0rrrrrrr
CLRR
0000bb brrrrrrr
Operating
Status
C
Clear working register
R(n)→(n+1),
C→R(0) R(7)→C
0→W
Clear register
0→R
Z
BCR R, b
Bit clear
0→R(b)
None
0010bb brrrrrrr
BSR R, b
Bit set
1→R(b)
None
0001bb brrrrrrr
BTSC R, b Bit Test,skip if clear
Skip if R(b)=0
None
0011bb brrrrrrr
BTSS R, b Bit Test,skip if set
Skip if R(b)=1
None
n→PC,
PC+1→Stack
n→PC
None
n→PC,
PC+1→Stack
Stack→PC,
i→W
n→PC
None
Instruction Code
R
Function
100nnn nnnnnnnn LCALL n
Long CALL subroutine
101nnn nnnnnnnn LJUMP n
Long JUMP to address
110000 nnnnnnnn CALL
Call subroutine
110001 iiiiiiii
n
RTWI i
11001n nnnnnnnn JUMP n
Return, place immediate to
W
JUMP to address
Z
None
None
None
Note :
W
WT
TMODE
CPIO
TF
PF
PC
OSC
Inclu.
Exclu.
AND
:
:
:
:
:
:
:
:
:
:
:
Working register
Watchdog timer
TMODE mode register
Control I/O port register
Timer overflow flag
Power loss flag
Program Counter
Oscillator
Inclusive ‘∪’
Exclusive ‘♁’
Logic AND ‘∩’
b
t
:
:
0
1
R :
C :
HC :
Z :
/
:
x
:
i
:
n :
Bit position
Target
: Working register
: General register
General register address
Carry flag
Half carry
Zero flag
Complement
Don’t care
Immediate data ( 8 bits )
Immediate address
10. Electrical Characteristics
(A) Operating Voltage & Frequency
Vdd ﹕2.3 V ~ 5.5 V
Frequency﹕0 Hz ~ 20 MHz
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P. 9
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2011/02 VER 1.1
MDT10P257
(B) Input Voltage
@ Vdd=5.0 V, Temperature=25 ℃
Vil
Vih
Port
Min.
Max.
PA, PB, PC
Vss
1.0 V
RTCC, /MCLR
Vss
1.0 V
PA, PB, PC
2.0 V
Vdd
RTCC, /MCLR
3.3 V
Vdd
*Threshold Voltage :
Port A, Port B, Port C Vth=1.5 V
RTCC, /MCLR Vil=1.2 V, Vih=3.1V
(Schmitt Trigger)
(C) Output Voltage
@ Vdd=5.0 V, Temperature=25 ℃, the typical value as followings :
PA, PB, PC Port
Ioh=-20.0 mA
Voh=3.40 V
Iol=20.0 mA
Vol=0.50 V
Ioh=-5.0 mA
Voh=4.50 V
Iol=5.0 mA
Vol=0.20 V
(D) Leakage Current
@ Vdd=5.0 V, Temperature=25 ℃, the typical value as followings :
Iil
- 0.1μA (Max.)
Iih
+ 0.1 μA (Max.)
(E) Sleep Current
@WDT-Disable, Temperature=25 ℃, the typical value as followings :
Vdd=2.3 V
Idd<1.0 μA
Vdd=3.0 V
Idd<1.0 μA
Vdd=4.0 V
Idd<1.0 μA
Vdd=5.0 V
Idd<1.0 μA
Vdd=6.0 V
Idd<1.0 μA
This specification are subject to be changed without notice. Any latest information please visit our web
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P. 10
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2011/02 VER 1.1
MDT10P257
@WDT-Enable, Temperature=25 ℃, the typical value as followings :
Vdd=2.3 V
Idd<1.0 μA
Vdd=3.0 V
Idd=1.2 μA
Vdd=4.0 V
Idd=3.0 μA
Vdd=5.0 V
Idd=5.0 μA
Vdd=6.0 V
Idd=10 μA
F) Operating Current
Temperature=25℃, the typical value as followings :
(i) OSC Type=RC; WDT-Enable; @ Vdd=5.0 V PED=Disable
Cext. (F)
3P
20P
100P
Rext. (Ohm)
Frequency (Hz)
Current (A)
4.7 K
9.16 M
1.40mA
10.0 K
5.6 M
1.00mA
47.0 K
1.44 M
350 μA
100.0 K
718.4 K
250 μA
300.0 K
245.2 K
200 μA
470.0 K
154.8 K
180 μA
4.7 K
4.72 M
820µA
10.0 K
2.73 M
550μA
47.0 K
649.6 K
250 μA
100.0 K
318.4 K
200 μA
300.0 K
107.2 K
170 μA
470.0 K
67.6 K
160 μA
4.7 K
1.68 M
400 μA
10.0 K
934 K
300 μA
47.0 K
212.8 K
200 μA
100.0 K
103.2 K
175 μA
300.0 K
34.6 K
160 μA
470.0 K
21.8 K
150 μA
This specification are subject to be changed without notice. Any latest information please visit our web
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P. 11
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2011/02 VER 1.1
MDT10P257
Cext. (F)
300P
Rext. (Ohm)
Frequency (Hz)
Current (A)
4.7 K
716 K
300 μA
10.0 K
392.4 K
220 μA
47.0 K
87.6 K
170 μA
100.0 K
42.4 K
160 μA
300.0 K
14.2 K
155 μA
470.0 K
8.8 K
145 μA
(ii) OSC Type=LF (OSC1&OSC2 External Cap about 20P); WDT-Disable﹔
PED=Disable
Voltage/Frequency
32 K
(Ext 50P)
455 K
1M
Sleep
2.3 V
5.6 μA
[email protected] μA
38.0 μA
<1.0 μA
3.0 V
11.5 μA
47.7 μA
70.0 μA
<1.0 μA
4.0 V
28.7 μA
92.6 μA
125.0 μA
<1.0 μA
5.0 V
50.0 μA
150 μA
190.0 μA
<1.0 μA
6.0 V
135.0 μA
225.0 μA
270.0 μA
<1.0 μA
(iii) OSC Type=XT (OSC1&OSC2 External Cap about 10P); WDT-Enable﹔
PED=Disable
Voltage/Frequency
1M
4M
10 M
Sleep
2.1 V
39.0 μA
120.0 μA
280.0 μA
<1.0 μA
3.0 V
85.0 μA
240.0 μA
480.0 μA
1.2 μA
4.0 V
160.0 μA
400.0 μA
660.0 μA
3.0 μA
5.0 V
260.0 μA
600.0 µA
1.1 mA
5.0 μA
6.0 V
400.0 μA
840.0 µA
1.5 mA
10.0 μA
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P. 12
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2011/02 VER 1.1
MDT10P257
(iv) OSC Type=EXTR ; WDT-Enable; @ Vdd=5.0 V PED=Enable
Rext. (Ohm)
6.2 K
15.0 K
75.0 K
180.0 K
510.0 K
1.1 M
2.4 M
Frequency (Hz)
Current (A)
2.3V
6.56 M
1.7 m
3.0V
7.10M
1.8 m
4.0V
7.62M
2.8 m
5.0V
7.93 M
3.8 m
5.5V
8.02M
4.3 m
2.3V
3.62 M
750 u
3.0V
3.90M
1.1 m
4.0V
4.09M
1.7 m
5.0V
4.19 M
2.4 m
5.5V
4.22M
2.7 m
2.3V
965.7 K
220 u
3.0V
995.7 K
330 u
4.0V
1.01 M
600 u
5.0V
1.02 M
880 u
5.5V
1.02 M
1.1 m
2.3V
417.7 K
100 u
3.0V
424.9 K
185 u
4.0V
428.9 K
380 u
5.0V
431.3 K
640 u
5.5V
432.4 K
790 u
2.3V
154.2 K
45 u
3.0V
155.5 K
110 u
4.0V
156.3 K
280 u
5.0V
157 K
510 u
5.5V
157.3 K
640 u
2.3V
72.8 K
30 u
3.0V
73.2 K
90 u
4.0V
73.6 K
250 u
5.0V
73.9 K
480 u
5.5V
74 K
615 u
2.3V
33.4 K
20 u
3.0V
33.5 K
80 u
4.0V
33.7 K
240 u
5.0V
33.8 K
470 u
5.5V
33.9 K
600 u
This specification are subject to be changed without notice. Any latest information please visit our web
(http;//www.mdtic.com.tw)
((http;//www.mx
mcu.com.cn)
for for
detail
detail
P. 13
site
2011/02 VER 1.1
MDT10P257
(G) Power Edge-detector Reset Voltage (Not in Sleep Mode) (PED :Enable)
Vpr(Low level)≦1.6~1.8 V
Vpr ﹕Vdd (Power Supply)
Vpr(Mid level)≦1.9~2.1 V
PS. If PED_Enable then Internal Power_on_reset will be off
(H) The basic WDT time-out cycle time
@Temperature=25 ℃, the typical value as followings :
Vdd =5.0 V, Temperature=25℃,the typical value as followings:
Voltage (V)
Basic WDT time-out cycle time (ms)
2.3
28.5
3.0
25.0
4.0
21.9
5.0
20.3
6.0
19.1
This specification are subject to be changed without notice. Any latest information please visit our web
(http;//www.mdtic.com.tw)
(htt(http;//www.mx
mcu.com.cn)
for detail
for detail
P. 14
site
2011/02 VER 1.1
MDT10P257
11. Port A ,Port B and Port C Equivalent Circuit
Control Pull-high
Pull high Resistor
Working Register
QB
D
Data I/P
I/O
Control
Latch
I/O Control
Q
CK
Port I/O Pin
D
Data O/P
Latch
Write
CK
Q
Data Bus
D
QB
Read
Data I/P
Latch
Input Resistor
TTL Input Level
CK
This specification are subject to be changed without notice. Any latest information please visit our web
(http;//www.mdtic.com.tw)
(http;//www.mx
mcu.com.cn)forfor
detail
detail
P. 15
site
2011/02 VER 1.1
MDT10P257
12. MCLRB and RTCC Input Equivalent Circuit
R≒1K
MCLRB
Schmitt Trigger
R≒1K
RTCC
Schmitt Trigger
This specification are subject to be changed without notice. Any latest information please visit our web
(http;//www.mdtic.com.tw)
(((http;//www.mx
mcu.com.cn)
for detail
for detail
P. 16
site
2011/02 VER 1.1
MDT10P257
13. Block Diagram
Two Levels Stack
RAM
72*8
EPROM
2048× 14
Port
PA0~PA3
4 bits
Port A
11 bits
11 bits
Program Counter
PULL
HIGH
14 bits
Instruction
Register
Special Register
MCLR
OSC2
OSC1
D0~D7
Instruction
Decoder
Oscillator Circuit
PULLPort
HIGH
B
Port
PB0~PB7
8 bits
Control Circuit
Data 8-bit
Power on Reset
PED
Working Register
ALU
Status Register
PULL
HIGHPort
8-bit Timer/Counter
Prescaler
C
WDT/OST
Timer
RTCC
This specification are subject to be changed without notice. Any latest information please visit our web
(http;//www.mdtic.com.tw)
(http;//www.mx
mcu.com.cn)forfor
detail
detail
P. 17
site
2011/02 VER 1.1
Port
PC0~PC7
8 bits
MDT10P257
14. External Capacitor Selection For Crystal Oscillator
@ Vdd=3.0 V~ 5.0 V
Osc. Type
XT
LF
Resonator Freq.
C1
C2
10 MHz
10 pF ~30 pF
10 pF ~50 pF
4 MHz
10 pF ~50 pF
20 pF ~100 pF
1 MHz
10 pF ~30 pF
20 pF ~50 pF
1 MHz
3 pF ~5 pF
3 pF ~5 pF
455 K
10 pF ~30 pF
20 pF ~50 pF
32 K
10 pF ~20 pF
15 pF ~30 pF
XT Oscillator Mode
Ext-R Oscillator Mode
LF Oscillator Mode
MDT10P257
OSC1
MDT10P257
OSC2
OSC1
OSC2
RC Oscillator Mode
MDT10P257
OSC1
OSC2
Fosc/4
C1
C2
The above values of the external capacitor are listed for reference but the higher capacitance
will increases the start-up time.
This specification are subject to be changed without notice. Any latest information please visit our web
(http;//www.mdtic.com.tw)
(http;//www.mx
mcu.com.cn)forfor
detail
detail
P. 18
site
2011/02 VER 1.1