a FEATURES Fixed Gain of 20 dB Operational Frequency of 100 MHz to 2.7 GHz Linear Output Power Up to 9 dBm Input/Output Internally Matched to 50 ⍀ Temperature and Power Supply Stable Noise Figure 5.3 dB Power Supply 3 V or 5 V 100 MHz–2.7 GHz RF Gain Block AD8353 FUNCTIONAL BLOCK DIAGRAM BIAS AND VREF INPT COM1 VPOS VOUT AD8353 COM2 APPLICATIONS VCO Buffers General Tx/Rx Amplification Power Amplifier Predriver Low Power Antenna Driver PRODUCT DESCRIPTION The AD8353 is a broadband, fixed-gain linear amplifier that operates at frequencies from 100 MHz up to 2.7 GHz. It is intended for use in a wide variety of wireless devices including cellular, broadband, CATV, and LMDS/MMDS applications. By taking advantage of Analog Devices’ high-performance complementary Si bipolar process, these gain blocks provide excellent stability over process, temperature, and power supply. This amplifier is single-ended and internally matched to 50 Ω with a return loss of greater than 10 dB over the full operating frequency range. The AD8353 provides linear output power of 9 dBm with 20 dB of gain at 900 MHz when biased at 3 V and an external RF choke is connected between the power supply and the output pin. The dc supply current is 42 mA. At 900 MHz, the output third order intercept (OIP3) is greater than 23 dBm, and is 19 dBm at 2.7 GHz. The noise figure is 5.3 dB at 900 MHz. The reverse isolation (S12) is –36 dB at 900 MHz and –30 dB at 2.7 GHz. The AD8353 can also operate with a 5 V power supply, in which case no external inductor is required. Under these conditions, the AD8353 delivers 8 dBm with 20 dB of gain at 900 MHz. The dc supply current is 42 mA. At 900 MHz, the OIP3 is greater than 22 dBm and is 19 dBm at 2.7 GHz. The noise figure is 5.6 dB at 900 MHz. The reverse isolation (S12) is –35 dB. The AD8353 is fabricated on Analog Devices’ proprietary, highperformance 25 GHz Si complementary bipolar IC process. The AD8353 is available in a chip scale package that utilizes an exposed paddle for excellent thermal impedance and low impedance electrical connection to ground. It operates over a –40°C to +85°C temperature range. An evaluation board is available. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 V, T = 25ⴗC, 100 nH external inductor between VOUT and VPOS, Z = 50 ⍀, AD8353–SPECIFICATIONS (Vunless= 3 otherwise noted.) S Parameters OVERALL FUNCTION Frequency Range Gain A O Conditions Min Typ Unit 2.7 f = 900 MHz f = 1.9 GHz f = 2.7 GHz f = 900 MHz, –40°C ⱕ TA ⱕ +85°C f = 1.9 GHz, –40°C ⱕ TA ⱕ +85°C f = 2.7 GHz, –40°C ⱕ TA ⱕ +85°C VPOS ± 10%, f = 900 MHz f = 1.9 GHz f = 2.7 GHz f = 900 MHz f = 1.9 GHz f = 2.7 GHz 19.8 17.7 15.6 –0.97 –1.15 –1.34 0.04 –0.004 –0.04 –35.6 –34.9 –30.3 GHz dB dB dB dB dB dB dB/V dB/V dB/V dB dB dB RF INPUT INTERFACE Input Return Loss Pin RFIN f = 900 MHz f = 1.9 GHz f = 2.7 GHz 22.3 20.9 11.2 dB dB dB RF OUTPUT INTERFACE Output Compression Point Pin VOUT f = 900 MHz, 1 dB compression f = 1.9 GHz f = 2.7 GHz f = 900 MHz, –40°C ⱕ TA ⱕ +85°C f = 1.9 GHz, –40°C ⱕ TA ⱕ +85°C f = 2.7 GHz, –40°C ⱕ TA ⱕ +85°C f = 900 MHz f = 1.9 GHz f = 2.7 GHz 9.1 8.4 7.6 –1.46 –1.17 –1 26.3 16.9 13.3 dBm dBm dBm dB dB dB dB dB dB f = 900 MHz, ⌬f = 1 MHz, PIN = –28 dBm f = 1.9 GHz, ⌬f = 1 MHz, PIN = –28 dBm f = 2.7 GHz, ⌬f = 1 MHz, PIN = –28 dBm f = 900 MHz, ⌬f = 1 MHz, PIN = –28 dBm f = 900 MHz f = 1.9 GHz f = 2.7 GHz 23.6 20.8 19.5 31.6 5.3 6 6.8 dBm dBm dBm dBm dB dB dB Delta Gain Gain Supply Sensitivity Reverse Isolation (S12) Delta Compression Point Output Return Loss DISTORTION/NOISE Output Third Order Intercept Output Second Order Intercept Noise Figure POWER INTERFACE Supply Voltage Total Supply Current Supply Voltage Sensitivity Temperature Sensitivity 0.1 Max Pin VPOS 2.7 35 –40°C ⱕ TA ⱕ +85°C 3 41 15.3 60 3.3 48 V mA mA/V A/°C Specifications subject to change without notice. –2– REV. 0 AD8353 SPECIFICATIONS (V = 5 V, T = 25ⴗC, no external inductor between VOUT and VPOS, Z = 50 ⍀, unless otherwise noted.) S Parameters OVERALL FUNCTION Frequency Range Gain A O Conditions Min Typ Unit 2.7 f = 900 MHz f = 1.9 GHz f = 2.7 GHz f = 900 MHz, –40°C ⱕ TA ⱕ +85°C f = 1.9 GHz, –40°C ⱕ TA ⱕ +85°C f = 2.7 GHz, –40°C ⱕ TA ⱕ +85°C VPOS ± 10%, f = 900 MHz f = 1.9 GHz f = 2.7 GHz f = 900 MHz f = 1.9 GHz f = 2.7 GHz 19.5 17.6 15.7 –0.96 –1.18 –1.38 0.09 –0.01 –0.09 –35.4 –34.6 –30.2 GHz dB dB dB dB dB dB dB/V dB/V dB/V dB dB dB RF INPUT INTERFACE Input Return Loss Pin RFIN f = 900 MHz f = 1.9 GHz f = 2.7 GHz 22.9 21.7 11.5 dB dB dB RF OUTPUT INTERFACE Output Compression Point Pin VOUT f = 900 MHz f = 1.9 GHz f = 2.7 GHz f = 900 MHz, –40°C ⱕ TA ⱕ +85°C f = 1.9 GHz, –40°C ⱕ TA ⱕ +85°C f = 2.7 GHz, –40°C ⱕ TA ⱕ +85°C f = 900 MHz f = 1.9 GHz f = 2.7 GHz 8.3 8.1 7.5 –1.05 –1.49 –1.33 27 22 14.3 dBm dBm dBm dB dB dB dB dB dB f = 900 MHz, ⌬f = 1 MHz, PIN = –28 dBm f = 1.9 GHz, ⌬f = 1 MHz, PIN = –28 dBm f = 2.7 GHz, ⌬f = 1 MHz, PIN = –28 dBm f = 900 MHz, ⌬f = 1 MHz, PIN = –28 dBm f = 900 MHz f = 1.9 GHz f = 2.7 GHz 22.8 20.6 19.5 30.3 5.6 6.3 7.1 dBm dBm dBm dBm dB dB dB Delta Gain Gain Supply Sensitivity Reverse Isolation (S12) Delta Compression Point Output Return Loss DISTORTION/NOISE Output Third Order Intercept Output Second Order Intercept Noise Figure POWER INTERFACE Supply Voltage Total Supply Current Supply Voltage Sensitivity Temperature Sensitivity 0.1 Max Pin VPOS 4.5 35 –40°C ⱕ TA ⱕ +85°C Specifications subject to change without notice. REV. 0 –3– 5 42 4.3 45.7 5.5 52 V mA mA/V A/°C AD8353 ABSOLUTE MAXIMUM RATINGS* PIN CONFIGURATION Supply Voltage VPOS . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Input Power (re: 50 Ω) . . . . . . . . . . . . . . . . . . . . . . . 10 dBm Equivalent Voltage . . . . . . . . . . . . . . . . . . . . . . 700 mV rms Internal Power Dissipation Paddle Not Soldered . . . . . . . . . . . . . . . . . . . . . . . 325 mW Paddle Soldered . . . . . . . . . . . . . . . . . . . . . . . . . . . 812 mW JA (Paddle Soldered) . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W JA (Paddle Not Soldered) . . . . . . . . . . . . . . . . . . . . 200°C/W Maximum Junction Temperature . . . . . . . . . . . . . . . . 150°C Operating Temperature Range . . . . . . . . . . . –40°C to +85°C Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Lead Temperature Range (Soldering 60 sec) . . . . . . . . 240°C COM1 1 NC 2 Package Description VOUT TOP VIEW 6 VPOS (Not to Scale) 5 COM2 4 COM2 NC = NO CONNECT PIN FUNCTION DESCRIPTIONS Pin Mnemonic Description 1, 8 COM1 3 INPT 4, 5 COM2 6 2 7 VPOS NC VOUT ORDERING GUIDE Temperature Range COM1 7 INPT 3 *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Model AD8353 8 Package Option AD8353ACP–REEL7 –40°C to +85°C 7" Tape and Reel CP-8 AD8353–EVAL Evaluation Board CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8353 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. –4– Device Common. Connect to low impedance ground. RF Input Connection. Must be ac-coupled. Device Common. Connect to low impedance ground. Positive Supply Voltage No Connection RF Output Connection. Must be ac-coupled. WARNING! ESD SENSITIVE DEVICE REV. 0 Typical Performance Characteristics–AD8353 90 90 120 120 60 150 150 30 180 0 330 210 330 300 240 300 240 30 180 0 210 60 270 270 TPC 1. S11 vs. Frequency, VS = 3 V, TA = 25ⴗC, 100 MHz ≤ f ≤ 3 GHz TPC 4. S22 vs. Frequency, VS = 3 V, TA = 25ⴗC, 100 MHz ≤ f ≤ 3 GHz 25 25 GAIN AT 3.3V GAIN AT –40ⴗC 20 15 GAIN – dB GAIN – dB 20 GAIN AT 2.7V 10 GAIN AT 3.0V 5 GAIN AT +25ⴗC GAIN AT +85ⴗC 10 5 0 0 500 1000 1500 2000 FREQUENCY – MHz 2500 0 3000 0 –5 –5 REVERSE ISOLATION – dB 0 –10 –15 –20 –25 S12 AT 3.0V –30 0 500 1000 1500 2000 FREQUENCY – MHz S12 AT 2.7V –35 3000 –10 –15 –20 –25 S12 AT –40 ⴗ C S12 AT +25 ⴗ C –30 –35 S12 AT 3.3V –40 S12 AT +85 ⴗ C –40 0 500 1000 1500 2000 2500 3000 0 FREQUENCY – MHz 500 1000 1500 2000 FREQUENCY – MHz 2500 3000 TPC 6. Reverse Isolation vs. Frequency, VS = 3 V, TA = –40ⴗC, +25ⴗC, and +85ⴗC TPC 3. Reverse Isolation vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25ⴗC REV. 0 2500 TPC 5. Gain vs. Frequency, VS = 3 V, TA = –40ⴗC, +25ⴗC, and +85ⴗC TPC 2. Gain vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25ⴗC REVERSE ISOLATION – dB 15 –5– AD8353 12 12 10 10 P1 dB AT –40ⴗC P1 dB AT 3.3V 8 P1 dB – dBm P1 dB – dBm 8 P1 dB AT 3.0V P1 dB AT 2.7V 6 P1 dB AT +25ⴗC 6 4 4 2 2 P1 dB AT +85ⴗC 0 0 0 500 1000 1500 2000 FREQUENCY – MHz 2500 0 3000 500 1000 1500 2000 2500 3000 FREQUENCY – MHz TPC 10. P1 dB vs. Frequency, VS = 3 V, TA = –40ⴗC, +25ⴗC, and +85ⴗC TPC 7. P1 dB vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25ⴗC 45 30 40 25 PERCENTAGE – % PERCENTAGE – % 35 30 25 20 15 20 15 10 10 5 5 0 7.0 0 7.2 7.4 7.6 7.8 8.0 8.2 8.4 8.6 8.8 OUTPUT 1 dB COMPRESSION POINT – dBm 19.1 9.0 TPC 8. Distribution of P1 dB VS = 3 V, TA = 25ⴗC, f = 2.2 GHz 28 26 26 24 24 OIP3 – dBm OIP3 – dBm 20.3 20.7 OIP3 – dBm 21.1 21.5 21.9 OIP3 AT –40ⴗC 22 OIP3 AT 3.3V 20 18 19.9 TPC 11. Distribution of OIP3, VS = 3 V, TA = 25ⴗC, f = 2.2 GHz 28 22 19.5 OIP3 AT 3.0V OIP3 AT 2.7V OIP3 AT +85ⴗC 20 OIP3 AT +25ⴗC 18 16 16 14 14 12 12 10 10 0 500 1000 1500 2000 FREQUENCY – MHz 2500 0 3000 500 1000 1500 2000 2500 3000 FREQUENCY – MHz TPC 12. OIP3 vs. Frequency, VS = 3 V, TA = –40ⴗC, +25ⴗC, and +85ⴗC TPC 9. OIP3 vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25ⴗC –6– REV. 0 AD8353 8.0 8.5 7.5 8.0 7.5 NOISE FIGURE – dB NOISE FIGURE – dB 7.0 6.5 NF AT 3.3V 6.0 5.5 5.0 NF AT 2.7V 7.0 6.5 NF AT +85ⴗC 6.0 NF AT +25ⴗC 5.5 NF AT –40ⴗC 5.0 NF AT 3.0V 4.5 4.5 4.0 4.0 0 500 1000 1500 2000 3000 2500 0 500 1000 FREQUENCY – MHz 1500 2000 3000 2500 FREQUENCY – MHz TPC 13. Noise Figure vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25ⴗC TPC 16. Noise Figure vs. Frequency, VS = 3 V, TA = –40°C, +25°C, and +85°C 50 45 IS AT 3.3V 45 40 SUPPLY CURRENT – mA 40 PERCENTAGE – % 25 20 15 10 IS AT 3.0V 35 IS AT 2.7V 30 25 20 15 10 5 5 0 –60 0 5.90 5.95 6.00 6.05 6.10 6.15 6.20 6.25 6.30 6.35 6.40 6.45 6.50 6.55 6.60 NOISE FIGURE – dB TPC 14. Distribution of Noise Figure, VS = 3 V, TA = 25ⴗC, f = 2.2 GHz –40 –20 150 120 100 0 30 180 330 210 60 150 30 180 0 330 210 300 300 240 270 270 TPC 15. S11 vs. Frequency, VS = 5 V, TA = 25°C, 100 MHz ≤ f ≤ 3 GHz REV. 0 80 90 60 240 60 TPC 17. Supply Current vs. Temperature, VS = 2.7 V, 3 V, and 3.3 V 90 120 0 40 20 TEMPERATURE – ⴗC TPC 18. S22 vs. Frequency, VS = 5 V, TA = 25°C, 100 MHz ≤ f ≤ 3 GHz –7– AD8353 25 25 GAIN AT 5.5V GAIN AT –40ⴗC 20 20 GAIN AT +85ⴗC 15 15 GAIN – dB GAIN – dB GAIN AT 5.0V GAIN AT 4.5V 10 GAIN AT +25ⴗC 10 5 5 0 0 0 500 1000 1500 2000 2500 0 3000 500 1000 1500 2000 FREQUENCY – MHz FREQUENCY – MHz 3000 TPC 22. Gain vs. Frequency, VS = 5 V, TA = –40°C, +25ⴗC, and +85ⴗC TPC 19. Gain vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25ⴗC 0 0 –5 –5 REVERSE ISOLATION – dB REVERSE ISOLATION – dB 2500 –10 –15 –20 –25 S12 AT 5V –30 –10 –15 –20 –25 S12 AT +85ⴗC S12 AT +25ⴗC –30 S12 AT 5.5V –35 –35 S12 AT –40ⴗC S12 AT 4.5V –40 –40 0 500 1000 1500 2000 FREQUENCY – MHz 2500 0 3000 1000 1500 2000 2500 3000 FREQUENCY – MHz TPC 20. Reverse Isolation vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25ⴗC TPC 23. Reverse Isolation vs. Frequency, VS = 5 V, TA = –40ⴗC, +25ⴗC, and +85ⴗC 10 12 P1 dB AT 5.5V 9 P1 dB AT +85ⴗC 10 8 7 P1 dB AT +25ⴗC 8 P1 dB AT 4.5V 6 P1 dB – dBm P1 dB – dBm 500 P1 dB AT 5.0V 5 4 P1 dB AT –40ⴗC 6 4 3 2 2 1 0 0 500 1000 1500 2000 FREQUENCY – MHz 2500 0 3000 0 500 1000 1500 2000 FREQUENCY – MHz 2500 3000 TPC 24. P1 dB vs. Frequency, VS = 5 V, TA = –40ⴗC, +25ⴗC, and +85ⴗC TPC 21. P1 dB vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25ⴗC –8– REV. 0 AD8353 45 30 40 25 PERCENTAGE – % PERCENTAGE – % 35 30 25 20 15 20 15 10 10 5 5 0 7.0 7.2 7.4 7.6 7.8 8.0 8.2 8.4 8.6 OUTPUT 1 dB COMPRESSION POINT – dBm 0 18.8 8.8 TPC 25. Distribution of P1 dB, VS = 3 V, TA = 25°C, f = 2.2 GHz 19.2 20.4 20.0 OIP3 – dBm 19.6 20.8 21.2 21.6 TPC 28. Distribution of OIP3, VS = 5 V, TA = 25ⴗC, f = 2.2 GHz 26 26 24 24 OIP3 AT –40ⴗC 22 22 OIP3 AT 5.5V OIP3 – dBm OIP3 – dBm 20 18 OIP3 AT 4.5V OIP3 AT 5.0V 16 20 OIP3 AT +25ⴗC 18 OIP3 AT +85ⴗC 16 14 14 12 12 10 10 0 500 1000 1500 2000 2500 0 3000 500 1000 1500 2000 2500 3000 FREQUENCY – MHz FREQUENCY – MHz TPC 29. OIP3 vs. Frequency, VS = 5 V, TA = –40ⴗC, +25ⴗC, and +85ⴗC TPC 26. OIP3 vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 27ⴗC 10 9.0 8.5 9 7.5 NOISE FIGURE – dB NOISE FIGURE – dB 8.0 7.0 NF AT 5.5V 6.5 6.0 NF AT 4.5V 5.5 8 7 NF AT +85ⴗC 6 NF AT +25ⴗC NF AT 5.0V 5.0 5 NF AT –40ⴗC 4.5 4 4.0 0 500 1000 1500 2000 2500 0 3000 TPC 27. Noise Figure vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25ⴗC REV. 0 500 1000 1500 2000 2500 3000 FREQUENCY – MHz FREQUENCY – MHz TPC 30. Noise Figure vs. Frequency, VS = 5 V, TA = –40ⴗC, +25ⴗC, and +85ⴗC –9– 15 20 25 10 19 20 5 18 0 17 10 –5 16 5 –10 15 0 6.10 6.15 6.20 6.25 6.30 6.35 6.40 6.45 6.50 6.55 6.60 6.65 6.70 NOISE FIGURE – dB –15 15 14 –30 –25 –20 –15 –10 PIN – dBm –5 0 5 TPC 33. Output Power and Gain vs. Input Power, VS = 3 V, TA = 25ºC, f = 900 MHz TPC 31. Distribution of Noise Figure, VS = 5 V, TA = 25ⴗC, f = 2.2 GHz 50 15 20 10 19 5 18 0 17 –5 16 –10 15 IS AT 5.5V 45 40 35 IS AT 5.0V 30 25 20 15 10 GAIN – dB IS AT 4.5V POUT – dBm SUPPLY CURRENT – mA GAIN – dB 30 POUT – dBm PERCENTAGE – % AD8353 5 0 –60 –40 –20 0 20 40 60 80 –15 100 TEMPERATURE – ⴗC 14 –30 –25 –20 –15 –10 –5 0 5 PIN – dBm TPC 34. Output Power and Gain vs. Input Power, VS = 5 V, TA = 25ºC, f = 900 MHz TPC 32. Supply Current vs. Temperature, VS = 4.5 V, 5 V, and 5.5 V –10– REV. 0 AD8353 THEORY OF OPERATION APPLICATIONS The AD8353 is a two-stage feedback amplifier employing both shunt-series and shunt-shunt feedback. The first stage is degenerated and resistively loaded, and provides approximately 10 dB of gain. The second stage is a PNP-NPN Darlington output stage, which provides another 10 dB of gain. Series-shunt feedback from the emitter of the output transistor sets the input impedance to 50 Ω over a broad frequency range. Shunt-shunt feedback from the amplifier output to the input of the Darlington stage helps to set the output impedance to 50 Ω. The amplifier can be operated from a 3 V supply by adding a choke inductor from the amplifier output to VPOS. Without this choke inductor, operation from a 5 V supply is also possible. The AD8353 RF Gain Block may be used as a general purpose fixed-gain amplifier in a wide variety of applications, such as a driver for a transmitter power amplifier (Figure 1). Its excellent reverse isolation also makes this amplifier suitable for use as a local oscillator buffer amplifier that would drive the local oscillator port of an up or down converter mixer (Figure 2). HIGH POWER AMPLIFIER AD8353 Figure 1. AD8353 as a Driver Amplifier BASIC CONNECTIONS The AD8353 RF Gain Block is a fixed-gain amplifier with single-ended input and output ports whose impedances are nominally equal to 50 Ω over the frequency range 100 MHz to 2.7 GHz. Consequently, it can be directly inserted into a 50 Ω system with no impedance-matching circuitry required. The input and output impedances are sufficiently stable versus variations in temperature and supply voltage that no impedance matching compensation is required. A complete set of scattering parameters is available at the Analog Devices website (www.analog.com). MIXER AD8353 LOCAL OSCILLATOR Figure 2. AD8353 as a LO Driver Amplifier AD8353 The input pin (INPT) is connected directly to the base of the first amplifier stage, which is internally biased to approximately 1 V, so a dc-blocking capacitor should be connected between the source that drives the AD8353 and the input pin, INPT. When the supply voltage is 3 V, it is recommended that an external RF choke be connected between the supply voltage and the output pin, VOUT. This will increase the dc voltage applied to the collector of the output amplifier stage, which will improve performance of the AD8353 to be very similar to the performance produced when 5 V is used for the supply voltage. The inductance of the RF choke should be approximately 100 nH, and care should be taken to ensure that the lowest series self-resonant frequency of this choke is well above the maximum frequency of operation for the AD8353. The supply voltage input, VPOS, should be bypassed using a large value capacitance (approximately 0.47 µF or larger) and a smaller, high-frequency bypass capacitor (approximately 100 pF) physically located close to the VPOS pin. 2 NC VOUT 7 3 INPT VPOS 6 C2 1000pF OUTPUT L1 VP C3 100pF 4 COM2 C4 0.47F COM2 5 NC = NO CONNECT Figure 3. Evaluation Board Schematic EVALUATION BOARD Figure 3 shows the schematic of the AD8353 evaluation board. Note that L1 is shown as an optional component that is used to obtain maximum gain only when VP = 3 V. The board is powered by a single supply in the range 2.7 V to 5.5 V. The power supply is decoupled by a 0.47 µF and a 100 pF capacitor. Table I. Evaluation Board Configuration Options Component Function Default Value C1, C2 C3 AC-Coupling Capacitors High-Frequency Bypass Capacitor Low-Frequency Bypass Capacitor Optional RF Choke, used to increase current through output stage when VP = 3 V. Not recommended for use when VP = 5 V. 1000 pF, 0603 C4 L1 The recommended connections and components are shown in the schematic of the AD8353 evaluation board. REV. 0 COM1 8 C1 1000pF INPUT It is critical to supply very low inductance ground connections to the ground pins (pins 1, 4, 5, and 8) as well as to the backside exposed paddle. This will ensure stable operation. The AD8353 is designed to operate over a wide supply voltage range, from 2.7 V to 5.5 V. The output of the part, VOUT, is taken directly from the collector of the output amplifier stage. This node is internally biased to approximately 2.2 V when the supply voltage is 5 V. Consequently, a dc-blocking capacitor should be connected between the output pin, VOUT, and the load that it drives. The value of this capacitor is not critical, but it should be 100 pF or larger. 1 COM1 –11– 100 pF, 0603 0.47 µF, 0603 100 nH, 0603 C02721–0–2/02(0) AD8353 Figure 5. Component Side Figure 4. Silkscreen Top OUTLINE DIMENSIONS Dimensions shown in millimeters. 8-Lead LFCSP (CP-8) 1.89 1.74 1.59 3.25 3.00 2.75 1.95 1.75 1.55 2.95 2.75 2.55 0.60 0.45 0.30 5 BOTTOM VIEW 0.30 0.23 0.18 0.25 REF SEATING PLANE 0.05 0.02 0.00 0.15 0.10 0.05 1 4 0.50 BSC 12ⴗ 0ⴗ 8 0.25 0.20 0.15 1.00 0.90 0.80 NOTES 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS. 2. PADDLE IS COPPER PLATED WITH LEAD FINISH. PRINTED IN U.S.A. PIN 1 INDICATOR 2.25 2.00 1.75 0.55 0.40 0.30 –12– REV. 0