LTC6800 Rail-to-Rail Input and Output, Instrumentation Amplifier U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC®6800 is a precision instrumentation amplifier. The CMRR is typically 116dB with a single 5V supply and is independent of gain. The input offset voltage is guaranteed below 100µV with a temperature drift of less than 250nV/°C. The LTC6800 is easy to use; the gain is adjustable with two external resistors, like a traditional op amp. 116dB CMRR Independent of Gain Maximum Offset Voltage: 100µV Maximum Offset Voltage Drift: 250nV/°C – 40°C to 125°C Operation Rail-to-Rail Input Range Rail-to-Rail Output Swing Supply Operation: 2.7V to 5.5V Available in an MS8 and 3mm × 3mm × 0.8mm DFN Packages The LTC6800 uses charge balanced sampled data techniques to convert a differential input voltage into a single ended signal that is in turn amplified by a zero-drift operational amplifier. U APPLICATIO S ■ ■ ■ ■ ■ The differential inputs operate from rail-to-rail and the single ended output swings from rail-to-rail. The LTC6800 is available in an MS8 surface mount package. For space limited applications, the LTC6800 is available in a 3mm × 3mm × 0.8mm dual fine pitch leadless package (DFN). Thermocouple Amplifiers Electronic Scales Medical Instrumentation Strain Gauge Amplifiers High Resolution Data Acquisition , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATIO High Side Power Supply Current Sense Typical Input Referred Offset vs Input Common Mode Voltage (VS = 3V) 1.5mΩ 15 VREGULATOR – 10 8 7 LTC6800 3 + 6 5 4 10k 0.1µF OUT 100mV/A OF LOAD CURRENT ILOAD 5 VOS (µV) 2 VS = 3V VREF = 0V TA = 25°C LOAD 0 G = 1000 G = 100 –5 G = 10 150Ω –10 G=1 6800 TA01 –15 0 1 1.5 2 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) 3 6800 TA02 6800fa 1 LTC6800 W W U W ABSOLUTE AXI U RATI GS (Note 1) Total Supply Voltage (V + to V –) .............................. 5.5V Input Current ...................................................... ±10mA VIN+ – VREF ........................................................ 5.5V VIN– – VREF ........................................................ 5.5V Output Short Circuit Duration .......................... Indefinite Operating Temperature Range (Note 7) ................................................ – 40°C to 125°C Storage Temperature Range MS8 Package ................................... – 65°C to 150°C DD Package ...................................... – 65°C to 125°C Lead Temperature (Soldering, 10 sec).................. 300°C U W U PACKAGE/ORDER I FOR ATIO ORDER PART NUMBER LTC6800HMS8 TOP VIEW NC 1 –IN 2 +IN 3 4 V– 8 7 6 5 V+ OUT RG REF MS8 PART MARKING MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 200°C/W LTADE ORDER PART NUMBER TOP VIEW NC 1 8 V+ –IN 2 7 OUT +IN 3 6 RG V– 4 5 REF LTC6800HDD DD PART MARKING LAEP DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 160°C/W UNDERSIDE METAL INTERNALLY CONNECTED TO V– (PCB CONNECTION OPTIONAL) Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V + = 3V, V – = 0V, REF = 200mV. Output voltage swing is referenced to V –. All other specifications reference the OUT pin to the REF pin. PARAMETER CONDITIONS MIN Input Offset Voltage (Note 2) VCM = 200mV Average Input Offset Drift (Note 2) TA = –40°C to 85°C TA = 85°C to 125°C ● ● Common Mode Rejection Ratio (Notes 4, 5) AV = 1, VCM = 0V to 3V ● Integrated Input Bias Current (Note 3) VCM = 1.2V 90 TYP MAX ±100 µV –1 ±250 –2.5 nV/°C µV/°C 113 UNITS dB 4 10 3 nA Integrated Input Offset Current (Note 3) VCM = 1.2V 1 Input Noise Voltage DC to 10Hz 2.5 µVP-P Power Supply Rejection Ratio (Note 6) VS = 2.7V to 5.5V ● 110 116 dB = 2k to V – ● ● 2.85 2.95 2.94 2.98 V V Output Voltage Swing High RL RL = 10k to V – Output Voltage Swing Low ● nA 20 mV Gain Error AV = 1 0.1 % Gain Nonlinearity AV = 1 100 ppm 6800fa 2 LTC6800 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V + = 3V, V – = 0V, REF = 200mV. Output voltage swing is referenced to V –. All other specifications reference the OUT pin to the REF pin. PARAMETER CONDITIONS Supply Current No Load MIN TYP ● MAX UNITS 1.2 mA Internal Op Amp Gain Bandwidth 200 kHz Slew Rate 0.2 V/µs 3 kHz Internal Sampling Frequency The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = 0V, REF = 200mV. Output voltage swing is referenced to V–. All other specifications reference the OUT pin to the REF pin. PARAMETER CONDITIONS MIN TYP Input Offset Voltage (Note 2) VCM = 200mV Average Input Offset Drift (Note 2) TA = –40°C to 85°C TA = 85°C to 125°C ● ● Common Mode Rejection Ratio (Notes 4, 5) AV = 1, VCM = 0V to 5V ● Integrated Input Bias Current (Note 3) VCM = 1.2V 4 10 nA Integrated Input Offset Current (Note 3) VCM = 1.2V 1 3 nA –1 90 MAX UNITS ±100 µV ±250 –2.5 nV/°C µV/°C 116 dB Power Supply Rejection Ratio (Note 6) VS = 2.7V to 5.5V ● 110 116 dB Output Voltage Swing High RL = 2k to V – RL = 10k to V – ● ● 4.85 4.95 4.94 4.98 V V Output Voltage Swing Low 20 mV Gain Error AV = 1 0.1 % Gain Nonlinearity AV = 1 100 ppm Supply Current No Load ● 1.3 ● mA Internal Op Amp Gain Bandwidth 200 kHz Slew Rate 0.2 V/µs 3 kHz Internal Sampling Frequency Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: These parameters are guaranteed by design. Thermocouple effects preclude measurement of these voltage levels in high speed automatic test systems. VOS is measured to a limit determined by test equipment capability. Note 3: If the total source resistance is less than 10k, no DC errors result from the input bias currents or the mismatch of the input bias currents or the mismatch of the resistances connected to –IN and +IN. Note 4: The CMRR with a voltage gain, AV, larger than 10 is 120dB (typ). Note 5: At temperatures above 70°C, the common mode rejection ratio lowers when the common mode input voltage is within 100mV of the supply rails. Note 6: The power supply rejection ratio (PSRR) measurement accuracy depends on the proximity of the power supply bypass capacitor to the device under test. Because of this, the PSRR is 100% tested to relaxed limits at final test. However, their values are guaranteed by design to meet the data sheet limits. Note 7: The LTC6800H is guaranteed functional over the operating temperature range of –40°C to 125°C. Specifications over the –40°C to 125°C range (denoted by ●) are assured by design and characterization but are not tested or QA sampled at these temperatures. 6800fa 3 LTC6800 U W TYPICAL PERFOR A CE CHARACTERISTICS Input Offset Voltage vs Input Common Mode Voltage 5 0 G = 1000 G = 100 –5 G = 10 –10 20 VS = 5V VREF = 0V 10 TA = 25°C INPUT OFFSET VOLTAGE (µV) 10 Input Offset Voltage vs Input Common Mode Voltage 15 VS = 3V VREF = 0V TA = 25°C INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) 15 Input Offset Voltage vs Input Common Mode Voltage G = 1000 5 0 G = 100 –5 G=1 G = 10 –10 –15 3.0 0 6800 G01 INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) 60 VS = 5V 15 VREF = 0V G = 10 10 5 0 TA = 70°C –5 TA = 25°C –10 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 40 20 0 TA = 85°C –20 –40 –60 5 20 TA = 125°C 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) RS = 0k 0 RS = 10k –20 SMALL CIN –40 –60 RS = 15k RS + RS = 20k – RS 0 0 TA = 85°C –20 –40 3.0 3.0 6800 G07 TA = 125°C 0 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 6800 G06 RS = 15k RS = 5k RS –20 SMALL CIN + – 30 20 5 6800 G08 R+ = 0k, R– = 10k 0 R+ = 5k, R– = 0k R+ = 10k, R– = 0k –10 R+ –20 –30 SMALL CIN R– –50 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) R+ = 0k, R– = 15k R+ = 0k, R– = 5k 10 –40 RS 0 VS = 3V VREF = 0V CIN < 100pF G = 10 TA = 25°C 40 RS = 10k –10 5 Additional Input Offset Due to Input RS Mismatch vs Input Common Mode (CIN < 100pF) RS = 20k 0 –30 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) 20 50 VS = 5V VREF = 0V + – 20 RIN = RIN = RS CIN < 100pF G = 10 10 TA = 25°C 3.0 VS = 5V VREF = 0V G = 10 40 –60 0 30 RS = 5k 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) 6800 G03 Additional Input Offset Due to Input RS vs Input Common Mode (CIN < 100pF) ADDITIONAL OFFSET ERROR (µV) ADDITIONAL OFFSET ERROR (µV) 40 0 6800 G05 Additional Input Offset Due to Input RS vs Input Common Mode (CIN < 100pF) VS = 3V VREF = 0V R+ = R– = RS CIN < 100pF G = 10 TA = 25°C TA = –55°C 60 6800 G04 60 TA = 25°C –10 Input Offset Voltage vs Input Common Mode Voltage, 85°C ≤ TA ≤ 125°C VS = 3V VREF = 0V G = 10 TA = –55°C 0 TA = 70°C –5 2053 G02 20 –20 0 Input Offset Voltage vs Input Common Mode Voltage, 85°C ≤ TA ≤ 125°C Input Offset Voltage vs Input Common Mode Voltage –15 5 –20 5 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) INPUT OFFSET VOLTAGE (µV) 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) ADDITIONAL OFFSET ERROR (µV) 0 10 –15 G=1 –15 VS = 3V 15 VREF = 0V G = 10 0 + – R+ =15k, R– = 0k 2.5 1.0 1.5 2.0 0.5 INPUT COMMON MODE VOLTAGE (V) 3.0 6800 G09 6800fa 4 LTC6800 U W TYPICAL PERFOR A CE CHARACTERISTICS Additional Input Offset Due to Input RS Mismatch vs Input Common Mode (CIN < 100pF) Additional Input Offset Due to Input RS vs Input Common Mode (CIN > 1µF) 40 0 RIN+ = 15k, RIN– = 0k RIN+ = 20k, RIN– = 0k R+ –20 + SMALL CIN –30 – R– –40 0 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) –10 70 VS = 3V VREF = 0V R+ = R– = RS C > 1µF 20 GIN= 10 TA = 25°C 10 30 ADDITIONAL OFFSET ERROR (µV) RS = 15k RS = 10k RS = 5k 0 –10 RS –20 – RS –40 0 5 + BIG CIN –30 Additional Input Offset Due to Input RS Mismatch vs Input Common Mode (CIN > 1µF) R+ = 0Ω, R – = 1k ADDITIONAL OFFSET ERROR (µV) R+ = 0Ω, R – = 500Ω 50 R+ = 0Ω, R – = 100Ω 0 R+ = 100Ω, R – = 0Ω –50 R+ = 500Ω, R – = 0Ω R+ –100 + – R = 1k, R = 0Ω BIG CIN –150 + – R– 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) 100 0 R+ = 100Ω, R – = 0Ω –50 R+ = 500Ω, R – = 0Ω R+ –100 + 3.0 –200 R+ = 1k, R – = 0Ω BIG CIN –150 8 NONLINEARITY (ppm) 6 VOS (µV) 0 VS = 5V VS = 3V 0 1 4 2 4 3 INPUT COMMON MODE VOLTAGE (V) 40 20 0 VS = 3V 2 VREF (V) 3 4 6800 G16 VS = 5V –20 –40 –80 –50 –25 5 0 25 50 75 100 6800 G15 Gain Nonlinearity, G = 10 10 VS = ±2.5V VREF = 0V G=1 RL = 10k TA = 25°C 2 0 –2 –4 –10 –2.4 –1.9 –1.4 –0.9 –0.4 0.1 0.6 OUTPUT VOLTAGE (V) 125 TEMPERATURE (°C) VS = ±2.5V 8 VREF = 0V G = 10 6 RL = 10k 4 TA = 25°C 2 0 –2 –4 –6 –8 –8 1 5 –60 – –6 –20 0 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 6800 G12 Gain Nonlinearity, G = 1 10 10 –30 0 6800 G14 VIN+ = VIN – = REF G = 10 TA = 25°C –10 – RS 60 R+ = 0Ω, R – = 500Ω R+ = 0Ω, R – = 100Ω 50 VOS vs VREF 20 + BIG CIN –50 Offset Voltage vs Temperature R+ = 0Ω, R – = 1k 6800 G13 30 VS = 5V VREF = 0V R+ = R– = RS CIN > 1µF G = 10 TA = 25°C RS –30 80 VS = 5V VREF = 0V TA = 25°C G = 10 150 R– –200 0 RS = 500Ω –10 3.0 NONLINEARITY (ppm) ADDITIONAL OFFSET ERROR (µV) 100 RS = 1k 10 Additional Input Offset Due to Input RS Mismatch vs Input Common Mode (CIN > 1µF) 200 VS = 3V VREF = 0V TA = 25°C G = 10 RS = 5k 30 6800 G11 6800 G10 150 RS = 10k 50 –70 2.5 1.0 1.5 2.0 0.5 INPUT COMMON MODE VOLTAGE (V) INPUT OFFSET VOLTAGE (µV) ADDITIONAL OFFSET ERROR (µV) VS = 5V RIN+ = 0k, RIN– = 20k 30 VREF = 0V CIN < 100pF RIN+ = 0k, RIN– = 15k G = 10 20 RIN+ = 0k, RIN– = 10k TA = 25°C RIN+ = 10k, RIN– = 0k 10 ADDITIONAL OFFSET ERROR (µV) 40 200 Additional Input Offset Due to Input RS vs Input Common Mode (CIN > 1µF) 1.1 1.6 6800 G17 –10 –2.4 –1.4 –0.4 0.6 1.6 OUTPUT VOLTAGE (V) 2.6 6800 G18 6800fa 5 LTC6800 U W TYPICAL PERFOR A CE CHARACTERISTICS Input Voltage Noise Density vs Frequency 120 INPUT REFERRED NOISE DENSITY (nV/√Hz) 300 R+ = R – = 1k CMRR (db) 110 + – R = R = 10k 100 R+ = 10k, R– = 0Ω R+ = 0Ω, R– = 10k 90 R+ 80 R– 70 + – 1 10 100 FREQUENCY (Hz) 250 200 VS = 5V 150 VS = 3V 100 50 0 1000 3 G = 10 TA = 25°C 1 10 100 1000 FREQUENCY (Hz) 6800 G19 TA = 25°C 4.5 OUTPUT VOLTAGE SWING (V) INPUT REFFERED NOISE VOLTAGE (µV) 5.0 VS = 5V TA = 25°C 1 0 –1 –2 –3 –1 1 TIME (s) 3.5 VS = 3V, SOURCING 3.0 2.5 2.0 1.5 VS = 3V, SINKING VS = 5V, SINKING 1.0 1 0.1 OUTPUT CURRENT (mA) 2 0.01 0.001 SETTLING ACCURACY (%) 0.1 6800 G25 TA = 85°C 0.85 TA = 125°C 0.80 0.75 TA = –55°C 0.70 TA = 0°C 3.5 4.5 SUPPLY VOLTAGE (V) 5.5 6800 G24 3.40 VS = 5V dVOUT = 1V 30 0.1% ACCURACY TA = 25°C 25 3.35 20 15 10 0 3.30 TA = 125°C 10 100 GAIN (V/V) 1000 10000 6800 G26 TA = 85°C 3.25 3.20 3.15 1 6 Internal Clock Frequency vs Supply Voltage 5 1 0 0.0001 0.90 0.60 2.5 10 CLOCK FREQUENCY (kHz) 3 5 0.65 35 VS = 5V dVOUT = 1V G < 100 TA = 25°C 4 3 1.00 Settling Time vs Gain 5 –1 1 TIME (s) 6800 G23 SETTLING TIME (ms) SETTLING TIME (ms) 6 –3 0.95 0 0.01 5 3 –5 4.0 Low Gain Settling Time vs Settling Accuracy 7 –2 Supply Current vs Supply Voltage 6800 G22 8 –1 6800 G21 VS = 5V, SOURCING 0.5 –5 0 Output Voltage Swing vs Output Current 3 –3 1 6800 G20 Input Referred Noise in 10Hz Bandwidth 2 VS = 3V TA = 25°C 2 –3 10000 SUPPLY CURRENT (mA) VS = 3V, 5V VIN = 1VP-P 120 TA = 25°C Input Referred Noise in 10Hz Bandwidth INPUT REFFERED NOISE VOLTAGE (µV) CMRR vs Frequency 3.10 2.5 TA = 25°C TA = –55°C 3.5 4.5 SUPPLY VOLTAGE (V) 5.5 6 6800 G27 6800fa 6 LTC6800 U U U PI FU CTIO S NC (Pin 1): Not Connected. +IN (Pin 3): Noninverting Input. RG (Pin 6): Inverting Input of Internal Op Amp. With a resistor, R2, connected between the OUT pin and the RG pin and a resistor, R1, between the RG pin and the REF pin, the DC gain is given by 1 + R2 / R1. V – (Pin 4): Negative Supply. OUT (Pin 7): Amplifier Output. –IN (Pin 2): Inverting Input. REF (Pin 5): Voltage Reference (VREF) for Amplifier Output. VOUT = GAIN (V+IN – V–IN) + VREF V + (Pin 8): Positive Supply. W BLOCK DIAGRA 8 V+ +IN + 3 –IN CS OUT CH 7 – 2 REF 5 V– RG 6 4 6800 BD 6800fa 7 LTC6800 U W U U APPLICATIO S I FOR ATIO Theory of Operation where V+IN and V–IN are the voltages of the +IN and –IN pins respectively, VREF is the voltage at the REF pin and V+ is the positive supply voltage. The LTC6800 uses an internal capacitor (CS) to sample a differential input signal riding on a DC common mode voltage (see Block Diagram). This capacitor’s charge is transferred to a second internal hold capacitor (CH) translating the common mode of the input differential signal to that of the REF pin. The resulting signal is amplified by a zero-drift op amp in the noninverting configuration. The RG pin is the negative input of this op amp and allows external programmability of the DC gain. Simple filtering can be realized by using an external capacitor across the feedback resistor. For example, with a 3V single supply and a 0V to 100mV differential input voltage, VREF must be between 0V and 1.6V. Settling Time The sampling rate is 3kHz and the input sampling period during which CS is charged to the input differential voltage VIN is approximately 150µs. First assume that on each input sampling period, CS is charged fully to VIN. Since CS = CH (= 1000pF), a change in the input will settle to N bits of accuracy at the op amp noninverting input after N clock cycles or 333µs(N). The settling time at the OUT pin is also affected by the settling of the internal op amp. Since the gain bandwidth of the internal op amp is typically 200kHz, the settling time is dominated by the switched capacitor front end for gains below 100 (see Typical Performance Characteristics). Input Voltage Range The input common mode voltage range of the LTC6800 is rail-to-rail. However, the following equation limits the size of the differential input voltage: V – ≤ (V+IN – V–IN) + VREF ≤ V + – 1.3 SINGLE SUPPLY, UNITY GAIN 5V 8 V+IN 3 + VD V–IN – + 7 2 6 – 5 4 6800 F01 0V < V+IN < 5V 0V < V–IN < 5V 0V < VD < 3.7V VOUT = VD Figure 1 6800fa 8 LTC6800 U W U U APPLICATIO S I FOR ATIO Input Current Whenever the differential input VIN changes, CH must be charged up to the new input voltage via CS. This results in an input charging current during each input sampling period. Eventually, CH and CS will reach VIN and, ideally, the input current would go to zero for DC inputs. In reality, there are additional parasitic capacitors which disturb the charge on CS every cycle even if VIN is a DC voltage. For example, the parasitic bottom plate capacitor on CS must be charged from the voltage on the REF pin to the voltage on the –IN pin every cycle. The resulting input charging current decays exponentially during each input sampling period with a time constant equal to RSCS. If the voltage disturbance due to these currents settles before the end of the sampling period, there will be no errors due to source resistance or the source resistance mismatch between –IN and +IN. With RS less than 10k, no DC errors occur due to this input current. In the Typical Performance Characteristics section of this data sheet, there are curves showing the additional error from nonzero source resistance in the inputs. If there are no large capacitors across the inputs, the amplifier is less sensitive to source resistance and source resistance mismatch. When large capacitors are placed across the inputs, the input charging currents described above result in larger DC errors, especially with source resistor mismatches. Power Supply Bypassing The LTC6800 uses a sampled data technique and therefore contains some clocked digital circuitry. It is therefore sensitive to supply bypassing. A 0.1µF ceramic capacitor must be connected between Pin␣ 8 (V +) and Pin 4 (V –) with leads as short as possible. 6800fa 9 LTC6800 U TYPICAL APPLICATIO S Precision ÷2 5V 0.1µF 3 VIN + 8 7 LTC6800 2 – 5 4 VOUT 6 V VOUT = IN 2 1k 0.1µF 6800 TA03 Precision Doubler (General Purpose) 2.5V 3 VIN + 0.1µF 8 7 LTC6800 2 – 4 5 VOUT 6 VOUT = 2VIN 0.1µF 0.1µF –2.5V 6800 TA04 Precision Inversion (General Purpose) 2.5V 3 + 0.1µF 8 7 LTC6800 VIN 2 – 4 5 VOUT 6 VOUT = –VIN 0.1µF –2.5V 6800 TA05 6800fa 10 LTC6800 U PACKAGE DESCRIPTIO MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) DETAIL “A” 0.254 (.010) 0° – 6° TYP GAUGE PLANE 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 1.10 (.043) MAX 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.86 (.034) REF 8 7 6 5 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.889 ± 0.127 (.035 ± .005) 3.00 ± 0.102 (.118 ± .004) 5.23 (NOTE 4) (.206) MIN 4.90 ± 0.152 0.127 ± 0.076 (.193 ± .006) (.005 ± .003) 0.65 (.0256) BSC 0.52 (.0205) REF 1 2 3 4 3.20 – 3.45 (.126 – .136) 0.42 ± 0.038 (.0165 ± .0015) TYP 0.65 (.0256) BSC RECOMMENDED SOLDER PAD LAYOUT MSOP (MS8) 0603 DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) R = 0.115 TYP 5 0.38 ± 0.10 8 0.675 ±0.05 3.00 ±0.10 (4 SIDES) 1.65 ± 0.10 (2 SIDES) 3.5 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) PIN 1 TOP MARK 0.200 REF PACKAGE OUTLINE 0.75 ±0.05 0.00 – 0.05 4 0.28 ± 0.05 1 0.50 BSC 0.28 ± 0.05 0.50 BSC 2.38 ±0.05 (2 SIDES) 2.38 ±0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. ALL DIMENSIONS ARE IN MILLIMETERS 3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 4. EXPOSED PAD SHALL BE SOLDER PLATED RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS (DD8) DFN 0203 6800fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC6800 U TYPICAL APPLICATIO Differential Bridge Amplifier 3V 0.1µF R < 10k 8 2 – 7 LTC6800 3 OUT 6 + 5 R2 10k 4 0.1µF R1 10Ω GAIN = 1 + R2 R1 6800 TA06 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1100 Precision Zero Drift Instrumentation Amplifier Fixed Gains of 10 or 100, 10µV Offset, 50pA Input Bias Current LT®1101 Precision, Micropower, Single Supply Instrumentation Amplifier Fixed Gains of 10 or 100, IS < 105µA LT1167 Single Resistor Gain Programmable, Precision Instrumentation Amplifier Single Gain Set Resistor: G = 1 to 10,000, Low Noise: 7.5nV√Hz LT1168 Low Power Single Resistor Gain Programmable, Precision Instrumentation Amplifier ISUPPLY = 530µA LTC1043 Dual Precision Instrumentation Switched-Capacitor Building Block Rail-to-Rail Input, 120dB CMRR LT1789-1 Single Supply, Rail-to-Rail Output, Micropower Instrumentation Amplifier ISUPPLY = 80µA Maximum LTC2050 Zero-Drift Operation Amplifier SOT-23 Package, 3µV Max VOS, 30nV/°C Max Drift LTC2051 Dual Zero-Drift Operational Amplifier MS8 Package, 3µV Max VOS, 30nV/°C Max Drift LTC2052 Quad Zero-Drift Operational Amplifier GN-16 Package, 3µV Max VOS, 30nV/°C Max Drift LTC2053 Single Supply, Zero Drift, Rail-to-Rail Input and Output Instrumentation Amplifier MS8 Package, 10µV Max VOS, 50nV/°C Max Drift 6800fa 12 Linear Technology Corporation LT/TP 0903 1K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2002