AD ADM2485BRWZ

High Speed Isolated RS-485 Transceiver
with Integrated Transformer Driver
ADM2485
Preliminary Technical Data
GENERAL DESCRIPTION
FEATURES
The ADM2485 differential bus transceiver is an integrated,
galvanically isolated component designed for bidirectional data
communication on multipoint bus transmission lines. It is
designed for balanced transmission lines and complies with
ANSI TIA/EIA RS-485-A-1998 and ISO 8482:1987(E).
Half-duplex isolated RS-485 transceiver
Integrated oscillator driver for external transformer
PROFIBUS compliant
Complies with ANSI TIA/EIA RS-485-A-1998 and
ISO 8482:1987(E)
16 Mbps data rate
5 V or 3 V operation (VDD1)
50 nodes on bus
Receiver open-circuit, fail-safe design
High common-mode transient immunity: >25 kV/μs
Isolated DE OUT status output
Thermal shutdown protection
Safety and regulatory approvals (pending):
UL recognition—2500 VRMS for 1 minute per UL 1577
CSA component acceptance notice #5A
VDE certificate of conformity
DIN EN 60747-5-2 (VDE 0884 Part 2): 2003-01
DIN EN 60950 (VDE 0805):2001-12; EN 60950: 2000
VIORM = 560 V peak
Operating temperature range: -40° to 85°C
Wide body 16-lead SOIC package
The device employs Analog Devices’ iCoupler technology to
combine a 3-channel isolator, a 3-state differential line driver,
and a differential input receiver into a single package. An onchip oscillator outputs a pair of square waveforms which drive
an external transformer to provide isolated power with an
external transformer. The logic side of the device can be
powered with either a 5 V or a 3 V supply while the bus side is
powered with an isolated 5 V supply.
The ADM2485 driver has an active high enable. The driver
differential outputs and the receiver differential inputs are
connected internally to form a differential input/output port
that imposes minimal loading on the bus when the driver is
disabled or when VDD1 or VDD2 = 0 V. Also provided is an active
high receiver disable that causes the receive output to enter a
high impedance state.
The device has current-limiting and thermal shutdown features
to protect against output short circuits and situations where bus
contention might cause excessive power dissipation. The part is
fully specified over the industrial temperature range and is
available in a 16-lead wide-body SOIC package.
APPLICATIONS
Isolated RS-485/RS-422 interfaces
PROFIBUS networks
Industrial field networks
Multipoint data transmission systems
FUNCTIONAL BLOCK DIAGRAM
����
��
����
��
���
������
������������������
���
���
�
���
�
��
��� �
��� �
Figure 1
Rev.PrK
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700
www.analog.com Fax: 781.326.8703
© 2006 Analog Devices, Inc. All rights reserved.
ADM2485
Preliminary Technical Data
SPECIFICATIONS
2.7 ≤ VDD1 ≤ 5.5 V, 4.75 V ≤ VDD2 ≤ 5.25 V, TA = TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter
DRIVER
Differential Outputs
Differential Output Voltage, VOD
Δ |VOD| for Complementary Output States
Common-Mode Output Voltage, VOC
Δ |VOC| for Complementary Output States
Output Short-Circuit Current, VOUT = High
Output Short-Circuit Current, VOUT = Low
Bus Enable Output
Output High Voltage
Min
Max
Unit
Test Conditions/Comments
2.1
2.1
2.1
5
5
5
5
V
V
V
V
60
60
0.2
3
0.2
200
200
V
V
V
mA
mA
R = ∞, Figure 3
R = 50 Ω (RS-422), Figure 3
R = 27 Ω (RS-485), Figure 3
VTST = −7 V to 12 V, VDD1 ≥ 4.75,
Figure 4
R = 27 Ω or 50 Ω, Figure 3
R = 27 Ω or 50 Ω, Figure 3
R = 27 Ω or 50 Ω, Figure 3
0.1
0.3
0.4
V
V
V
V
V
V
IODE = 20 µA
IODE = 1.6 mA
IODE = 4 mA
IODE = −20 µA
IODE = −1.6 mA
IODE = −4 mA
0.25 VDD1
10
V
V
µA
TxD, RTS, RE
TxD, RTS, RE
TxD, RTS, RE = VDD1 or 0 V
mV
mV
VDD2−0.1
VDD2−0.3
VDD2−0.4
Typ
VDD2−0.1
VDD2−0.2
Output Low Voltage
0.1
0.2
Logic Inputs
Input High Voltage
Input Low Voltage
CMOS Logic Input Current (TxD, RTS, RE)
RECEIVER
Differential Inputs
Differential Input Threshold Voltage, VTH
Input Hysteresis
Input Resistance (A, B)
Input Current (A, B)
RxD Logic Output:
Output High Voltage
0.7 VDD1
−10
0.01
−200
20
VDD1−0.1
VDD1−0.4
200
Transformer Driver
Oscillator Frequency
Switch On resistance
Start-Up Voltage
kΩ
mA
mA
0.1
0.4
85
±1
V
V
V
V
mA
µA
IOUT = 20 µA, VA−VB=0.2 V
IOUT = 4 mA, VA−VB=0.2 V
IOUT = −20 µA, VA−VB=-0.2 V
IOUT = −4 mA, VA−VB=-0.2 V
VOUT = GND or VCC
0.4 V ≤ VOUT ≤ 2.4 V
1.5
2.5
kHz
Ω
V
VDD1−0.2
0.2
Output Short Circuit Current
Three-State Output Leakage Current
0.6
−0.35
−7 V ≤ VCM ≤ +12V
−7 V ≤ VCM ≤ +12V
−7 V ≤ VCM ≤ +12V
VIN = +12 V
VIN = −7 V
70
30
Output Low Voltage
7
500
0.5
2.2
Rev. PrK | Page 2 of 15
−7 V ≤ VOUT ≤ +12 V
−7 V ≤ VOUT ≤ + 12 V
Preliminary Technical Data
Parameter
POWER SUPPLY CURRENT
Logic Side
ADM2485
Min
Typ
Max
Unit
Test Conditions/Comments
1.3
mA
mA
mA
mA
mA
mA
mA
mA
mA
kV/µs
RTS = 0 V, VDD1 = 5.5 V
2 Mbps, VDD1 = 5.5 V, Figure 5
16 Mbps, VDD1 = 5.5 V, Figure 5
RTS = 0 V, VDD1 = 3 V
2 Mbps, VDD1 = 3 V, Figure 5
16 Mbps, VDD1 = 3 V, Figure 5
RTS = 0 V
2 Mbps, RTS = VDD1, Figure 5
16 Mbps, RTS = VDD1, Figure 5
VCM = 1 kV, Transient Magnitude =
800 V
VHF = +5V, −2 V < VTEST2 < 7 V,
1 < fTEST < 50 MHz, Figure 6
1.0
4.0
0.8
1.1
2.1
Bus Side
3.0
43.0
58.0
COMMON-MODE TRANSIENT IMMUNITY1
25
100
HIGH FREQUENCY COMMON-MODE NOISE
IMMUNITY
1
mV
CM is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential
difference between the logic and bus sides. The transient magnitude is the range over which the common-mode is slewed. The common-mode voltage slew rates
apply to both rising and falling common-mode voltage edges.
TIMING SPECIFICATIONS
2.7 ≤ VDD1 ≤ 5.5 V, 4.75 V ≤ VDD2 ≤ 5.25 V, TA = TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
DRIVER
Maximum Data Rate
Propagation Delay Input to Output
tPLH, tPHL
RTS-to-DE Propagation Delay
Driver O/P to O/P tSKEW
Min
Typ
Max
Unit
Test Conditions/Comments
16
25
45
55
Mbps
ns
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF; See Figure 7.
35
2
55
5
ns
ns
5
15
ns
43
43
1
2
53
55
3
5
ns
ns
ns
ns
45
3
55
5
13
ns
ns
ns
3
13
ns
20
Rise/Fall Time tR, tF
Enable Time
Disable Time
Enable Skew, |tAZH-tBZL|, |tAZL-tBZH|
Disable Skew, |tAHZ-tBLZ|, |tALZ-tBHZ|
RECEIVER
Propagation Delay tPLH, tPHL
Differential Skew tSKEW
Enable Time
Disable Time
25
Rev. PrK | Page 3 of 15
See Figure 8.
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF; See Figure 7 and
Figure 12.
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF; See Figure 7 and
Figure 12.
See Figure 9 and Figure 14.
See Figure 9 and Figure 14.
See Figure 9 and Figure 14.
See Figure 9 and Figure 14.
CL = 15 pF; See Figure 10 and Figure 13.
CL = 15 pF; See Figure 10 and Figure 13.
RL = 1 kΩ, CL = 15 pF; See Figure 11 and
Figure 15.
RL = 1 kΩ, CL = 15 pF; See Figure 11 and
Figure 15.
ADM2485
Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. All voltages are relative to
their respective ground.
Table 3.
Parameter
VDD1
VDD2
Digital Input Voltage (RTS, RE, TxD)
Digital Output Voltage
RxD
DE OUT
D1, D2
Driver Output/Receiver Input Voltage
Operating Temperature Range
Storage Temperature Range
Average Output Current per Pin
θJA Thermal Impedance
Lead Temperature
Soldering (10 sec)
Vapour Phase (60 sec)
Infrared (15 sec)
Rating
−0.5 V to +6 V
−0.5 V to +6 V
−0.5 V to VDD1 + 0.5 V
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
−0.5 V to VDD1 + 0.5 V
−0.5 V to VDD2 + 0.5 V
13V
−9 V to +14 V
−40°C to +85°C
−55°C to +150°C
−35 mA to +35 mA
73°C/W
300°C
215°C
220°C
ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. PrK | Page 4 of 15
Preliminary Technical Data
ADM2485
ADM2485E CHARACTERISTICS
PACKAGE CHARACTERISTICS
Table 2.
Parameter
Resistance (Input-Output)1
Capacitance (Input-Output)1
Input Capacitance2
Input IC Junction-to-Case Thermal Resistance
Output IC Junction-to-Case Thermal Resistance
1
2
Symbol
RI-O
CI-O
CI
θJCI
θJCO
Min
Typ
1012
3
4
33
28
Max
Unit
Ω
pF
pF
°C/W
°C/W
Test Conditions
f = 1 MHz
Thermocouple located at
center of package underside
Device considered a two-terminal device: Pins 1, 2, 3, 4, 5, 6, 7, and 8 shorted together, and Pins 9, 10, 11, 12, 13, 14, 15, and 16 shorted together.
Input capacitance is from any input data pin to ground.
REGULATORY INFORMATION
The ADM2485 is to be approved by the following organizations:
Table 3.
Organization
UL
Approval Type
To be recognized under 1577 component recognition program.
Notes
In accordance with UL1577, each ADM2485
is proof-tested by applying an insulation
test voltage ≥3000 V rms for 1 second (current
leakage detection limit = 5 µA).
CSA
VDE
To be approved under CSA Component Acceptance Notice #5A.
To be certified according to DIN EN 60747-5-2 (VDE 0884 Part 2): 2003-01
In accordance with VDE 0884, each ADM2485
is proof-tested by applying an insulation
test voltage ≥1050 VPEAK for 1 second
(partial discharge detection limit = 5 pC).
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 4.
Parameter
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
Symbol
L(I01)
Value
2500
5.15 min
Unit
V rms
mm
Minimum External Tracking (Creepage)
L(I02)
5.5 min
mm
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Isolation Group
CTI
0.017 min
>175
IIIa
mm
V
Rev. PrK | Page 5 of 15
Conditions
1-minute duration.
Measured from input terminals to output
terminals, shortest distance through air.
Measured from input terminals to output
terminals, shortest distance along body.
Insulation distance through insulation.
DIN IEC 112/VDE 0303 Part 1.
Material Group (DIN VDE 0110, 1/89,).
ADM2485
Preliminary Technical Data
VDE 0884 INSULATION CHARACTERISTICS
This isolator is suitable for basic electrical isolation only within the safety limit data. Maintenance of the safety data must be ensured by
means of protective circuits.
An asterisk (*) on packages denotes VDE 0884 approval for 560 V peak working voltage.
Table 5.
Description
Installation classification per DIN VDE 0110 for rated mains voltage
≤150 V rms
≤300 V rms
≤400 V rms
Climatic classification
Pollution degree (DIN VDE 0110, Table 1)
Maximum working insulation voltage
Input to output test voltage, Method b1
VIORM × 1.875 = VPR, 100% production tested, tm = 1 sec, partial discharge < 5 pC
Input to output test voltage, Method a
(After environmental tests, Subgroup 1)
VIORM × 1.6 = VPR, tm = 60 sec, partial discharge < 5 pC
(After input and/or safety test, Subgroup 2/3)
VIORM × 1.2 = VPR, tm = 60 sec, partial discharge < 5 pC
Highest allowable overvoltage
(Transient overvoltage, tTR = 10 sec)
Safety-limiting values (maximum value allowed in the event of a failure. See
thermal derating curve)
Case temperature
Input current
Output current
Insulation resistance at Ts, VIO = 500 V
Rev. PrK | Page 6 of 15
Symbol
Characteristic
Unit
VIORM
VPR
I to IV
I to III
I to II
40/85/21
2
560
1050
VPEAK
VPEAK
896
VPEAK
VPR
672
VPEAK
VTR
4000
VPEAK
TS
IS, INPUT
IS, OUTPUT
Rs
150
265
335
>109
°C
mA
mA
Ω
Preliminary Technical Data
ADM2485
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS D1 1
16 VDD2
D2 2
15 GND2
GND1 3
VDD1 4
RxD 5
ADM2485
T OP V IEW
( Not t o Scale)
14 GND2
13 B
12 A
11 GND2
RE 6
RTS 7
10 DE OUT
TxD 8
9
GND2
Figure 2. Pin Configuration
Table 4.
Pin
1
2
3
4
Mnemonic
D1
D2
GND1
VDD1
5
RxD
6
RE
7
RTS
8
10
12
TxD
DE OUT
A
13
B
9,11,14,15
16
GND2
VDD2
Function
Transformer driver terminal 1.
Transformer driver terminal 2.
Ground, Logic Side.
Power Supply Logic Side, 3V or 5V. Decoupling capacitor to GND1 required, capacitor value should
be between 0.01 µF and 0.1 µF.
Receiver Output data. This output is high when (A – B) > 200 mV, and low when (A – B) < -200
mV. The output is tri-stated when the receiver is disabled, i.e. when RE is driven high.
Receiver Enable input. This is an active-low input. Driving this input low enables the receiver,
while driving it high disables the receiver.
Driver enable input. Driving this input high enables the driver, while driving it low disables the
driver.
Driver input. Data to be transmitted by the driver is applied to this input.
Driver Enable status output
Noninverting Driver Output/Receiver Input. When the driver is disabled or VDD1 or VDD2 is powered
down, pin A is put in a high impedance state to avoid overloading the bus.
Inverting Driver Output/Receiver Input. When the driver is disabled or VDD1 or VDD2 is powered
down, pin B is put in a high impedance state to avoid overloading the bus.
Ground, Bus Side.
Power Supply Bus Side, Isolated 5V supply. Decoupling capacitor to GND2 required, capacitor value
should be between 0.01 µF and 0.1 µF.
Rev. PrK | Page 7 of 15
ADM2485
Preliminary Technical Data
TEST CIRCUITS A
R
CL1
VOD
VOC
CL2
B
04604-005
R
04736-005
RLDIFF
Figure 7. Driver Propagation Delay
Figure 3. Driver Voltage Measurement
375Ω
DE 150Ω
375Ω
GALVANIC ISOLATION
RTS
VTST
60Ω
04604-006
VOD3
TxD
Figure 4. Driver Voltage Measurement
RxD
50pF
DE OUT
A
B
RE
DE
DE OUT
VCC
195Ω
A
A
110Ω
B
195Ω
GND2
RE
VDD1
GND2
Figure 8. RTS to DE OUT Propagation Delay
VDD2
GND1
GND2
VDD2
110Ω
S1
TxD
S2
50pF
B
04604-004
RxD
VDD2
GND1
VOUT
04604-009
GALVANIC ISOLATION
TxD
VDD1
150Ω
04604-008
RTS
RTS
Figure 9. Driver Enable/Disable
Figure 5. Supply-Current Measurement Test Circuit
A
RxD
2.2kΩ
RECEIVE
GND2
ENABLE
195Ω
B
195Ω
GND1
100nF
VDD2
CL
Figure 10. Receiver Propagation Delay
FTEST,
110nF VHF
110Ω 470nF
A
GND2
VDD1
50Ω
GND2
+1.5V
50Ω
VCC
22kΩ
S1
VTEST2
100nF
04604-010
VCM(HF)
VDD2
VOUT
RE
Figure 6. High Frequency Common-Mode Noise Test Circuit
RL
–1.5V
RE
CL
VOUT
RE IN
Figure 11. Receiver Enable/Disable
Rev. PrK | Page 8 of 15
S2
04604-013
GALVANIC ISOLATION
TxD
B
04604-012
DE OUT
DE
RTS
Preliminary Technical Data
ADM2485
SWITCHING CHARACTERISTICS
0.7VDD1
3V
1.5V
RTS
1.5V
0.5VDD1
0.5VDD1
0.3VDD1
0V
tPLH
tZL
tPHL
tLZ
B
1/2VO
VO
2.3V
A–B
VOH +0.5V
VOL
A
tHZ
tZH
tSKEW = |tPLH – tPHL|
0V
2.3V
A–B
0V
10% POINT
10% POINT
–VO
tR
02603-009
VO
04604-021
VOH
VOH –0.5V
90% POINT
90% POINT
tF
Figure 12. Driver Propagation Delay, Rise/Fall Timing
Figure 14. Driver Enable/Disable Timing
0.7VDD1
A–B
0V
0V
RE
0.5VDD1
0.5VDD1
0.3VDD1
tPLH
tPHL
tSKEW = |tPLH – tPHL|
1.5V
VOL
VOH +0.5V
O/P LOW
VOL
tHZ
tZH
04604-019
1.5V
1.5V
RxD
O/P HIGH
VOH
RxD
1.5V
VOH –0.5V
0V
Figure 13. Receiver Propagation Delay
Figure 15. Receiver Enable/Disable Timing
Rev. PrK | Page 9 of 15
04604-020
VOH
RxD
tLZ
tZL
ADM2485
Preliminary Technical Data
TYPICAL PERFORMANCE CHARACTERISTICS Figure 16. Unloaded Supply Current vs. Temperature
Figure 19. Driver/Receiver Propagation Delay, Low to High
(RLDiff = 54 Ω, CL1 = CL2 = 100 pF)
Figure 20. Driver/Receiver Propagation Delay, High to Low
(RLDiff = 54 Ω, CL1 = CL2 = 100 pF)
Figure 17. Driver Propagation Delay vs. Temperature
Figure 21. Thermal Derating Curve, Dependence of Safety-Limiting Values
with Case Temperature per VDE 0884
Figure 18. Receiver Propagation Delay vs. Temperature
Rev. PrK | Page 10 of 15
Preliminary Technical Data
ADM2485
Figure 25. Receiver Output Low Voltage vs. Temperature
I = –4 mA
Figure 22. Output Current vs. Receiver Output High Voltage
Figure 23. Output Current vs. Receiver Output Low Voltage
Figure 24. Receiver Output High Voltage vs. Temperature I = −4 mA
Rev. PrK | Page 11 of 15
ADM2485
Preliminary Technical Data
CIRCUIT DESCRIPTION
ELECTRICAL ISOLATION
TRUTH TABLES
In the ADM2485, electrical isolation is implemented on the
logic side of the interface. Therefore, the part has two main
sections: a digital isolation section and a transceiver section
(see Figure 26). Driver input and data enable, applied to the
TxD and RTS pins, respectively, and referenced to logic ground
(GND1), are coupled across an isolation barrier to appear at the
transceiver section referenced to isolated ground (GND2).
Similarly, the receiver output, referenced to isolated ground in
the transceiver section, is coupled across the isolation barrier to
appear at the RxD pin referenced to logic ground.
The truth tables in this section use these abbreviations:
Letter
H
I
L
X
Z
NC
Description
High level
Indeterminate
Low level
Irrelevant
High impedance (off)
Disconnected
Table 6. Transmitting
iCoupler Technology
The digital signals are transmitted across the isolation barrier
using iCoupler technology. This technique uses chip scale
transformer windings to couple the digital signals magnetically
from one side of the barrier to the other. Digital inputs are
encoded into waveforms that are capable of exciting the
primary transformer winding. At the secondary winding, the
induced waveforms are then decoded into the binary value that
was originally transmitted.
VDD1
VDD2
ISOLATION
BARRIER
A
TxD
ENCODE
DECODE
RTS
ENCODE
DECODE
RxD
DECODE
ENCODE
RE
DIGITAL ISOLATION
GND 1
D
B
DE OUT
R
TRANSCEIVER
Supply Status
VDD1
VDD2
On
On
On
On
On
On
On
Off
Off
On
Off
Off
Inputs
RTS
H
H
L
X
X
X
TxD
H
L
X
X
X
X
Output
A
B
H
L
L
H
Z
Z
Z
Z
Z
Z
Z
Z
DE OUT
H
H
L
L
L
L
Table 7. Receiving
Supply Status
VDD1
VDD2
Inputs
A−B (V)
RE
Output
RxD
On
On
On
On
On
On
Off
Off
>0.2
<−0.2
−0.2 < A − B < 0.2
Inputs open
X
X
X
X
L or NC
L or NC
L or NC
L or NC
H
L or NC
L or NC
L or NC
H
L
I
H
Z
H
H
L
GND 2
Figure 26. ADM2485 Digital Isolation and Transceiver Sections
Rev. PrK | Page 12 of 15
On
On
On
On
On
Off
On
Off
Preliminary Technical Data
ADM2485
100
The limitation on the iCoupler’s ac magnetic field immunity is
set by the condition in which the induced error voltage in the
receiving coil (the bottom coil in this case) is made sufficiently
large, either to falsely set or reset the decoder. The voltage
induced across the bottom coil is given by
⎛ − dβ ⎞
2
V =⎜
⎟∑ πrn ; n = 1, 2, . . . , N
⎝ dt ⎠
where, if the pulses at the transformer output are greater than
1.0 V in amplitude:
β = magnetic flux density (gauss)
N = number of turns in receiving coil
rn = radius of nth turn in receiving coil (cm)
10k
100k
1M
10M
MAGNETIC FIELD FREQUENCY (Hz)
100M
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kGauss induces a
voltage of 0.25 V at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event occurs during a transmitted pulse and
is the worst-case polarity, it reduces the received pulse from
>1.0 V to 0.75 V—still well above the 0.5 V sensing threshold of
the decoder.
Figure 28 shows the magnetic flux density values in terms of
more familiar quantities such as maximum allowable current
flow at given distances away from the ADM2485 transformers.
1000
The decoder has a sensing threshold of about 0.5 V; therefore,
there is a 0.5 V margin in which induced voltages can be
tolerated.
Given the geometry of the receiving coil and an imposed
requirement that the induced voltage is, at most, 50% of the
0.5 V margin at the decoder, a maximum allowable magnetic
field is calculated, as shown in Figure 27.
0.01
Figure 27. Maximum Allowable External Magnetic Flux Density
MAXIMUM ALLOWABLE CURRENT (kA)
Because iCouplers use a coreless technology, no magnetic
components are present, and the problem of magnetic
saturation of the core material does not exist. Therefore,
iCouplers have essentially infinite dc field immunity. The
analysis below defines the conditions under which this may
occur. The ADM2485’s 3 V operating condition is examined
because it represents the most susceptible mode of operation.
0.1
0.001
1k
The receiver input includes a fail-safe feature that guarantees a
logic high RxD output when the A and B inputs are floating or
open-circuited.
MAGNETIC FIELD IMMUNITY
1
04604-016
RECEIVER FAIL-SAFE INPUTS
10
DISTANCE = 1m
100
DISTANCE = 5mm
10
DISTANCE = 100mm
1
0.1
0.01
1k
10k
100k
1M
10M
MAGNETIC FIELD FREQUENCY (Hz)
100M
04604-017
The ADM2485 contains thermal shutdown circuitry that
protects the part from excessive power dissipation during fault
conditions. Shorting the driver outputs to a low impedance
source can result in high driver currents. The thermal sensing
circuitry detects the increase in die temperature under this
condition and disables the driver outputs. This circuitry is
designed to disable the driver outputs when a die
temperature of 150°C is reached. As the device cools, the drivers
are re-enabled at a temperature of 140°C.
MAXIMUM ALLOWABLE MAGNETIC
FLUX DENSITY (kGAUSS)
THERMAL SHUTDOWN
Figure 28. Maximum Allowable Current for
Various Current-to-ADM2485 Spacings
At combinations of strong magnetic field and high frequency,
any loops formed by printed circuit board traces could induce
sufficiently large error voltages to trigger the thresholds of
succeeding circuitry. Care should be taken in the layout of such
traces to avoid this possibility.
Rev. PrK | Page 13 of 15
ADM2485
Preliminary Technical Data
APPLICATIONS INFORMATION
PC BOARD LAYOUT
output a regulated 5V output.
The ADM2485 isolated RS-485 transceiver requires no external
interface circuitry for the logic interfaces. Power supply
bypassing is strongly recommended at the input and output
supply pins (see Figure ).
If ADM2485 is powered by 5V on the logic side a 1CT:1.5CT
transformer T1 is required so that therefore is enough
headroom for the ADP667 LDO to output a regulated 5V
output.
Bypass capacitors are most conveniently connected between Pin
3 and Pin 4 for VDD1 and between Pin 15 and Pin 16 for VDD2.
The capacitor value should be between 0.01 µF and 0.1 µF. The
total lead length between both ends of the capacitor and the
input power supply pin should not exceed 20 mm.
ISOLATION BARRIER
1N5817
V CC
Bypassing between Pin 1 and Pin 8 and between Pin 9 and Pin
16 should also be considered unless the ground pair on each
package side is connected close to the package.
D1
D2
GND1
VDD1
RxD
RE
RTS
TxD
ADM2485
VDD2
GND2
GND2
B
A
GND2
DE OUT
GND2
+5V
IN
22µF
OUT
ADP667
SET GND SHDN
T1
V CC
1N5817
ISO 5V
100nF
100nF
VDD1 D1 D2
V DD2
ADM2485
Figure 19. Recommended Printed Circuit Board Layout
GND 1
In applications involving high common-mode transients, care
should be taken to ensure that board coupling across the isola­
tion barrier is minimized. Furthermore, the board layout should
be designed such that any coupling that does occur equally
affects all pins on a given component side.
Failure to ensure this could cause voltage differentials between
pins exceeding the device’s absolute maximum ratings, thereby
leading to latch-up or permanent damage.
APPLICATIONS DIAGRAM
The ADM2485 integrates a transformer driver which when
used with an external transformer and LDO generates an
isolated 5V power supply, to be supplied between the VDD2 and
the GND2 pins.
Pins D1 and D2 of the ADM2485 drive a center-tapped
transformer T1, A pair of Schottky diodes and a smoothing
capacitor are used to create a rectified signal from the
secondary winding. The ADP667 linear voltage regulator
provides a regulated 5V power supply to the ADM2485’s busside circuitry (VDD2), as shown in Figure 20.
When the ADM2485 is powered by 3V on the logic side a
1CT:2.2CT transformer T1 is required to step up the 3V to 6V,
so that therefore is enough headroom for the ADP667 LDO to
Rev. PrK | Page 14 of 15
GND 2
Figure 20. Applications Diagram
10µF
Preliminary Technical Data
ADM2485
OUTLINE DIMENSIONS 10.50 (0.4134)
10.10 (0.3976)
9
16
7.60 (0.2992)
7.40 (0.2913)
8
1
1.27 (0.0500)
BSC
0.75 (0.0295)
× 45°
0.25 (0.0098)
2.65 (0.1043)
2.35 (0.0925)
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
10.65 (0.4193)
10.00 (0.3937)
0.51 (0.0201)
0.31 (0.0122)
SEATING
PLANE
8°
0.33 (0.0130) 0°
0.20 (0.0079)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-013AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 21. 16-Lead Wide-Body Small Outline Package [SOIC]
(RW-16) Dimensions shown in millimeters ORDERING GUIDE
Model
ADM2485BRWZ1
ADM2485BRWZ-REEL1
Data Rate (Mbps)
16
16
Temperature Range
−40°C to +85°C
−40°C to +85°C
The addition of an “-RL” suffix designates a 13” (1000 units) tape and reel option.
1
Z = Pb-free part.
© 2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
PR06021-0-3/06(PrK)
Rev. PrK | Page 15 of 15
Package Description
16-Lead Wide Body SOIC
16-Lead Wide Body SOIC
Package Option
RW-16
RW-16