AD ADL5604ACPZ-R7

700 MHz to 2700 MHz
1 W RF Driver Amplifier
ADL5604
14 GND
13 GND
Operation from 700 MHz to 2700 MHz
Gain of 12.2 dB at 2630 MHz
OIP3 of 42.2 dBm at 2630 MHz
P1dB of 29.1 dBm at 2630 MHz
Noise figure of 4.6 dB at 2630 MHz
Single 5 V power supply
Low quiescent current of 318 mA
Internal active biasing
Fast power-down/up time of 50 ns
Easily externally matched
Compact 4 mm × 4 mm LFCSP
ESD rating of ±1 kV (Class 1C)
15 GND
FUNCTIONAL BLOCK DIAGRAM
16 GND
FEATURES
ADL5604
RFIN 1
12 RFOUT
RFIN 2
11 RFOUT
VBIAS 3
10 RFOUT
BIAS
8
GND
9
RFOUT
14
16
08220-001
7
GND
5
GND
6
4
GND
VCC2
Figure 1.
GENERAL DESCRIPTION
The ADL5604 can be quickly powered down or up in 50 ns for
applications requiring TX shutdown, such as TDD systems.
The ADL5604 operates on a single 5 V supply voltage and
draws only 318 mA of supply current.
The driver is fabricated on a GaAs HBT process and operates
from −40°C to +85°C. A fully populated evaluation board is
available.
2140 MHz
1966 MHz
946 MHz
–45
–50
–55
–60
–65
–70
–75
–80
0
2
4
6
8
10
12
18
POUT (dBm)
20
08220-002
For thermal management, the ADL5604 uses an exposed
paddle, and the upper and lower pins of the package are all
grounded, which gives the ADL5604 excellent thermal transfer
characteristics.
–40
ACPR (dBc)
The ADL5604 is a very broadband RF driver amplifier that
operates over the wide frequency range of 700 MHz to 2700
MHz. The ADL5604 is also highly linear and has a very low
power consumption, enabling the driver to be packaged in a
compact 16-lead, 4 mm × 4 mm LFCSP.
Figure 2. ACPR vs. Output Power, 3GPP 3.5 TM1-64
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062−9106, U.S.A.
www.analog.com
Tel: 781.329.4700
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.
ADL5604
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications Information .............................................................. 15
Functional Block Diagram .............................................................. 1
Basic Layout Connections ......................................................... 15
General Description ......................................................................... 1
ADL5604 Match ......................................................................... 16
Revision History ............................................................................... 2
ACPR and EVM ......................................................................... 19
Specifications..................................................................................... 3
Thermal Considerations............................................................ 19
Typical Scattering Parameters..................................................... 5
Absolute Maximum Ratings ............................................................ 7
Soldering Information and Recommended PCB
Land Pattern ................................................................................ 19
ESD Caution .................................................................................. 7
Evaluation Board ............................................................................ 20
Pin Configuration and Function Descriptions ............................. 8
Outline Dimensions ....................................................................... 23
Typical Performance Characteristics ............................................. 9
Ordering Guide .......................................................................... 23
REVISION HISTORY
4/10—Revision 0: Initial Version
Rev. 0 | Page 2 of 24
ADL5604
SPECIFICATIONS
VCC1 1 = 5 V and TA = 25°C, unless otherwise noted.
Table 1.
Parameter
OVERALL FUNCTION
Frequency Range
FREQUENCY = 748 MHz
Gain2
vs. Frequency
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
FREQUENCY = 881 MHz
Gain2
vs. Frequency
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
FREQUENCY = 942 MHz
Gain2
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
ACP
Output Third-Order Intercept
Noise Figure
FREQUENCY = 1960 MHz
Gain2
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
ACP
Output Third-Order Intercept
Noise Figure
FREQUENCY = 2140 MHz
Gain2
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
ACP
Output Third-Order Intercept
Noise Figure
Conditions
Min
Typ
700
±20 MHz
∆f = 1 MHz, POUT = 14 dBm per tone
±13 MHz
∆f = 1 MHz, POUT = 14 dBm per tone
MHz
15.3
0.38
29.1
42.8
8.5
dB
dB
dBm
dBm
dB
20.3
0.35
28.8
42.2
4.5
dB
dB
dBm
dBm
dB
21.3
dB
dB
dB
dB
dBm
dBm
dBm
dB
13.7
14.4
±0.2
±0.7
±0.02
28.8
−57
42.1
3.6
15.2
dB
dB
dB
dB
dBm
dBm
dBm
dB
13.2
14.0
±0.1
±0.6
±0.03
28.6
−60
42.1
3.8
14.9
dB
dB
dB
dB
dBm
dBm
dBm
dB
±30 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
POUT =15 dBm, 3GPP 3.5 TM1-64, freq = 1966 MHz
∆f = 1 MHz, POUT = 14 dBm per tone
Rev. 0 | Page 3 of 24
2700
20.5
±0.1
±0.6
±0.03
28.3
−56
41.2
3.8
POUT =15 dBm, 3GPP 3.5 TM1-64, freq = 946 MHz
∆f = 1 MHz, POUT = 14 dBm per tone
POUT =15 dBm, 3GPP 3.5 TM1-64
∆f = 1 MHz, POUT = 14 dBm per tone
Unit
19.8
±18 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
±30MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
Max
ADL5604
Parameter
FREQUENCY = 2630 MHz
Gain2
vs. Frequency
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
POWER INTERFACE
Supply Voltage
Supply Current
vs. Temperature
POWER DOWN INTERFACE
Turn-On Time
Turn-Off Time
1
2
Conditions
Min
Typ
Max
12.2
4.8
29.1
42.2
4.6
±60 MHz
∆f = 1 MHz, POUT = 14 dBm per tone
Unit
dB
dB
dBm
dBm
dB
Pin RFOUT
4.75
−40°C ≤ TA ≤ +85°C
5
318
±7
50% of control pulse to 50% of RFOUT
50% of control pulse to 50% of RFOUT
50
50
VCC1 is the supply voltage to the ADL5604 through the RFOUT pins.
Guaranteed maximum and minimum specified limits on this parameter are based on 6 sigma calculations.
Rev. 0 | Page 4 of 24
5.25
345
V
mA
mA
nS
nS
ADL5604
TYPICAL SCATTERING PARAMETERS
VCC11 = 5 V and TA = 25°C; the effects of the test fixture have been de-embedded up to the pins of the device.
Table 2.
Frequency
(MHz)
50
100
150
200
250
300
350
400
450
500
550
600
650
700
750
800
850
900
950
1000
1050
1100
1150
1200
1250
1300
1350
1400
1450
1500
1550
1600
1650
1700
1750
1800
1850
1900
1950
2000
2050
2100
2150
2200
2250
2300
2350
S11
Magnitude (dB)
−0.74
−0.67
−0.63
−0.59
−0.56
−0.54
−0.53
−0.52
−0.50
−0.50
−0.49
−0.49
−0.48
−0.49
−0.49
−0.49
−0.50
−0.50
−0.51
−0.51
−0.52
−0.53
−0.54
−0.55
−0.56
−0.57
−0.58
−0.59
−0.59
−0.60
−0.61
−0.63
−0.64
−0.65
−0.67
−0.68
−0.69
−0.70
−0.72
−0.73
−0.75
−0.77
−0.78
−0.80
−0.82
−0.84
−0.86
Angle (°)
−177.7
−179.4
179.6
178.7
177.9
177.0
176.2
175.4
174.7
173.9
173.1
172.4
171.6
170.8
170.0
169.3
168.5
167.8
167.0
166.3
165.6
164.8
164.1
163.3
162.6
161.9
161.2
160.5
159.7
158.9
158.2
157.4
156.7
155.9
155.2
154.4
153.6
152.8
152.1
151.3
150.5
149.7
148.9
148.1
147.3
146.5
145.7
S21
Magnitude (dB)
21.45
19.30
18.18
17.10
16.08
15.12
14.18
13.30
12.51
11.77
11.09
10.46
9.89
9.35
8.85
8.39
7.95
7.55
7.16
6.81
6.47
6.15
5.85
5.57
5.29
5.05
4.80
4.60
4.40
4.21
4.03
3.86
3.70
3.55
3.41
3.29
3.17
3.06
2.96
2.86
2.77
2.70
2.62
2.57
2.52
2.48
2.44
Angle (°)
134.7
134.8
129.6
123.5
117.8
112.6
108.2
104.5
101.2
98.3
95.6
93.2
90.9
88.7
86.7
84.7
82.8
81.0
79.2
77.5
75.8
74.0
72.4
70.8
69.2
67.7
66.1
64.6
63.0
61.4
59.9
58.2
56.7
55.1
53.6
51.9
50.3
48.6
47.0
45.3
43.7
42.0
40.4
38.7
37.0
35.1
33.4
Rev. 0 | Page 5 of 24
S12
Magnitude (dB)
−39.97
−39.81
−39.69
−39.55
−39.47
−39.53
−39.29
−39.05
−39.02
−39.24
−39.27
−38.98
−38.95
−38.90
−38.78
−38.65
−38.58
−38.51
−38.44
−38.34
−38.26
−38.20
−38.14
−38.00
−37.97
−37.87
−37.87
−37.69
−37.55
−37.45
−37.33
−37.20
−37.15
−37.09
−36.97
−36.86
−36.75
−36.65
−36.54
−36.42
−36.30
−36.19
−36.08
−35.95
−35.83
−35.70
−35.58
Angle (°)
10.6
6.4
4.9
4.0
3.2
2.8
3.4
1.6
−1.6
0.3
0.3
0.5
−0.7
−0.5
−1.0
−1.5
−2.3
−2.8
−3.4
−4.1
−4.5
−5.0
−5.6
−6.2
−7.3
−7.3
−8.1
−8.2
−9.4
−10.1
−10.7
−11.9
−12.8
−13.7
−14.3
−15.2
−16.1
−17.0
−18.1
−19.0
−20.1
−21.2
−22.2
−23.3
−24.5
−25.7
−26.9
S22
Magnitude (dB)
−2.71
−2.34
−1.93
−1.61
−1.39
−1.26
−1.19
−1.14
−1.11
−1.09
−1.10
−1.12
−1.11
−1.13
−1.15
−1.18
−1.21
−1.23
−1.27
−1.28
−1.32
−1.35
−1.39
−1.43
−1.47
−1.50
−1.55
−1.57
−1.60
−1.64
−1.68
−1.74
−1.78
−1.82
−1.88
−1.92
−1.97
−2.02
−2.10
−2.17
−2.23
−2.31
−2.40
−2.45
−2.51
−2.61
−2.72
Angle (°)
−153.2
−163.2
−167.2
−170.3
−172.9
−175.3
−177.3
−179.0
179.5
178.0
176.6
175.4
174.2
173.0
172.0
171.0
170.0
169.1
168.2
167.3
166.3
165.4
164.6
163.7
162.8
162.0
161.2
160.4
159.5
158.5
157.7
156.8
156.0
155.1
154.4
153.3
152.3
151.4
150.6
149.5
148.7
147.8
146.8
145.8
144.9
143.9
142.8
ADL5604
Frequency
(MHz)
2400
2450
2500
2550
2600
2650
2700
2750
2800
2850
2900
2950
3000
3050
3100
3150
3200
3250
3300
3350
3400
3450
3500
3550
3600
3650
3700
3750
3800
3850
3900
3950
4000
1
S11
Magnitude (dB)
−0.88
−0.90
−0.92
−0.94
−0.96
−0.99
−1.01
−1.04
−1.07
−1.10
−1.13
−1.16
−1.19
−1.22
−1.25
−1.29
−1.32
−1.36
−1.40
−1.44
−1.47
−1.51
−1.55
−1.59
−1.63
−1.67
−1.71
−1.75
−1.79
−1.82
−1.84
−1.86
−1.88
Angle (°)
144.9
144.1
143.2
142.4
141.6
140.8
139.9
139.1
138.3
137.4
136.6
135.7
134.9
134.1
133.2
132.4
131.5
130.7
129.8
129.0
128.1
127.3
126.4
125.6
124.8
124.0
123.2
122.3
121.5
120.7
119.9
119.1
118.3
S21
Magnitude (dB)
2.40
2.37
2.35
2.33
2.32
2.32
2.32
2.33
2.34
2.36
2.37
2.39
2.42
2.45
2.48
2.52
2.55
2.59
2.63
2.67
2.72
2.76
2.80
2.84
2.89
2.93
2.97
3.01
3.05
3.09
3.13
3.17
3.22
Angle (°)
31.5
29.7
27.8
26.0
24.0
22.1
20.1
18.0
15.9
13.9
11.7
9.5
7.3
5.1
2.8
0.4
−2.0
−4.4
−6.9
−9.4
−12.0
−14.7
−17.3
−20.0
−22.7
−25.5
−28.4
−31.2
−34.1
−37.1
−40.0
−43.0
−46.1
VCC1 is the supply to the ADL5604 through the RFOUT pins.
Rev. 0 | Page 6 of 24
S12
Magnitude (dB)
−35.46
−35.34
−35.21
−35.08
−34.96
−34.83
−34.71
−34.58
−34.45
−34.31
−34.18
−34.05
−33.94
−33.81
−33.69
−33.55
−33.44
−33.32
−33.21
−33.10
−32.98
−32.86
−32.73
−32.61
−32.51
−32.39
−32.28
−32.18
−32.10
−32.02
−31.94
−31.85
−31.79
Angle (°)
−28.4
−29.8
−31.0
−32.5
−34.0
−35.5
−37.2
−38.8
−40.5
−42.2
−44.1
−45.9
−47.9
−49.9
−51.9
−54.0
−56.3
−58.5
−60.8
−63.2
−65.6
−68.0
−70.7
−73.3
−76.1
−79.0
−82.0
−85.1
−88.3
−91.5
−94.8
−98.2
−101.7
S22
Magnitude (dB)
−2.81
−2.91
−3.03
−3.15
−3.26
−3.38
−3.52
−3.66
−3.81
−3.99
−4.16
−4.34
−4.54
−4.75
−4.96
−5.20
−5.45
−5.71
−5.99
−6.29
−6.62
−6.96
−7.31
−7.71
−8.12
−8.57
−9.02
−9.54
−10.09
−10.63
−11.24
−11.86
−12.48
Angle (°)
141.7
140.8
139.7
138.7
137.7
136.7
135.6
134.4
133.3
132.3
131.1
130.1
129.0
127.9
126.9
125.8
124.8
123.8
122.7
121.8
120.9
120.0
119.4
118.8
118.2
117.7
117.5
117.6
117.7
118.4
119.5
120.9
123.2
ADL5604
ABSOLUTE MAXIMUM RATINGS
ESD CAUTION
Table 3.
Parameter
Supply Voltage, VSUP
Input Power (50 Ω Impedance)
Internal Power Dissipation (Paddle Soldered)
θJA (Junction to Air)
θJC (Junction to Paddle)
Maximum Junction Temperature
Lead Temperature (Soldering, 60 sec)
Operating Temperature Range
Storage Temperature Range
Rating
6.5 V
+25 dBm
3.9 W
32.1°C/W
6°C/W
150°C
240°C
−40°C to +85°C
−65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 7 of 24
ADL5604
GND 8
9 RFOUT
NOTES
1. THE PADDLE SHOULD BE CONNECTED TO
BOTH THERMAL AND ELECTRICAL GROUND.
08220-003
14 GND
10 RFOUT
GND 7
11 RFOUT
TOP VIEW
(Not to Scale)
GND 5
VCC2 4
12 RFOUT
ADL5604
GND 6
VBIAS 3
13 GND
16 GND
PIN 1
INDICATOR
RFIN 1
RFIN 2
15 GND
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1, 2
5, 6, 7, 8, 13,14, 15, 16
3
Mnemonic
RFIN
GND
VBIAS
4
VCC2
9, 10, 11, 12
RFOUT
EP
Description
RF Input. Requires a dc blocking capacitor.
Solder to a low impedance electrical and thermal ground plane.
Dual Function Pin. Applying 5 V to this pin enables the bias circuit. Grounding this pin disables the
device. When VBIAS is used alone to disable the ADL5604, the disable current is 13 mA.
Under normal operation, this pin is connected to the power supply and draws approximately 5 mA
of current. This pin can be grounded with the VBIAS pin to allow a disable current of <1 uA.
RF Output and Main Supply Voltage. DC bias is provided to this pin through an inductor that is
connected to the 5 V power supply. The RF path requires a dc blocking capacitor.
The exposed paddle is connected internally to ground. Solder to a low impedance electrical and
thermal ground plane.
Rev. 0 | Page 8 of 24
ADL5604
TYPICAL PERFORMANCE CHARACTERISTICS
45
33
44
32
43
OIP3 (dBm)
35
P1dB (dBm)
25
GAIN (dB)
20
42
+25°C
–40°C
30
41
+85°C
29
40
+25°C
–40°C
OIP3 (dBm)
31
P1dB (dBm)
30
15
28
39
+85°C
10
0.930
0.935
0.940
0.945
0.950
0.955
0.960
FREQUENCY (GHz)
26
0.925
0.930
0.935
0.940
0.945
0.950
0.955
37
0.960
08220-007
0
0.925
38
27
NF (dB)
5
08220-004
NF, GAIN, P1dB, OIP3 (dB, dBm)
40
FREQUENCY (GHz)
Figure 7. OIP3 at POUT =14 dBm/Tone and P1dB vs. Frequency
and Temperature
Figure 4. Gain, P1dB, OIP3 at POUT =14 dBm/Tone and
Noise Figure vs. Frequency
24
43
23
42
0.960GHz
0.942GHz
22
41
0.925GHz
GAIN (dB)
OIP3 (dBm)
–40°C
21
+25°C
+85°C
20
40
39
19
38
18
0.935
0.940
0.945
0.950
0.955
0.960
FREQUENCY (GHz)
36
–10 –8
–6
–4
–2
0
2
4
6
10
8
12
14
16
18
08220-008
0.930
08220-005
16
0.925
0.960
08220-009
37
17
POUT PER TONE (dBm)
Figure 5. Gain vs. Frequency and Temperature
Figure 8. OIP3 vs. POUT and Frequency
6
0
–5
S11
NOISE FIGURE (dB)
S-PARAMETERS (dB)
5
S22
–10
–15
–20
+85°C
4
+25°C
–40°C
3
–30
0.930
0.935
0.940
0.945
0.950
FREQUENCY (GHz)
0.955
0.960
0.965
08220-006
S12
–25
Figure 6. Input Return Loss (S11), Output Return Loss (S22), and Reverse
Isolation (S12) vs. Frequency
Rev. 0 | Page 9 of 24
2
0.925
0.930
0.935
0.940
0.945
0.950
0.955
FREQUENCY (GHz)
Figure 9. Noise Figure vs. Frequency and Temperature
ADL5604
45
33
OIP3 (dBm)
+25°C
32
43
–40°C
35
31
P1dB (dBm)
+85°C
25
20
30
41
–40°C
29
GAIN (dB)
15
+85°C
+25°C
28
40
OIP3 (dBm)
42
P1dB (dBm)
30
39
10
27
0
1.93
1.94
1.95
1.96
1.97
1.98
1.99
FREQUENCY (GHz)
38
26
1.93
1.94
1.95
1.96
1.97
37
1.99
1.98
08220-013
NF (dB)
5
08220-010
NF, GAIN, P1dB, OIP3 (dB, dBm)
40
44
FREQUENCY (GHz)
Figure 13. OIP3 at POUT =14 dBm/Tone and P1dB vs. Frequency
and Temperature
Figure 10. Gain, P1dB, OIP3 at POUT =14 dBm/Tone and
Noise Figure vs. Frequency
18
44
17
43
1.96GHz
1.99GHz
1.93GHz
16
42
–40°C
OIP3 (dBm)
GAIN (dB)
15
+25°C
14
+85°C
41
40
13
39
12
1.95
1.96
1.97
1.98
1.99
FREQUENCY (GHz)
37
–10 –8
–6
–4
–2
0
2
4
6
8
10
12
14
16
18
08220-014
1.94
08220-011
10
1.93
1.99
08220-015
38
11
POUT PER TONE (dBm)
Figure 11. Gain vs. Frequency and Temperature
Figure 14. OIP3 vs. POUT and Frequency
6
0
–5
5
NOISE FIGURE (dB)
S-PARAMETERS (dB)
S11
–10
S22
–15
–20
+85°C
4
+25°C
–40°C
3
–30
1.93
1.94
1.95
1.96
1.97
FREQUENCY (GHz)
1.98
1.99
08220-012
S12
–25
Figure 12. Input Return Loss (S11), Output Return Loss (S22), and Reverse
Isolation (S12) vs. Frequency
Rev. 0 | Page 10 of 24
2
1.93
1.94
1.95
1.96
1.97
1.98
FREQUENCY (GHz)
Figure 15. Noise Figure vs. Frequency and Temperature
ADL5604
50
OIP3 (dBm)
43
32
40
–40°C
+25°C
31
35
25
20
30
+25°C
29
GAIN (dB)
15
41
–40°C
40
+85°C
28
OIP3 (dBm)
P1dB (dBm)
P1dB (dBm)
30
42
+85°C
39
10
2.13
2.14
2.15
2.16
2.17
FREQUENCY (GHz)
26
2.11
2.13
2.14
2.15
37
2.17
2.16
FREQUENCY (GHz)
Figure 16. Gain, P1dB, OIP3 at POUT =14 dBm/Tone and
Noise Figure vs. Frequency
Figure 19. OIP3 at POUT =14 dBm/Tone and P1dB vs. Frequency
and Temperature
45
18
17
16
OIP3 (dBm)
–40°C
15
+25°C
14
+85°C
13
44
2.17 GHz
43
2.14 GHz
42
2.11 GHz
41
40
39
12
38
11
37
2.12
2.13
2.14
2.15
2.16
2.17
FREQUENCY (GHz)
36
–10 –8
08220-017
10
2.11
2.12
08220-019
2.12
–6
–4
–2
0
2
4
6
8
10
12
14
16
18
POUT PER TONE (dBm)
08220-020
0
2.11
38
27
NF (dB)
5
08220-016
NF, GAIN, P1dB, OIP3 (dB, dBm)
45
GAIN (dB)
44
33
Figure 20. OIP3 vs. POUT and Frequency
Figure 17. Gain vs. Frequency and Temperature
0
6
–5
5
NOISE FIGURE (dB)
S-PARAMETERS (dB)
S11
–10
S22
–15
–20
+85°C
+25°C
4
–40°C
3
S12
2.12
2.13
2.14
2.15
FREQUENCY (GHz)
2.16
2.17
Figure 18. Input Return Loss (S11), Output Return Loss (S22), and Reverse
Isolation (S12) vs. Frequency
Rev. 0 | Page 11 of 24
2
2.11
2.12
2.13
2.14
2.15
2.16
FREQUENCY (GHz)
Figure 21. Noise Figure vs. Frequency and Temperature
2.17
08220-021
–30
2.11
08220-018
–25
ADL5604
25
50
45
40
PERCENTAGE (%)
PERCENTAGE (%)
20
15
10
5
35
30
25
20
15
10
5
41.9
42.0
42.1
42.3
42.4
0
OIP3 (dBm)
3.5
3.6
3.7
3.8
3.9
4.0
4.1
4.2
08220-025
41.8
08220-022
0
4.3
NOISE FIGURE (dB)
Figure 25. Noise Figure Distribution at 2140 MHz
Figure 22. OIP3 Distribution at 2140 MHz
–40
30
–45
–50
–55
20
946MHz
ACPR (dBc)
PERCENTAGE (%)
25
15
10
–60
–65
–70
–75
SYSTEM
–80
5
–85
28.5
28.6
28.7
28.8
28.9
–90
P1dB (dBm)
4
8
10
12
14
16
18
20
20
POUT (dBm)
Figure 26. ACPR vs. POUT, 3GPP 3.5 TM1-64 at 946 MHz
Figure 23. P1dB Distribution at 2140 MHz
35
–40
30
–45
–50
25
ACPR (dBc)
1966 MHz
20
15
–60
–65
–70
5
14.6
–80
08220-024
GAIN (dB)
14.5
14.4
14.3
14.2
14.1
14.0
13.9
13.8
–75
13.7
0
–55
SYSTEM
10
13.6
PERCENTAGE (%)
6
08220-026
28.4
08220-027
28.3
08220-023
0
0
2
4
6
8
10
12
14
16
18
POUT (dBm)
Figure 27. ACPR vs. POUT, 3GPP 3.5 TM1-64 at 1966 MHz
Figure 24. Gain Distribution at 2140 MHz
Rev. 0 | Page 12 of 24
ADL5604
9
–40
–45
8
–50
–55
EVM (%)
ACPR (dBc)
2140MHz
–60
7
–65
2140MHz
SYSTEM
6
–70
–75
2
4
6
8
10
12
14
16
18
20
POUT (dBm)
08220-028
0
0
5
10
15
20
25
30
POUT (dBm)
Figure 28. ACPR vs. POUT, 3GPP 3.5 TM1-64 at 2140 MHz
Figure 31. EVM vs. POUT at 2140 MHz
15
500
450
14
400
SUPPLY CURRENT (mA)
13
EVM (%)
–5
08220-031
5
–10
–80
12
946MHz
11
5.25V
350
5V
300
4.75V
250
200
10
–5
0
5
10
15
20
25
30
POUT (dBm)
100
–40 –30 –20 –10
08220-029
9
–10
Figure 29. EVM vs. Pout at 946 MHz
0
10
20
30
40
50
60
70
08220-032
150
80
TEMPERATURE (°C)
Figure 32. Supply Current vs. Supply Voltage and Temperature
at 2140 MHz
9
1966MHz
1
2
7
5
–10
–5
0
5
10
15
20
POUT (dBm)
25
30
Figure 30. EVM vs. POUT at1966 MHz
CH1 50mV Ω DS CH2 500mV Ω M10ns 10GS/s A CH2
IT 40ps/pt 25.5ns
960mV
08220-033
6
08220-030
EVM (%)
8
Figure 33. Turn-Off Time, 50% of Control Pulse to 50% of RF Burst
Rev. 0 | Page 13 of 24
ADL5604
CH1 50mV Ω DS CH2 500mV Ω M10ns 10GS/s A CH2
IT 40ps/pt 25.5ns
960mV
08220-034
1
2
Figure 34. Turn -On Time, 50% of Control Pulse to 50% of RF Burst
Rev. 0 | Page 14 of 24
ADL5604
APPLICATIONS INFORMATION
BASIC LAYOUT CONNECTIONS
The basic connections for operating the ADL5604 are shown in Figure 35.
16
RFIN
C3
1.3pF
C1
0Ω
15
14
13
GND GND GND GND
C4
2.7pF
1
RFIN
RFOUT 12
2
RFIN
RFOUT 11
C5
2.4pF
ADL5604
C11
10nF
C9
10nF
3
VBIAS
RFOUT 10
4
VCC2
RFOUT 9
C2
22pF
RFOUT
L1
16nH
GND GND GND GND
C12
0.1µF
5
6
7
R9
0Ω
8
C10
0.1µF
R6
0Ω
R8
0Ω
VBIAS
L2
OPEN
R10
0Ω
C6
10nF
VCC2
C7
0.1µF
R2
0Ω
C8
10µF
R5
0Ω
VCC1
GND1
NOTE 1
GND2
GND3
R4 OPEN
–VS
C15
0.1µF
R1
301Ω
R3
OPEN
U2
C14
0.1µF
AD8009
VBIAS
NOTES
1. THE COMPONENTS CONTAINED INSIDE THE DASHED BOX ARE ONLY REQUIRED IF IT IS
DESIRED TO POWER DOWN THE ADL5604.
08220-035
+VS
Figure 35. Basic Connections
Power Supply
The voltage supply for the ADL5604, which ranges from 4.75 V
to 5.25 V, should be connected to the VCC1 pin. The dc bias to
the output stage is supplied through L1 and is connected to the
RFOUT pin. Three decoupling capacitors, C6, C7, and C8, are
used to prevent RF signals from propagating on the dc lines. The
VBIAS and VCC2 pins are connected to the main supply voltage,
VCC1, through the R2 and R5 resistors. Additional decoupling
capacitors, C9, C10, C11, and C12, are required on the VCC2
and VBIAS pins.
RF Input Interface
Pin 1 and Pin 2 are the RF input pins for ADL5604. The RF
input is easily matched with two or three components and a
microstrip line used as an inductor. If additional inductance is
required, C3 can be replaced with an inductor. See the ADL5604
Match section for the component values and spacing for the
different frequency bands.
RF Output Interface
Pin 9 to Pin 12 are used as the RF output pins. The C5 shunt
capacitor and the inductance from the microstrip line match RF
output to 50 Ω. See the ADL5604 Match section for the component values and spacing for the different frequency bands.
Power-Down Circuit
Device U2 and its associated circuitry can be used to power
down the ADL5604. To connect U2, remove the R2 resistor and
place a 0 Ω resistor in place of R4.
Rev. 0 | Page 15 of 24
ADL5604
ADL5604 MATCH
to the chip, where the impedance is lowest, while allowing a low
inductance path to a shunt capacitor to ground. This extra
length allows for alternative matching but is also included in the
output match at all frequencies. Table 5 and Table 6 detail the
component spacing and values for the input and output
matching networks for the ADL5604 for the different
frequencies. Figure 36 through Figure 41 show the matching
networks.
The ADL5604 is easily matched with three matching components
and a microstrip line used as inductance. If spacing is tight, an
external inductor can take the place of the microstrip line. The
output match includes a short (76 mils, including the portion
that is used as the pad for the chip) non 50 Ω line to accommodate the four output pins and allow for easier low inductance
output matching. The pads for Pin 9 to Pin 12 are included on
this microstrip line, as well as the pad for the L1 bias inductor.
The extended length allows the bias inductor to be placed close
Table 5. Component Spacing
Frequency
748 MHz
880 MHz
943 MHz
1960 MHz
2140 MHz
2630 MHz
λ1 (mils)
67
75
N/A
35
45
55
λ2 (mils)
348
138
118
N/A
182
182
λ3 (mils)
41
41
41
41
41
41
λ4 (mils)
272
181
220
232
197
126
λ5 (mils)
106
154
95
N/A
N/A
N/A
Table 6. Component Values
Frequency
748 MHz
880 MHz
943 MHz
1960 MHz
2140 MHz
2630 MHz
C1 (pF)
100 pF
100 pF
100 pF
22 pF
0Ω
22 pF
C2 (pF)
100 pF
100 pF
100 pF
22 pF
22 pF
22 pF
C3 (pF)
10.0 pF
N/A
12.0 pF
0Ω
1.3 pF
N/A
R1
5.1Ω
λ1
C3
10pF
C4
20pF
λ2
C5 (pF)
7.0 pF
6.0 pF
6.2 pF
2.2 pF
2.4 pF
1.8 pF
16
15
14
13
GND
GND
GND
GND
1
RFIN
RFOUT 12
2
RFIN
RFOUT 11
ADL5604
RFOUT 10
RFOUT
9
L1 (nH)
16 nH
16 nH
16 nH
16 nH
16 nH
16 nH
L2 (nH)
N/A
N/A
N/A
N/A
N/A
4.3 nH
C5
7pF
λ4
λ5
λ3
LOUT
2.7nH
Lout (nH)
2.7 nH
3.6 nH
3.0 nH
N/A
N/A
N/A
RFOUT
C2
100pF
L1
16nH
08220-037
RFIN
C1
100pF
C4 (pF)
20.0 pF
9.0 pF
N/A
4.3 pF
2.7 pF
2.2 pF
Figure 36. ADL5604 Match Parameters, 748 MHz
Rev. 0 | Page 16 of 24
ADL5604
RFIN
C4
9pF
C1
100pF
λ1
16
15
14
13
GND
GND
GND
GND
1
RFIN
RFOUT 12
2
RFIN
RFOUT 11
λ2
L2
2.4nH
ADL5604
λ5
RFOUT 10
LOUT
3.6nH
C2
100pF
L1
16nH
λ3
9
RFOUT
08220-038
RFOUT
C5
6pF
λ4
Figure 37. ADL5604 Match Parameters, 880 MHz
C1
100pF
C3
12 pF
16
15
14
13
GND
GND
GND
GND
1
RFIN
RFOUT 12
2
RFIN
RFOUT 11
λ2
ADL5604
λ5
RFOUT 10
C2
100pF
L1
16nH
λ3
9
LOUT
3nH
RFOUT
08220-039
RFOUT
C5
6.2pF
λ4
Figure 38. ADL5604 Match Parameters, 943 MHz
RFIN
C1
22pF
C3
0Ω
C4
4.3pF
λ1
16
15
14
13
GND
GND
GND
GND
1
RFIN
RFOUT 12
2
RFIN
RFOUT 11
ADL5604
C5
2.2pF
λ4
C2
22pF
RFOUT 10
RFOUT
9
RFOUT
λ3
L1
16nH
08220-040
RFIN
Figure 39. ADL5604 Match Parameters, 1960 MHz
Rev. 0 | Page 17 of 24
ADL5604
RFIN
C1
0Ω
C3
1.3pF
C4
2.7pF
λ1
1
RFIN
2
RFIN
16
15
14
13
GND
GND
GND
GND
RFOUT 12
λ2
RFOUT 11
C5
2.4pF
λ4
ADL5604
C2
22pF
RFOUT 10
9
L1
16nH
λ3
08220-041
RFOUT
RFOUT
Figure 40. ADL5604 Match Parameters, 2140 MHz
C1
22pF
LIN
4.3nH
C4
2.2pF
λ1
λ2
16
15
14
13
GND
GND
GND
GND
1
RFIN
RFOUT 12
2
RFIN
RFOUT 11
ADL5604
C5
1.8pF
λ4
C2
22pF
RFOUT 10
RFOUT
9
RFOUT
λ3
L1
16nH
08220-042
RFIN
Figure 41. ADL5604 Match Parameters, 2630 MHz
Rev. 0 | Page 18 of 24
ADL5604
ACPR AND EVM
All adjacent channel power ratio (ACPR) and error vector
magnitude (EVM) measurements were made using a single
W-CDMA carrier. For ACPR measurements, Test Model 1-64
was used, and for EVM measurements, Test Model 4 was used.
The signal is generated by a very low ACPR source and is
measured at the output by a high dynamic range spectrum
analyzer. The spectrum analyzer incorporates an instrument
noise correction function. Highly linear amplifiers were used to
boost the power levels
Figure 26 shows the plot of ACPR vs. POUT at 946 MHz. Shown
on the same plot is the system ACPR. For power levels up to
11 dBm, an ACPR of 65 dBc or better can be achieved.
Figure 27 shows the ACPR vs. POUT at 1966 MHz. Shown on
the same plot is the system ACPR. For power levels up to
11 dBm, an ACPR of 65 dBc or better can be achieved.
Figure 28 shows ACPR vs. POUT at 2140 MHz. Shown on the
same plot is the system ACPR. For power levels up to 12 dBm,
an ACPR of 65 dBc or better can be achieved. Figure 29 shows
the plot of EVM vs. POUT at 946 MHz. The EVM measured is
11.2% for power levels up to 22 dBm.
minimum of nine thermal vias arranged in a 3 × 3 array with a
diameter of 8 mils and a pitch of 16 mils. Because the top and
bottom leads of the package are ground, the ground pattern on
the evaluation board is extended on the top and bottom to
improve thermal efficiency (see the Evaluation Board section).
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 42 shows the recommended land pattern for the ADL5604.
To minimize thermal impedance, the exposed paddle on the
4 mm × 4 mm LFCSP package is soldered down to a ground
plane along with Pin 5 to Pin 8 and Pin 13 to Pin 16. To
improve thermal dissipation, nine thermal vias are arranged in
a 3 × 3 array under the exposed paddle. Areas above and below
the paddle are tied with regular vias. If multiple ground layers
exist, they should be tied together using vias. For more information on land pattern design and layout, see the AN-772
Application Note, A Design and Manufacturing Guide for the
Lead Frame Chip Scale Package (LFCSP).
Figure 30 shows the EVM vs. POUT at 1966 MHz. The EVM
measured is 7.9% for power levels up to 24 dBm. Figure 31
shows the EVM vs. POUT at 2140 MHz. The EVM measured is
6.1% for power levels up to 22 dBm.
THERMAL CONSIDERATIONS
16
13
RFIN
For the best thermal performance, it is recommended to add as
many thermal vias as possible under the exposed pad of the
LFCSP. The above thermal resistance numbers assume a
Rev. 0 | Page 19 of 24
RFOUT
8 MIL
FILLED VIAs
THERMAL VIAS
5
8
16 MIL
FILLED VIAs
08220-043
The ADL5604 is packaged in a thermally efficient 4 mm × 4 mm,
16-lead LFCSP. The thermal resistance from junction to air (θJA)
is 32.1oC/W. The thermal resistance for the product was
extracted assuming a standard 4-layer JEDEC board with nine
copper filled thermal vias. The thermal resistance from junction
to case (θJC) is 6oC/W where case is the exposed pad of the lead
frame package.
Figure 42. Recommended Land Pattern
ADL5604
EVALUATION BOARD
and are included in all matches. Figure 46 shows the close-up
image of the recommended output pad. The evaluation board
also has hash marks close to the input and output of the
ADL5604, separated by 40 mils. The hash mark closest to the
input is 127 mils from the chip, and the hash mark closest to the
output is 20 mils from the chip.
The schematic of the ADL5604 evaluation board is shown in
Figure 43. This evaluation board uses 25 mils wide, 50 Ω traces
and is made from IS410 material, with a 23mils gap to ground.
The evaluation board is tuned for operation at 2140 MHz. The
inputs and outputs should be ac-coupled with appropriately
sized capacitors; therefore, for low frequency applications, C1
and C2 may need to be increased. DC bias is provided to the
output stage via an inductor connected to the RFOUT pin. A
bias voltage of 5 V is recommended. The evaluation board has a
short non 50 Ω line on its output to accommodate the four
output pins and allow for easier low inductance output matching.
The pads for Pin 9 to Pin 12 are included on this microstrip line
RFIN
16
C3
1.3pF
C1
0Ω
U2 and its associated circuitry are required only if it is desired
to power down the ADL5604. On the evaluation board, it is
necessary to remove R2 and install a 0 Ω resistor in the R4
position to enable this feature.
15
14
13
GND GND GND GND
C4
2.7pF
1
RFIN
2
RFIN
RFOUT 12
C5
2.4pF
RFOUT 11
ADL5604
C11
10nF
C9
10nF
3
VBIAS
RFOUT 10
4
VCC2
RFOUT 9
C2
22pF
RFOUT
L1
16nH
GND GND GND GND
C12
0.1µF
5
6
7
R9
0Ω
8
C10
0.1µF
R6
0Ω
R8
0Ω
VBIAS
L2
OPEN
R10
0Ω
C6
10nF
VCC2
C7
0.1µF
R2
0Ω
C8
10µF
R5
0Ω
VCC1
GND1
NOTE 1
GND2
GND3
R4 OPEN
–VS
C15
0.1µF
R1
301Ω
R3
OPEN
U2
C14
0.1µF
AD8009
VBIAS
NOTES
1. THE COMPONENTS CONTAINED INSIDE THE DASHED BOX ARE ONLY REQUIRED IF IT IS
DESIRED TO POWER DOWN THE ADL5604.
Figure 43. Evaluation Board, 2140 MHz
Rev. 0 | Page 20 of 24
08220-044
+VS
ADL5604
Table 7. Evaluation Board Configuration Options, 2140 MHz
C3, C4
C5
L1, L2, R9, R10
C6, C7, C8, C9,
C10, C11, C12,
C14, C15
R6, R8
R2, R4, R5
U2, R1, R3
Default Value
C1 = 0 Ω,
C2 = 22 pF
C3 = 1.3 pF HQ,
C4 = 2.7 pF HQ
C5 = 2.4 pF
L1 = 16 nH,
L2 = open,
R9 = 0 Ω,
R10 = 0 Ω
C6, C9, C11 = 10nF,
C7, C10, C12, C14,
C15 = 0.1uF,
C8 = 10 uF
R6 = 0 Ω,
R8 = 0 Ω
R2, R5 = 0 Ω,
R4 = open
U2 = AD8009,
R1 = 3.01 Ω,
R3 = open
The paddle should be connected to both thermal and electrical ground.
08220-045
Exposed Paddle
Function/Notes
Input/output dc blocking capacitors at 2140 MHz. C3 provides dc blocking; therefore, a jumper is
installed in place of C1.
Input matching capacitors. The input match is set for 2140 MHz but is easily changed for other
frequencies. C3 is set at a specific distance from C4 so that the microstrip line can act as inductance for
part of the match. If space is at a premium, an inductor can take the place of the microstrip line. The
ADL5604 is sensitive to the input match; therefore, the tolerance of these components and their
placement must be tight.
Output matching capacitor. The output match is set for 2140 MHz but is easily changed for other
frequencies. The tolerance for this capacitor should be tight. C5 is set at a specific distance from the
input; therefore, the microstrip line can act as inductance for part of the match. If space is at a
premium, an inductor can take the place of the microstrip line. There is a short length of low
impedance line on the output that is embedded in the match. The ADL5604 is less sensitive to the
output match than the input match, but the tolerance still must be tight.
The main bias for the ADL5604 comes through L1 to its output. L1 should be high impedance for
the frequency of operation, while providing low resistance for the dc current. The evaluation
board uses a Coilcraft 0603HP-16NX_H inductor. It is a 16 nH inductor, which provides some of
the match at 2140 MHz. As the operating frequency gets lower, the inductance must increase,
but as the inductance increases, the current is more limited for a 0603 package. R9 and R10 can
be removed and L2 added to allow for low frequency operation. L2 has the footprint for a
Coilcraft SLC7530D-101MLB (0.4 μH).
Power supply decoupling. The need for power supply decoupling capacitance is based on the
noise and potential for noise on the power supply. The smallest capacitor should be the closest
to the ADL5604. The main bias that goes through RFOUT is the most sensitive to noise because
the bias is connected directly to the output.
R6 and R8 can be removed to eliminate any parasitic elements of VBIAS and VCC2 if a fast
response time is required.
The ADL5604 can be shut down using VBIAS alone or VBIAS and VCC2. The ADL5604 has a
shutdown current of 13 mA when only VBIAS is used. The shutdown current is < 1 μA if VBIAS and
VCC2 are used. However, VCC2 draws 5 mA when biased, setting the current drive capability of
the shutdown controller. R2, R4, and R5 allow custom configuration of the shutdown.
If VCC2 is used to shut down the ADL5604, 5 mA must be sourced when the part is enabled. U2,
R1, and R3 are configured as a buffer to source the 5 mA.
08220-046
Component
C1, C2
Figure 45. Evaluation Board Layout, Bottom Side
Figure 44. Evaluation Board Layout, Topside
Rev. 0 | Page 21 of 24
ADL5604
33 MILS
76 MILS
24 MILS
08220-036
90 MILS
Figure 46. Evaluation Board Layout, Output Pad
Rev. 0 | Page 22 of 24
ADL5604
OUTLINE DIMENSIONS
4.00
BSC SQ
0.60 MAX
0.60 MAX
12° MAX
1.00
0.85
0.80
0.65 BSC
TOP
VIEW
3.75
BSC SQ
0.75
0.60
0.50
0.80 MAX
0.65 TYP
SEATING
PLANE
PIN 1
INDICATOR
1
2.25
2.10 SQ
1.95
9
8
5
4
0.25 MIN
1.95 BSC
0.05 MAX
0.02 NOM
0.35
0.30
0.25
16
13
12
0.20 REF
COPLANARITY
0.08
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC
072808-A
PIN 1
INDICATOR
(BOTTOM VIEW)
Figure 47. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
4 mm × 4 mm Body, Very Thin Quad
(CP-16-4)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
ADL5604ACPZ-R7
ADL5604-EVALZ
1
Temperature Range
−40°C to +85°C
Package Description
16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
Evaluation Board
Z = RoHS Compliant Part.
Rev. 0 | Page 23 of 24
Package Option
CP-16-4
ADL5604
NOTES
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08220-0-4/10(0)
Rev. 0 | Page 24 of 24