INTEGRATED CIRCUITS DATA SHEET 74HC1GU04 Inverter Product specification File under Integrated Circuits, IC06 1998 Nov 18 Philips Semiconductors Product specification Inverter 74HC1GU04 FEATURES QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6.0 ns. • Wide operating voltage: 2.0 to 6.0 V SYMBOL • Symmetrical output impedance PARAMETER tPHL/tPLH propagation delay inA to outY • Balanced propagation delays CI input capacitance • Very small 5-pin package CPD power dissipation capacitance • Low power dissipation • Output capability: standard. CONDITIONS TYP. CL = 15 pF; VCC = 5 V 5 ns 5 pF notes 1 and 2 14 pF Notes DESCRIPTION The 74HC1GU04 is a high-speed Si-gate CMOS device. The 74HC1GU04 provides the inverting single stage function. The standard output currents are 1⁄2 compared to the 74HCU04. 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; ∑ (CL × VCC2 × fo) = sum of outputs. FUNCTION TABLE See note 1. 2. For HC1G the condition is VI = GND to VCC. INPUT inA OUTPUT outY L H PIN H L 1 n.c. not connected 2 inA data input 3 GND ground (0 V) 4 outY data output 5 VCC DC supply voltage Note 1. H = HIGH voltage level; L = LOW voltage level. 1998 Nov 18 UNIT PINNING SYMBOL 2 DESCRIPTION Philips Semiconductors Product specification Inverter 74HC1GU04 ORDERING INFORMATION PACKAGES OUTSIDE NORTH AMERICA 74HC1GU04GW TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE MARKING −40 to +125 °C 5 SC-88A plastic SOT353 HD handbook, halfpage n.c. 1 inA 2 GND 5 VCC U04 3 handbook, halfpage 4 2 outY inA MNA042 2 1 Fig.2 Logic symbol. handbook, halfpage 4 MNA044 inA outY MNA045 Fig.3 IEC logic symbol. 1998 Nov 18 4 MNA043 Fig.1 Pin configuration. handbook, halfpage outY Fig.4 Logic diagram. 3 Philips Semiconductors Product specification Inverter 74HC1GU04 RECOMMENDED OPERATING CONDITIONS 74HC1G SYMBOL PARAMETER CONDITIONS UNIT MIN. TYP. MAX. VCC DC supply voltage 2.0 5.0 6.0 V VI input voltage 0 − VCC V VO output voltage 0 − VCC V Tamb operating ambient temperature range −40 +25 +125 °C tr, tf input rise and fall times except VCC = 2.0 V for Schmitt-trigger inputs VCC = 4.5 V − − 1000 ns − − 500 ns VCC = 6.0 V − − 400 ns see DC and AC characteristics per device LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL VCC PARAMETER CONDITIONS MIN. −0.5 DC supply voltage MAX. +7.0 UNIT V ±IIK DC input diode VI < −0.5 or VI > VCC + 0.5 V − 20 mA ±IOK DC output diode current(1) VO < −0.5 or VO > VCC + 0.5 V − 20 mA ±IO DC output source or sink current standard outputs(1) −0.5 V < VO < VCC + 0.5 V − 12.5 mA ±ICC DC VCC or GND current for types with standard outputs(1) − 25 mA Tstg storage temperature range −65 +150 °C PD power dissipation per for temperature range: −40 to +125 °C; package 5 pins plastic SC-88A above +55 °C PD derates linearly with 2.5 mW/K − 200 mW current(1) Note 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Nov 18 4 Philips Semiconductors Product specification Inverter 74HC1GU04 DC CHARACTERISTICS FOR THE 74HC1GU04 Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL VIL VOH VOH VOL −40 to +85 PARAMETER OTHER VIH Tamb (°C) HIGH-level input voltage LOW-level input voltage HIGH-level output voltage; all outputs HIGH-level output voltage; standard outputs LOW-level output voltage; all outputs VCC (V) MIN. TYP.(1) −40 to +125 MAX. MIN. UNIT MAX. 2.0 1.7 1.4 − 1.7 − V 4.5 3.6 2.6 − 3.6 − V 6.0 4.8 3.4 − 4.8 − V 2.0 − 0.6 0.3 − 0.3 V 4.5 − 1.9 0.9 − 0.9 V 6.0 − 2.6 1.2 − 1.2 V 2.0 1.8 2.0 − 1.8 − V 4.5 4.0 4.5 − 4.0 − V 6.0 5.5 6.0 − 5.5 − V VI = VIH or VIL, −IO = 2.0 mA 4.5 4.13 4.32 − 3.7 − V VI = VIH or VIL, −IO = 2.6 mA 6.0 5.63 5.81 − 5.2 − V VI = VIH or VIL, IO = 20 µA 2.0 − 0 0.2 − 0.2 V 4.5 − 0 0.5 − 0.5 V 6.0 − 0 0.5 − 0.5 V VI = VIH or VIL, −IO = 20 µA LOW-level output voltage; standard outputs VI = VIH or VIL, IO = 2.0 mA 4.5 − 0.15 0.33 − 0.4 V VI = VIH or VIL, IO = 2.6 mA 6.0 − 0.16 0.33 − 0.4 V II input leakage current VI = VCC or GND 6.0 − − 1.0 − 1.0 µA ICC quiescent supply current VI = VCC or GND, 6.0 IO = 0 − − 10 − 20 µA VOL Note 1. All typical values are measured at Tamb = 25 °C. 1998 Nov 18 5 Philips Semiconductors Product specification Inverter 74HC1GU04 AC CHARACTERISTICS GND = 0 V; tr = tf = 6.0 ns; CL = 50 pF. Tamb (°C) TEST CONDITIONS SYMBOL WAVEFORMS tPHL/tPLH −40 to +85 PARAMETER propagation delay inA to outY see Figs 5 and 6 VCC (V) MIN. TYP.(1) −40 to +125 MAX. MIN. UNIT MAX. 2.0 − 10 90 − 105 ns 4.5 − 7 18 − 21 ns 6.0 − 6 15 − 18 ns Note 1. All typical values are measured at Tamb = 25 °C. AC WAVEFORMS handbook, halfpage inA INPUT PULSE GENERATOR tPHL outY OUTPUT VCC handbook, halfpage VM(1) tPLH VI VO D.U.T. RT CL 50 pF MNA034 VM(1) MNA046 Definitions for test circuit: CL = Load capacitance including jig and probe capacitance. (See “AC characteristics” for values). RT = Termination resistance should be equal to the output impedance ZO of the pulse generator. (1) HC1G VM = 50%; VI = GND to VCC. Fig.5 The input (inA) to output (outY) propagation delays. 1998 Nov 18 Fig.6 Load circuitry for switching times. 6 Philips Semiconductors Product specification Inverter 74HC1GU04 TYPICAL TRANSFER CHARACTERISTICS MNA047 1 handbook, halfpage 2 VO (V) ICC (mA) 0.5 0 0 1 VI (V) MNA048 10 handbook, halfpage VO (V) ICC (mA) 1 5 0 0 2 2.5 0 0 2.5 Fig.7 VCC = 2.0 V; IO = 0. 5 VI (V) Fig.8 VCC = 4.5 V; IO = 0. MNA049 20 5 handbook, halfpage 6 handbook, halfpage VO (V) ICC (mA) 10 Rbias = 560 kΩ VCC 0.47 µF 3 VI (f = 1 kHz) input output 100 µF A IO GND MNA050 0 0 0 3 VI (V) 6 Fig.10 Test set-up for measuring forward transconductance gfs = ∆IO/∆VI at VO is constant. Fig.9 VCC = 6.0 V; IO = 0. 1998 Nov 18 7 Philips Semiconductors Product specification Inverter 74HC1GU04 APPLICATION INFORMATION Note to the application information. Some applications for the HC1GU04 are: All values given are typical unless otherwise specified. • Linear amplifier (see Fig.11) • In crystal oscillator design (see Fig.12). R2 handbook, halfpage VCC 1 µF R1 handbook, halfpage U04 R1 ZL R2 U04 GND MNA052 C1 C2 out MNA053 ZL > 10 kΩ; AOL = 20 (typical) A OL A u = – -----------------------------------------------; R1 1 + -------- ( 1 + A OL ) R2 1 V O max (p-p) ≈ V CC – 1.5 V centered at --- V CC 2 C1 = 47 pF (typical). C2 = 22 pF (typical). R1 = 1 to 10 MΩ (typical). R2 optimum value depends on the frequency and required stability against changes in VCC or average minimum ICC (ICC is typically 2 mA at VCC = 3 V and f = 1 MHz). R1 ≥ 3 kΩ, R2 ≤ 1 MΩ. Typical unity gain bandwidth product is 5 MHz. C1 see Fig.13. AOL = open loop amplification. Au = voltage amplification. Fig.11 HC1GU04 used as a linear amplifier. Fig.12 Crystal oscillator configuration. Where: External components for resonator (f < 1 MHz) FREQUENCY (kHz) R1 (MΩ) R2 (kΩ) C1 (pF) C2 (pF) 10 to 15.9 2.2 220 56 20 16 to 24.9 2.2 220 56 10 25 to 54.9 2.2 100 56 10 55 to 129.9 2.2 100 47 5 130 to 199.9 2.2 47 47 5 200 to 349.9 2.2 47 47 5 350 to 600 2.2 47 47 5 1998 Nov 18 All values given are typical and must be used as an initial set-up. 8 Philips Semiconductors Product specification Inverter 74HC1GU04 Optimum value for R2 FREQUENCY (kHz) R2 (kΩ) 3 2.0 8.0 6 1.0 4.7 10 0.5 2.0 14 >14 OPTIMUM FOR MNA054 80 minimum required ICC minimum influence due to change in VCC handbook, halfpage input capacitance (pF) (1) 60 minimum required ICC minimum influence by VCC (2) 40 0.5 1.0 (3) replace R2 by C3 with a typical value of 35 pF 20 0 0 2 4 6 VI (V) 8 (1) VCC = 2.0 V. (2) VCC = 4.5 V. (3) VCC = 6.0 V. Fig.13 Typical input capacitance as a function of the input voltage. 1998 Nov 18 9 Philips Semiconductors Product specification Inverter 74HC1GU04 PACKAGE OUTLINE Plastic surface mounted package; 5 leads SOT353 D E B y X A HE 5 v M A 4 Q A A1 1 2 e1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E (2) e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION SOT353 1998 Nov 18 REFERENCES IEC JEDEC EIAJ SC-88A 10 EUROPEAN PROJECTION ISSUE DATE 97-02-28 Philips Semiconductors Product specification Inverter 74HC1GU04 • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages • For packages with leads on two sides and a pitch (e): This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 1998 Nov 18 11 Philips Semiconductors Product specification Inverter 74HC1GU04 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, SQFP not suitable HLQFP, HSQFP, HSOP, SMS not PLCC(3), SO, SOJ suitable suitable(2) suitable suitable suitable LQFP, QFP, TQFP not recommended(3)(4) suitable SSOP, TSSOP, VSO not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1998 Nov 18 12 Philips Semiconductors Product specification Inverter 74HC1GU04 NOTES 1998 Nov 18 13 Philips Semiconductors Product specification Inverter 74HC1GU04 NOTES 1998 Nov 18 14 Philips Semiconductors Product specification Inverter 74HC1GU04 NOTES 1998 Nov 18 15 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 245106/00/01/pp16 Date of release: 1998 Nov 18 Document order number: 9397 750 03667