www.fairchildsemi.com FS6X1220R Fairchild Power Switch (FPSTM) Features Description • Current Mode PWM Control With a Fixed Operating Frequency (300kHz) • Pulse by Pulse Current Limit • Over Load Protection • Over Voltage Protection • Thermal Shutdown • Built-in Auto-Restart Circuit • Line Under Voltage Detection and Sleep on/off Function • Internal High Voltage SenseFET (QFET) • Supports Forward or Flyback Topology The FS6X1220R is specially designed for an off-line DCDC converters with minimal external components. This device is a current mode PWM controller combined with a high voltage power SenseFET in a single package. The PWM controller includes integrated fixed frequency oscillator, line under voltage lockout, sleep on/off function, thermal shutdown protection, over voltage protection, pulse-by-pulse current limit and temperature compensated precise current sources for a loop compensation. Compared with discrete MOSFET and PWM controller solution, the FS6X1220R can reduce total cost, component count, size and weight simultaneously increasing efficiency, productivity, and system reliability. This device is well suited for DC to DC converter applications up to 40W of output power. Application • DC-DC Converter TO-220F-5L D2-PAK-5L 1 1. Drain 2. GND 3. VCC 4. Feedback 5. Line Sense Internal Block Diagram Vcc 3 VLU Line UVLO Line 5 Sense Vcc good 9V/15V Enable Vref VSL Vcc Idelay Vref IFB Drain 1 OSC 28R FB 4 S Q R Q Internal Bias Gate driver R VSD Vcc S Q R Q Vovp TSD 2 GND Vcc good Line UVLO Rev.1.0.1 ©2004 Fairchild Semiconductor Corporation FS6X1220R Pin Description Pin Number Pin Name 1 Drain High voltage power SenseFET drain connection. 2 GND This pin is the control ground and the SenseFET source. 3 Vcc This pin is the positive supply input. This pin provides internal operating current for both start-up and steady-state operation. Feedback (FB) This pin is internally connected to the inverting input of the PWM comparator. The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 7.5V, the over load protection is activated resulting in shutdown of the IC. Line Sense (LS) According to the voltage of this pin, three operation modes are defined; Normal operation mode, Line under voltage lock out mode and Sleep mode. If the voltage of this pin is smaller than 2.55V, the IC goes into line under voltage lock out stopping switching operation. If the voltage of this pin is smaller than 1.8V, the IC enters into sleep mode. During sleep mode, reference voltage generation circuit including shunt regulator is disabled and only 300uA operation current is required. 4 5 2 Pin Function Description FS6X1220R Absolute Maximum Ratings (Ta=25°C, unless otherwise specified) Parameter Drain-Gate Voltage (RGS=1MΩ) Gate-Source (GND) Voltage Drain Current Pulsed (2) Single Pulsed Avalanche Energy (3) Symbol Value Unit VDGR 200 V VGS ±30 V IDM 32.8 ADC EAS 210 mJ Continuous Drain Current (Tc = 25°C) ID 8.2 ADC Continuous Drain Current (TC=100°C) ID 5.2 ADC VCC 35 V VFB -0.3 to Vcc V Supply Voltage Input Voltage Range VLS -0.3 to Vcc V PD(Watt H/S) 45 W Derating 0.36 W/°C Operating Junction Temperature Tj +150 °C Operating Ambient Temperature TA -25 to +85 °C TSTG -55 to +150 °C Total Power Dissipation Storage Temperature Range Notes: 1. Tj=25°C to 150°C 2. Repetitive rating: Pulse width limited by maximum junction temperature 3. L=4.7 mH, starting Tj=25°C 3 FS6X1220R Electrical Characteristics (SenseFET part) (Ta=25°C unless otherwise specified) Parameter Symbol Drain Source Breakdown Voltage BVDSS Zero Gate Voltage Drain Current Static Drain Source On Resistance (1) Forward Transconductance Typ. VGS=0V, ID=250µA 200 - - V VDS=200V, VGS=0V - - 1 µA IDSS VDS=160V VGS=0V, TC=125°C - - 10 µA RDS(ON) VGS=10V, ID=4.1A - 0.24 0.30 Ω gfs VDS=40V, ID=4.1A - 7.1 - mho - 700 910 - 125 160 - 18 25 - 13 35 - 120 250 - 30 70 - 55 120 - 18 23 - 5 - - 8 - Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Turn On Delay Time td(on) Rise Time Turn Off Delay Time Fall Time tr td(off) tf Total Gate Charge (Gate-Source+Gate-Drain) Qg Gate-Source Charge Qgs Gate-Drain (Miller) Charge Qgd Note: 1. Pulse test : Pulse width ≤ 300µS, duty ≤ 2% 4 Min. Input Capacitance Condition VGS=0V, VDS=25V, f = 1MHz VDD=100V, ID=11.6A (MOSFET switching time is essentially independent of operating temperature) VGS=10V, ID=11.6A, VDS=160V (MOSFET switching time is essentially independent of operating temperature) Max. Unit pF ns nC FS6X1220R Electrical Characteristics (Continued) (Ta=25°C unless otherwise specified) Parameter Symbol Condition Min. Typ. Max. Unit UVLO SECTION Start Threshold Voltage VSTART VFB = GND 14 15 16 V Stop Threshold Voltage VSTOP VFB = GND 8 9 10 V 270 300 330 kHz OSCILLATOR SECTION - Initial Frequency FOSC Voltage Stability FSTABLE 12V ≤ VCC ≤ 23V 0 1 3 % Temperature Stability (1) ∆FOSC -25°C ≤ Ta ≤ 85°C 0 ±5 ±10 % Maximum Duty Cycle DMAX - 72 80 88 % Minimum Duty Cycle DMIN - - - 0 % FEEDBACK SECTION Feedback Source Current IFB VFB = GND 0.7 0.9 1.1 mA Shutdown Feedback Voltage VSD VFB ≥ 6.9V 6.9 7.5 8.1 V VFB = 5V 4.0 5.0 6.0 µA Shutdown Delay Current IDELAY LINE SENSE SECTION Line UVLO Threshold Voltage VLU - 2.4 2.55 2.7 V Sleep On/Off Threshold Voltage VSL - 1.5 1.8 2.1 V IOVER - 2.82 3.2 3.58 A Thermal Shutdown Temp (1) TSD - 140 160 - °C Over Voltage Protection VOVP Vcc≥6.9V 23 25 27 V Start Up Current ISTART VFB = GND, VCC = 14V - 60 120 uA Sleep Mode Current ISLEEP VUVLO = 1V, VCC = 16V - 300 500 uA IOP VFB = GND, VCC = 16V IOP(MIN) VFB = GND, VCC = 12V - 10 15 mA IOP(MAX) VFB = GND, VCC = 20V CURRENT LIMIT(SELF-PROTECTION)SECTION Peak Current Limit (2) PROTECTION SECTION TOTAL DEVICE SECTION Operating Supply Current Note: 1. These parameters, although guaranteed at the design, are not tested in mass production. 2. These parameter indicates inductor current. 5 FS6X1220R Typical Performance Characteristics (These Characteristic Graphs are Normalized at Ta= 25°C) [mA] (uA) 11 60 58 10.5 56 10 54 9.5 52 50 -25 0 25 50 75 100 125 150 9 -25 0 25 50 75 100 125 150 Temp(℃) Temp(℃) Figure 1. Start Up Current vs. Temp. Figure 2. Operating Supply Current vs. Temp. (V) (V) 16.0 9.50 15.5 9.25 15.0 9.00 14.5 8.75 14.0 8.50 -25 0 25 50 75 100 125 150 -25 0 25 Temp(℃) 50 75 100 125 150 Temp(℃) Figure 4. Stop Threshold Voltage vs. Temp. Figure 3. Start Threshold Voltage vs. Temp. [%] (KHz) 81 305.0 303.0 80.5 301.0 80 299.0 79.5 297.0 79 295.0 -25 0 25 50 75 100 Temp(℃) Figure 5. Initial Frequency vs. Temp. 6 125 150 -25 0 25 50 75 100 Temp(℃) Figure 6. Maximum Duty vs. Temp. 125 150 FS6X1220R Typical Performance Characteristics (Continued) (These Characteristic Graphs are Normalized at Ta= 25°C) [V] [uA] 5.3 26.0 5.2 25.5 5.1 5.0 25.0 4.9 24.5 4.8 4.7 24.0 -25 0 25 50 75 100 125 -25 150 0 25 50 75 100 125 150 Temp(℃) Temp(℃) Figure 8. Shutdown Delay Current vs. Temp. Figure 7.Over Voltage Protection vs. Temp. [mA] [V] 7.6 1.1 1.05 7.55 1 7.5 0.95 0.9 7.45 0.85 7.4 0.8 -25 0 25 50 75 100 125 150 -25 0 25 Temp(℃) 50 75 100 125 150 Temp(℃) Figure 10. Feedback Source Current vs. Temp. Figure 9. Shutdown Feedback Voltage vs. Temp. [A] [V] 3.3 2.7 3.25 2.6 3.2 3.15 2.5 3.1 2.4 3.05 2.3 -25 0 25 50 75 100 125 Temp(℃) Figure 11. Line UVLO threshold voltage vs. Temp. 150 3 -25 0 25 50 75 100 125 150 Temp(℃) Figure 12. Peak Current Limit vs. Temp. 7 FS6X1220R Functional Description 1. Startup : To guarantee stable operation of the control IC, Vcc has under voltage lockout (UVLO) with 6V hysteresis. Figure 1 shows the relation between the supply current (Icc) and the supply voltage (Vcc). Before Vcc reaches 15V, the start-up current is 60µA, which is usually provided by the DC link through start-up resistor. When Vcc reaches 15V, the control IC begins operation and the operating current increases to 10mA as shown. Once the control IC starts operation, it continues its normal operation unless Vcc goes below the stop voltage of 9V. Icc 10mA 3. Protection Circuit : Besides pulse-by-pulse current limit, the FS6X1220R has 3 self protection functions; over load protection (OLP), over voltage protection (OVP) and thermal shutdown (TSD). Because these protection circuits are fully integrated into the IC without external components, the reliability can be improved. In the event of these fault conditions, FS6X1220R enters into auto-restart operation. Once the fault condition occurs, switching operation is terminated and MOSFET remains off, which causes Vcc to be reduced. When Vcc reaches 9V, the protection is reset and the supply current reduces to 60uA. Then, Vcc begin to increase with the current provided through the start-up resistor. When Vcc reaches 15V, FS6X1220R resumes its normal operation if the fault condition is removed. In this manner, the auto-restart alternately enables and disables the switching of the power MOSFET until the fault condition is eliminated as illustrated in figure 3. Vds 60uA Power on Fault occurs Fault removed Vcc Vstop=9V Vstart=15V Vz Vcc Figure 1. Relation between supply current and voltage 2. Feedback Control : The FS6X1220R employs current mode control. The voltage of the feedback pin is compared with the current sense voltage for pulse width modulation (PWM). Figure 2 illustrates the simplified PWM block. The feedback voltage determines the peak drain current of the SenseFET. Usually opto-coupler along with TL431 are used to implement feedback network. The collector of the optocoupler transistor is connected to feedback pin and the emitter is connected to the ground pin. When the voltage of the reference pin of TL431 exceeds the internal reference voltage of 2.5V, the opto-coupler diode current increases, pulling down the feedback voltage. Vcc Vfb Vo 4 OSC D1 D2 28R Vfb* Gate driver R 431 VSD OLP Figure 2. Pulse width modulation (PWM) circuit 8 Icc 10mA 60uA t Normal operation Fault situation Normal operation 0.9mA FB Cfb 9V Figure 3. Auto restart operation after protection Vref 5uA 15V 3.1 Pulse-by-pulse current limit : As shown in figure 2, the drain current of the power MOSFET is limited by the inverting input of PWM comparator (Vfb*). Assuming that the 0.9mA current source flows only through the internal resistor (28R +R= 2.9k), the cathode voltage of diode D2 is about 2.6V. Since D1 is blocked when the feedback voltage (Vfb) exceeds 2.6V, the maximum voltage of the cathode of D2 is 2.6V. Therefore, the maximum value of Vfb* is about 0.1V, which limits the peak value of the power MOSFET drain current. FS6X1220R 3.2 Over Load Protection (OLP) : Overload means that the load current exceeds a pre-set level due to an abnormal situation. In this situation, protection circuit should be activated in order to protect the SMPS. However, even when the SMPS is in the normal operation, the over load protection circuit can be activated during the load transition. In order to avoid this undesired operation, the over load protection circuit is designed to be activated after a specified period to determine whether it is a transient situation or an overload situation. Because of the pulse-by-pulse current limit capability, the maximum peak current through the SMPS is limited, and therefore the maximum input power is restricted with a given input voltage. If the output consumes beyond this maximum power, the output voltage (Vo) decreases below the set voltage. This reduces the current through the opto-coupler diode, which also reduces opto-coupler transistor current increasing Vfb. If Vfb exceeds 2.6V, D1 is blocked and the 5µA current source starts to charge Cfb slowly compared to when the 0.9mA current source charges Cfb. In this condition, Vfb continues increasing until it reaches 7.5V, and the switching operation is terminated at that time as shown in figure 4. The delay time for shutdown is the time required to charge Cfb from 2.6V to 7.5V with 5µA. When Cfb is 10nF (103), T12 is approximately 9.8ms and when Cfb is 0.1µF (104), T12 is approximately 98ms. These values are enough to prevent SMPS from being shut down during transient situations. voltage and FS6X1220R uses Vcc instead of directly monitoring the output voltage. If VCC exceeds 25V, OVP circuit is activated resulting in termination of switching. In order to avoid undesired activation of OVP during normal operation, Vcc should be properly designed to be below 25V. 3.4 Thermal Shutdown (TSD) : The thermal shutdown circuitry senses the junction temperature. The threshold is set at 160°C. When the junction temperature rises above this threshold (160°C) the power MOSFET is disabled. 4. The Line UVLO and Sleep Mode According to the voltage of Line Sense pin, three operation modes are defined; Normal operation mode, Line under voltage lock out mode and Sleep mode as shown in figure 5. When the voltage of this pin is over 2.55V, FS6X1220R operates in normal mode. When the voltage of this pin is smaller than 2.55V, it goes into line under voltage lock out mode terminating switching operation. When the voltage of this pin is smaller than 1.8V, it enters into sleep mode. During sleep mode, reference voltage generation circuit including shunt regulator is disabled and only 300µA operation current is required. Vin Vcc 3 Vcc good VFB 9V/15V R1 Over load protection Sleep ON OFF 7.5V Line Sense R2 VSL (1.8v) Enable Vref 5 VLU (2.5V) Line UVLO Internal Bias 2.6V T12= Cfb*(7.5-2.6)/Idelay T1 T2 t Figure 5. Line Sense block Figure 4. Over load protection 3.3 Over voltage Protection (OVP) : In case of malfunction in the secondary side feedback circuit, or feedback loop open caused by a defect of solder, the current through the optocoupler transistor becomes almost zero. Then, Vfb climbs up in a similar manner to the over load situation, forcing the preset maximum current to be supplied to the secondary side until the over load protection is activated. Because energy more than required is provided to the output, the output voltage may exceed the rated voltage before the over load protection is activated, resulting in the breakdown of the devices in the secondary side. In order to prevent this situation, an over voltage protection (OVP) circuit is employed. In general, Vcc is proportional to the output 9 FS6X1220R Typical Application Circuit 1. Application circuit for DC-DC converter (Flyback) 1 DC INPUT VOLTAGE: 36~72V C103 12nF C101 47uF/100V R103 120K R101 200k 1N4148 5 L&S 3 C102 10n R106 Sleep On/Off signal R102 18k C104 22uF/50V IC102 KSC945 2. Transformer Schematic Diagram 10 Vcc D201 1 2 + Drain R201 1K IC201 H11A817A GND R203 1 C105 47nF/50V C202 330uF/16V R202 1k 3 2 L201 30k 4 12V 2A 2 + 6 10 IC101 FS6X1220RT + 3.9k Vfb R105 9 C201 330uF/16V D101 UF4007 D102 4 R104 10K T1: EPC19 IC201 KA431 C109 4.7nF R204 15K C105 10nF R205 3.9K FS6X1220R 3.Winding Specification No Pin (s→f) Wire Turns Winding Method 2→1 φ 20 Solenoid Winding 12 Solenoid Winding 18 Solenoid Winding 20 Solenoid Winding Np1 0.3 × 1 Insulation: Polyester Tape t = 0.050mm, 2Layers 0.3φ × 2 9→6 Nvo1 Insulation: Polyester Tape t = 0.050mm, 2Layers 0.2φ × 1 3→4 Nvcc Insulation: Polyester Tape t = 0.050mm, 2Layers 0.3φ × 1 2→1 Np2 Outer Insulation: Polyester Tape t = 0.050mm, 2Layers 4.Electrical Characteristics Pin Specification Remarks Inductance 1-2 22uH ± 10% 300kHz, 1V Leakage Inductance 1-2 2uH Max 2nd all short 5. Core & Bobbin Core : EPC 19 Bobbin : EPC 19 Ae(mm2) : 22.7 6.Demo Circuit Part List Part Value Note Resistor Part Value Note C201 330uF/16V Electrolytic Capacitor R101 200K, 1/4W - C202 330uF/16V Electrolytic Capacitor R102 18K, 1/4W - C203 10nF/50V Ceramic Capacitor R103 120K, 1/4W - - - - R104 10K, 1/4W - - - R105 18, 1/4W - R106 3.9K, 1/4W - D101 UF4004 - R201 1K, 1/4W - D102 1N4148 - R202 1K, 1/4W - D201 MBRF10100 - R203 33K, 1/4W - - - R204 15K, 1/4W - R205 3.9K, 1/4W - 47uF, 100V IC IC101 FS6X1220RT (3.2A, 200V) IC102 KSC945 npn transistor Electrolytic Capacitor IC201 KA431(LM431) Voltage reference Capacitor C101 Diode C102 10nF, 50V Ceramic Capacitor PC H11A817A Photo coupler / QT C103 1.2nF, 200V Ceramic Capacitor - - - C104 22uF, 50V Electrolytic Capacitor - - - C105 47nF, 50V Electrolytic Capacitor - - - 11 FS6X1220R Package Dimensions TO-220F-5L 12 FS6X1220R Package Dimensions (Continued) TO-220F-5L(Forming) 13 FS6X1220R Package Dimensions (Continued) D2-PAK-5L 14 FS6X1220R Ordering Information Product Number FS6X1220RTTU FS6X1220RTYDTU FS6X1220RD Package Marking Code BVdss Rds(on)Max. 6X1220R 200V 0.30Ω TO-220F-5L TO-220F-5L(Forming) D2-PAK-5L TU : Non Forming Type YDTU : Forming Type 15 FS6X1220R DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 4/7/04 0.0m 001 2004 Fairchild Semiconductor Corporation