AGILENT HPMX-2005

Silicon Bipolar RFIC 100 MHz
Vector Modulator
Technical Data
HPMX-2005
Features
Plastic SO-16 Package
• 25 - 250 MHz Output
Frequency
• -5 dBm Peak Pout
• Unbalanced 50 Ω Ouptut
Match
• Internal 90° Phase Shifter
• 5 V, 15 mA Bias
• SO-16 Surface Mount
Package
Pin Configuration
Applications
• Dual Conversion Cellular
Telephone and PCS
Handsets
• Dual Conversion ISM Band
Transmitters and LANs
• Direct Conversion Digital
Transmitters for 25-250␣ MHz
VCC 1
16 VCC
V CC 2
15 RFout
GROUND 3
14 GROUND
GROUND 4
13 GROUND
Qref 5
12 Iref
Qmod 6
11 Imod
LO + 7
10 GROUND
LO – 8
9 φ ADJUST
Functional Block Diagram
VCC
I MIXER
Imod
φ ADJUST
Iref
(OPTIONAL CONNECTION FOR
OPERATION AT 140-250 MHz)
0°
LO +
LO –
Σ
φ
PHASE
SHIFTER
SUMMER
OUTPUT
AMPLIFIER
90°
Qref
Qmod
Q MIXER
5965-9104E
7-54
RFout
50 Ω Zo
(UNBALANCED)
Description
Hewlett Packard’s HPMX-2005 is a
silicon RFIC vector modulator
housed in a SO-16 surface mount
plastic package. This IC can be
used for direct modulation at output frequencies from 25 to
250␣ MHz, or, in combination with
an up-converting mixer, for dual
or multiple conversion modulation to higher frequencies. The IC
contains two matched Gilbert cell
mixers, an RC phase shifter, a
summer, and an output amplifier.
This RFIC is well suited to portable and mobile cellular telephone applications such as North
American Digital Cellular, GSM,
and Japan Digital Cellular, and to
Personal Communications Systems such as DCS-1800 or
handyphones. It is also useful for
applications in 900 MHz, 2.4 GHz
and 5.7 GHz ISM (Industrial-Scientific-Medical) bands requiring digital modulation, such as Local Area
Networks (LANs).
The HPMX-2005 is fabricated with
Hewlett-Packard’s 25 GHz
ISOSAT-II process, which combines stepper lithography, selfalignment, ion-implantation
techniques, and gold metallization
to produce state of the art RFICs.
HPMX-2005 Absolute Maximum Ratings, TA = 25°C
Symbol
Parameter
Units
Absolute
Maximum[1]
Pdiss
Power Dissipation [2,3]
mW
500
LOin
LO Input Power
dBm
15
VCC
Supply Voltage
V
10[4]
Vp-p
5[4]
Reference Input Levels
V
5
TSTG
Storage Temperature
°C
-65 to 150
Tj
Junction Temperature
°C
150
∆VImod,
∆VQmod
VIref, VQref
Swing of VImod about VIref or
VQmod about VQref
Thermal Resistance[2]:
θjc = 125°C/W
Notes:
1. Operation of this device above any one
of these parameters may cause
permanent damage.
2. TC = 25°C (TC is defined to be the
temperature at the ends of pin 3 where
it contacts the circuit board).
3. Derate at 8 mW/°C for TC > 87°C.
4. This voltage must not exceed VCC by
more than 0.8 V.
HPMX-2005 Guaranteed Electrical Specifications, TA = 25°C, ZO = 50 Ω
VCC = 5 V, LO = -12 dBm @ 100 MHz (Unbalanced Input), VIref = VQref = 2.5 V (unless otherwise noted).
Symbol
Parameters and Test Conditions
Id
Device Current
Pout
Output Power
LOleak
εmod
Min.
Typ.
Max.
14
17
mA
Pout - LO at Output
Average
Modulation
Error
Units
VImod = VQmod = 3.25 V
dBm
-7
-5
VImod = VQmod = 2.5 V
dBc
30
36
√(VImod - 2.5)2 + (VQmod - 2.5)2 = 0.75 V
%
2.5
5
HPMX-2005 Summary Characterization Information. TA = 25°C, ZO = 50 Ω
VCC = 5 V, LO = -12 dBm @ 100 MHz (Unbalanced Input), VIref = VQref = 2.5 V (unless otherwise noted).
Symbol
Rin
Rin-gnd
Parameters and Test Conditions
Units
Typ.
Input Resistance (Imod to Iref or Qmod to Qref)
Ω
10 k
Input Resistance to Ground (Any I, Q Input to Ground)
Ω
10 k
VSWRLO
LO VSWR (50 Ω)
25 - 200 MHz Bandwidth
1.5:1
VSWRO
Output VSWR (50 Ω)
25 - 200 MHz Bandwidth
2.5:1
-
dBm/Hz
-134
DSB Third Order Intermodulation Products
dBc
33
Ai
RMS Amplitude Error
dB
0.15
Pi
RMS Phase Error
degrees
1.0
IM3
Output Noise Floor
VImod = VQmod = 3.25 V
7-55
HPMX-2005 Pin
Descriptions
VCC (pins 1, 2 & 16)
These three pins provide DC
power to the RFIC, and are connected together internal to the
package. They should be connected to a 5 V supply, with appropriate AC bypassing (1000 pF
typ.) used near the pins, as shown
in figures 1 and 2.The voltage on
these pins should always be
kept at least 0.8 V more positive than the DC level on any
of pins 5, 6, 11, or 12. Failure to
do so may result in the modulator
drawing sufficient current
through the data or reference inputs to damage the IC (see also
Figure 5).
Ground (pins 3, 4, 10, 13 & 14)
These pins should connect with
minimal inductance to a solid
ground plane (usually the backside of the PC board). Recommended assembly employs
multiple plated through via holes
where these leads contact the PC
board.
Iref (pin 12) and Q ref (pin 5)
Imod (pin 11) and Qmod (pin 6)
Inputs
The I and Q inputs are designed
for unbalanced operation but can
be driven differentially with similar performance. The recommended level of unbalanced I and
Q signals is 1.5 Vp-p with an average level of 2.5 V above ground.
The reference pins should be DC
biased to this average data signal
level (VCC/2 or 2.5 V typ.). For
single ended drive, pins 5 and 12
can be tied together. For differential operation, 0.75 Vp-p signals
may be applied across the Imod/Iref
and the Qmod/Qref pairs. The average level of all four signals should
be about 2.5 V above ground. The
impedance between Iin or Qin and
ground is typically 10 kΩ and the
impedance between Imod and Iref
or Qmod and Qref is typically
10␣ k Ω. The input bandwidth typically exceeds 40 MHz. It is possible to reduce LO leakage
through the IC by applying slight
DC imbalances between Imod and
Iref and/or Qmod and Qref (see page
9). All performance data shown
on this data sheet was taken with
unbalanced I/Q inputs.
pins 7 and 8, as shown in figure 2.
The internal phase shifter allows
operation from 25 to 200 MHz (or
to 250 MHz by using pin 9 — see
below). The recommended LO
input level is -12 dBm. All performance data shown on this data
sheet was taken with unbalanced
LO operation.
LO Input (pins 7 and 8)
The LO input of the HPMX-2005 is
balanced (differential) and
matched to 50 Ω. For drive from a
unbalanced LO, pin 7 should be
AC coupled to the LO using a 50 Ω
transmission line and a blocking
capacitor (1000 pF typ.), and pin 8
should be AC grounded (1000 pF
capactitor typ.), as shown in figure 1. For drive from a differential
LO source, 50 Ω transmission
lines and blocking capacitors
(1000 pF typ.) are used on both
RF Output (pin 15)
The RF output of the HPMX-2005
is configured for unbalanced operation, and connects directly to
an emitter follower in the output
stage of the IC. The output impedance is appropriate for connection
without further impedance matching to transmission lines of
characteristic impedance between
50 Ω and 150 Ω. The reflection
coefficients are given in figure 11.
A DC blocking capacitor (1000 pF
typ.) is required on this pin.
Phase Adjust (pin 9)
Applying a DC bias to this pin alters the frequency range of the internal RC phase shifter. In normal
operation, this pin is not connected. (Do not ground this pin!)
For operation at LO frequencies
above 140 MHz, superior modulation error can be achieved by connecting pin 9 to VCC (5 V). The
resulting changes in performance
are shown in figures 13 through
18. Use of pin 9 extends the
operating range to beyond
250␣ MHz.
1000 pF
1000 pF
VCC = +5 V
VCC = +5 V
1000 pF
1000 pF
1
16
2
15
3
14
4
13
1000 pF
1
16
2
15
3
14
4
13
5
12
Iref
6
11
Imod
1000 pF
RF out
RFout
Qref
Qref
5
12
Qmod
Qmod
6
LOin
1000 pF
1000 pF
11
Imod
1000 pF
7
10
LO +
7
10
8
9
LO –
8
9
OPTIONAL FOR
OPERATION TO 250 MHz
1000 pF
OPTIONAL FOR
OPERATION TO 250 MHz
Figure 2. HPMX-2005 Connections Showing Differential
LO and I/Q Inputs.
Figure 1. HPMX-2005 Connections Showing Unbalanced
LO and I/Q Inputs.
7-56
HPMX-2005 Typical Data
Measurement
Direct measurement of the amplitude and phase error at the output
is the most accurate way to evaluate modulator performance. By
measuring the error directly, all
the harmonics, LO leakage, etc.
that show up in the output signal
are accounted for. Figure 3 below
shows the test setup that was
used to create the amplitude and
phase error plots (figures 19 and
21).
Amplitude and phase error are
measured by using the four channel power supply to simulate I and
Q input signals. Real 1.5 Vp-p I and
Q signals would swing 0.75 volts
above and below an average 2.5 V
level, therefore, a logic “high”
level input is simulated by applying 3.25 V, and a logic “low” level
by applying 1.75 V to the I and/or
Q inputs.
bling phase readings on the network analyzer.
Amplitude and phase are measured by setting the network analyzer for an S21 measurement at
the center frequency of choice.
Set the port 1 stimulus level to the
LO level you intend to use in your
circuit (-12 dBm for the data
sheet).
The same test setup shown below
is used to measure input and output VSWR, reverse isolation, and
power vs. frequency. VImod and
VQmod are set to 3.25 V and the
appropriate frequency ranges are
swept. S11 provides input VSWR
data, S22 provides output VSWR
data and S12 provides reverse
isolation data. S21 provides power
output (add the source power to
the S21 derived gain).
By adjusting the Vi and Vq settings
you can step around the I/Q vector circle, reading magnitude and
phase at each point. The relative
values of phase and gain (amplitude) at the various points will
indicate the accuracy of the
modulator. Note: you must use
very low ripple power supplies for
the reference, VImod, and VQmod
supplies. Ripple or noise of only a
few millivolts will appear as wob-
7-57
LO leakage data shown in figure
17 is generated by setting VImod =
VQmod = VIref = VQref = 2.5 volts then
performing an S21 sweep. Since
phase is not important for these
measurements, a scalar network
analyzer or a signal generator and
spectrum analyzer could be used.
25
-4
18
20
-5
16
14
15
I = Q = 2.5 V
10
12
CAUTION:
SEE NOTE ON VCC
ON PAGE 3 FOR
OPERATION HERE.
5
10
+25°C
-6
-35
-15
5
25
45
65
85
-7
-8
-9
2
0
4
TEMPERATURE (°C)
6
8
10
0
PEAK OUTPUT POWER (dBm)
5.5 V
5.0 V
-6
4.5 V
-7
-8
150
200
-8
-12
-4
-6
-8
-16
2.5
250
3.0
FREQUENCY (MHz)
3.5
4.0
-10
-25
4.5
-20
-15
-10
-5
0
LO DRIVE LEVEL (dBm)
I/Q DRIVE LEVEL (VOLTS DC)
Figure 8. HPMX-2005 Power Output
vs. I/Q Drive Level at 100 MHz.
VCC = 5␣ V, LO = -12 dBm, VIref = VQref =
2.5 V, VImod = VQmod, TA = 25°C.
Figure 7. HPMX-2005 Power Output
vs. Frequency and Supply Voltage.
LO␣ = -12 dBm, VIref = VQref = 2.5 V, VImod
= VQmod = 3.25 V, TA = 25°C.
250
-2
-4
-9
100
200
0
OUTPUT POWER (dBm)
V CC
150
Figure 6. HPMX-2005 Power Output
vs. Frequency and Temperature. VCC =
5 V, LO = -12 dBm, VIref = VQref = 2.5 V,
VImod = VQmod = 3.25 V.
0
-5
100
FREQUENCY (MHz)
Figure 5. HPMX-2005 Device Current
vs. Voltage. VCC = 5 V, LO = -12 dBm,
VIref = VQref = 2.5 V, VImod = VQmod =
3.25␣ V, TA = 25°C.
-4
50
50
V CC (VOLTS)
Figure 4. HPMX-2005 Device Current
vs. Temperature. VCC = 5 V, LO =
-12␣ dBm, VIref = VQref = 2.5 V, VImod =
VQmod = 3.25 V, TA = 25°C.
0
–25°C
+85°C
0
-55
OUTPUT POWER (dBm)
OUTPUT POWER (dBm)
20
DEVICE CURRENT (mA)
Id (mA)
HPMX-2005 Typical Performance
Figure 9. HPMX-2005 Power Output
vs. LO Drive Level at 100 MHz.
VCC = 5␣ V, VIref = VQref = 2.5 V, VImod =
VQmod = 3.25 V, TA = 25°C.
3
1
6
180
ANG
2
0.6
0
MAG
0.4
1.5
-90
OUTPUT VSWR (n:1)
MAG (ΓOUT)
INPUT VSWR (n:1)
90
ANG (ΓOUT) (DEGREES)
0.8
2.5
4
6V
5V
2
4V
0.2
1
0
50
100
150
200
FREQUENCY (MHz)
Figure 10. HPMX-2005 LO VSWR vs.
Frequency. VCC = 5 V, LO = -12 dBm,
VIref = VQref = 2.5 V, TA = 25°C.
250
-180
0
0
50
100
150
200
250
FREQUENCY (MHz)
Figure 11. HPMX-2005 Output
Reflection Coefficient vs. Frequency.
VCC = 5 V, LO = -12 dBm, VIref = VQref =
2.5 V, TA = 25°C.
7-58
0
0
50
100
150
200
250
FREQUENCY (MHz)
Figure 12. HPMX-2005 Output VSWR
vs. Frequency and Supply Voltage. LO
= -12 dBm, VIref = VQref = 2.5 V, TA =
25°C.
0.2
Φ ADJ = NC
4
2
Φ ADJ = 5 V
Φ ADJ = 5 V
0
0
0
100
200
0
300
Figure 13. HPMX-2005 RMS Amplitude
Error vs. Frequency and Φ Adjust.
VCC = 5 V, LO = -12 dBm, VIref = VQref =
2.5 V, √ (VImod - 2.5)2 + (VQmod - 2.5)2 =
0.75 V, TA = 25°C.
200
300
Figure 14. HPMX-2005 RMS Phase
Error vs. Frequency and Φ Adjust.
VCC = 5 V, LO = -12 dBm, VIref = VQref =
2.5 V, √(VImod - 2.5)2 + (VQmod - 2.5)2 =
0.75 V, TA = 25°C.
-30
LO LEAKAGE (dBm)
-2
100
FREQUENCY (MHz)
FREQUENCY (MHz)
12
Φ ADJ = NC
PHASE ERROR (DEGREES)
0.4
0
6
Φ ADJ = NC
0.6
15
9
6
0.8
OUTPUT POWER (dBm)
RMS ERROR (%)
The HPMX-2005 has an internal
phase shifter that in normal use
(pin 9 open circuited) operates
over a frequency range of 25 to
200 MHz. By applying 5 volts to
pin 9, this frequency range can be
raised to beyond 250 MHz. This
page shows HPMX-2005 modulator performance with pin 9 tied
to VCC = 5 V for higher frequency
operation. Using the Φ adjust has
minimal effect on the VSWRs at
the LO port.
1
AMPLITUDE ERROR (dB)
HPMX-2005 Typical
Performance Using Phase
Adjust
-4
Φ ADJ = 5 V
Φ ADJ = NC
-6
-40
Φ ADJ = NC
Φ ADJ = 5 V
-50
-8
3
Φ ADJ = 5 V
-60
-10
0
0
100
200
0
300
50
100
150
Figure 15. HPMX-2005 RMS Modulation Error vs. Frequency and Φ␣ Adjust.
VCC = 5 V, LO = -12 dBm, VIref␣ =␣ VQref =
2.5 V, √ (VImod - 2.5)2 + (VQmod - 2.5)2 =
0.75 V, TA = 25°C.
1000 pF
1000 pF
1
16
2
15
3
14
4
13
5
12
Iref
6
11
Imod
7
10
8
9
1000 pF
RF out
Qref
Qmod
1000 pF
1000 pF
300
Figure 16. HPMX-2005 Output Power
vs. Frequency and Φ Adjust. VCC = 5 V,
LO = -12 dBm, VIref = VQref = 2.5 V,
VImod␣ = VQmod = 3.25 V, TA = 25°C.
VCC = +5 V
LO –
250
FREQUENCY (MHz)
FREQUENCY (MHz)
LO +
200
Φ ADJ. CONNECTION FOR
140-250 MHz OPERATION
Figure 18. Connection of Pin 9 for Operation of the
HPMX-2005 at Frequencies Between 140 MHz and
250 MHz.
7-59
0
100
200
300
FREQUENCY (MHz)
Figure 17. HPMX-2005 LO Leakage vs.
Frequency and Φ Adjust. VCC = 5 V,
LO␣ = -12 dBm, VIref = VQref = VImod =
VQmod = 2.5 V, TA = 25°C.
HPMX-2005 Modulation Accuracy (Sample Part)
VCC = 5 V, LO = -12 dBm, VIref = VQref = 2.5 V, √(VImod - 2.5)2 + (VQmod - 2.5)2 = 0.75 V, TA = 25°C
(unless otherwise noted).
0.5
0.6
0.4
MAG ERROR (dB)
AMPLITUDE ERROR (dB)
0.4
0.2
0
-0.2
0.3
0.2
0.1
-0.4
0
-0.6
0
90
180
270
-55
360
-35
25
45
65
85
Figure 20. HPMX-2005 RMS Amplitude
Error at 100 MHz vs. Temperature.
Figure 19. HPMX-2005 RMS Amplitude Error vs. Input Phase at 100 MHz.
5
6
4
PHASE ERROR (DEGREES)
PHASE ERROR (DEGREES)
5
TEMPERATURE (°C)
INPUT PHASE (DEGREES)
2
0
-2
-4
4
3
2
1
0
-6
0
90
180
270
-55
360
-35
-15
5
25
45
65
85
TEMPERATURE (°C)
INPUT PHASE (DEGREES)
Figure 21. HPMX-2005 Phase Error vs. Input Phase at 100 MHz.
Figure 22. HPMX-2005 RMS Phase
Error at 100 MHz vs. Temperature.
5
5
4
4
RMS ERROR (%)
RMS ERROR (%)
-15
3
2
3
2
1
1
0
0
0
90
180
270
360
-55
-35
-15
5
25
45
TEMPERATURE (°C)
INPUT PHASE (DEGREES)
Figure 23. HPMX-2005 RMS Modulation Error vs. Input Phase at 100 MHz. This
value is calculated from the values of amplitude and phase error.
7-60
Figure 24. HPMX-2005 RMS
Modulation Error at 100 MHz vs.
Temperature.
65
85
HPMX-2005 Single and
Double Sideband
Performance
shows the test equipment setup
used to generate this information.
Single sideband (SSB) and double
sideband (DSB) tests are sometimes used to evaluate modulator
performance. Typical SSB and
DSB output spectrum graphs for
the HPMX-2005 are shown in figures 25 and 26 below. Figure 27
For accurate measurements of
modulator performance and LO
suppression, the phase shift provided by the I and Q signal generators must be very close to 90
degrees and the amplitude of the
two signals must be matched to
within a few millivolts. The I,Q
signal generator must put out low
distortion signals or the spectrum
analyzer will show high harmonic
levels that reflect the performance
of the signal generator, not the
modulator.
HPMX-2005 Typical Sideband Performance Data
VCC = 5 V, LO = -12 dBm, VIref = VQref = 2.5 V, VImod = VIref + 0.75 V sin(2πfnt), VQmod = VQref + 0.75 V cos(2πfnt) for
SSB, VImod = VQmod = VQref + 0.75 V cos(2πfnt) for DSB, fn = 25 kHz, TA = 25°C
Symbol
Parameters and Test Conditions
Units
SSB
DSB
Lower Sideband Power Output
dBc
-8
-11
LOleak
LO Suppression
dBc
33
30
PUSB
Upper Sideband Power Output
dBm
-38
-11
IM3
3rd Order Intermodulation Distortion Level
dBc
NA
33
0
0
-20
-20
OUTPUT POWER (dBm)
OUTPUT POWER (dBm)
PLSB
-40
-60
-40
-60
-80
-80
99.9
99.95
100
100.05
99.9
100.1
99.95
100
100.05
100.1
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 25. Single Sideband Output Spectrum.
Figure 26. Double Sideband Output Spectrum.
7-61
HPMX-2005 Using Offsets
to Improve LO Leakage
It is possible to improve on the
excellent performance of the
HPMX-2005 for applications that
are particularly sensitive to LO
leakage. The amount and nature
of the improvement are best understood by examining figures 28
and 29, below.
LO leakage results when normal
variations in the wafer fabrication
process cause small shifts in the
values of the modulator IC’s internal components. These random
variations create an effect equivalent to slight DC imbalances at the
input of each (I and Q) mixer. The
DC imbalances at the mixer inputs are multiplied by ± 1 at the
LO frequency and show up at the
output of the IC as LO leakage.
It is possible to externally apply
small DC signals to the I and Q inputs and exactly cancel the internally generated DC offsets. This
will result in sharply decreased
LO leakage at precisely the frequency and temperature where
the offsets were applied (see figure 28).
This improvement is not very
useful if it doesn’t hold up over
frequency and temperature
changes. The lower curve in figure
28 shows how the offset-adjusted
LO leakage varies versus
frequency. Note that it remains
below -60␣ dBm over most of the
frequency range shown. In the
20␣ MHz range centered at
100␣ MHz, the level is closer to
-70␣ dBm.
0
0
P OUT
-20
POWER (dBm)
LO LEAKAGE (dBm)
-20
NO OFFSETS
-40
-60
-40
P LO
-60
-80
P LO (OFFSET)
WITH OFFSETS
-100
-80
0
50
100
150
200
FREQUENCY (MHz)
Figure 28. LO Leakage vs. Frequency
Without DC Offsets and LO Leakage
vs. Frequency with DC Offsets
Adjusted for Minimum LO Leakage at
100 MHz. VCC = 5 V, LO = -12 dBm,
VIref␣ = VQref = 2.5 V, TA = 25°C.
-55
-35
-15
5
25
45
65
85
TEMPERATURE (°C)
Figure 29. LO Leakage with No DC
Offsets at 100 MHz vs. Temperature
(Upper Curve) and LO Leakage with
DC Offsets Adjusted for Minimum
Leakage at 25°C vs. Temperature
(Lower Curve). VCC = 5 V,
LO␣ =␣ -12␣ dBm, VIref = VQref = 2.5 V.
7-62
Figure 29 shows the performance
of the offset adjusted LO leakage
over temperature. Note that the
adjusted curve is at a level near 70 dBm over the entire temperature range.
The net result of using externally applied offsets with the
HPMX-2005 is that an LO
leakage level below -50 dBm
can typically be achieved over
both frequency and
temperature.
The magnitude of the required external offset varies randomly from
part to part and between the I and
Q mixers on any given IC. Offsets
can range from -35 mV to +35 mV.
External offsets may be applied
either by varying the average level
of the I and Q modulating signals,
or by varying the voltages at the
Iref and Qref pins of the modulator.
HPMX-2005 Modulation
Spectrum Diagrams
Figure 30, below, shows the test
set-up that was used to generate
the GSM, JDC and NADC modulation spectrum diagrams that appear on the following page. The
major differences between these
tests are summarized in the table
below.
The modulation spectra are created by setting the function generator to the appropriate bit-clock
frequency. The pattern generator
is set to produce a pseudorandom
serial bit stream (n = 20) that is
NRZ coded. The pseudorandom
bit stream which simulates the serial data in a digital phone is fed
to the base-band processor that
splits it into a two bit parallel
Baseband Filter
stream (I and Q) and then filters
each according to the requirements of the digital telephone system being simulated. The I and Q
signals from the baseband filter
are then DC offset by 2.5 V using
the op-amp circuit. The output of
the modulator is monitored using
a spectrum analyzer.
System
Bit Clock Frequency
GSM
270 kHz
0.3 GMSK (HP-8657B)
900 MHz
JDC
42 kHz
α = 0.5 π/4 DQPSK (HP-8657D)
950 MHz
NADC
48.6 kHz
α = 0.35 π/4 DQPSK (HP-8657D)
835 MHz
7-63
Channel (LO) Frequency
HPMX-2005 Cellular Telephone Modulation Spectrum Performance
TA = 25°C (unless otherwise noted)
-10
-10
-10
RF OUTPUT POWER (dBm)
RF OUTPUT POWER (dBm)
RF OUTPUT POWER (dBm)
-60
-60
99
100
99
101
100
Figure 31. HPMX-2005 GSM
Modulation Spectrum at -40°C.
-10
RES BW = 3 kHz
VBW = 30 Hz
SWP = 7.50 SEC.
-60
-110
99.850
100.125
RES BW = 3 kHz
VBW = 30 Hz
SWP = 7.50 SEC.
RF OUTPUT POWER (dBm)
RF OUTPUT POWER (dBm)
RF OUTPUT POWER (dBm)
100
100
Figure 34. HPMX-2005 JDC
Modulation Spectrum at -40°C.
-110
99.850
100.150
-10
Figure 37. HPMX-2005 NADC
Modulation Spectrum at -40°C.
-60
-110
99.875
RES BW = 3 kHz
VBW = 30 Hz
SWP = 9.00 SEC.
RF OUTPUT POWER (dBm)
RES BW = 3 kHz
VBW = 30 Hz
SWP = 9.00 SEC.
RF OUTPUT POWER (dBm)
FREQUENCY (MHz)
100.125
100.150
Figure 36. HPMX-2005 JDC
Modulation Spectrum at 85°C.
-10
RES BW = 3 kHz
VBW = 30 Hz
SWP = 9.00 SEC.
-60
100
FREQUENCY (MHz)
Figure 35. HPMX-2005 JDC
Modulation Spectrum at 25°C.
-10
100
-60
FREQUENCY (MHz)
FREQUENCY (MHz)
101
Figure 33. HPMX-2005 GSM
Modulation Spectrum at 85°C.
-10
RES BW = 3 kHz
VBW = 30 Hz
SWP = 7.50 SEC.
-60
100
FREQUENCY (MHz)
Figure 32. HPMX-2005 GSM
Modulation Spectrum at 25°C.
-10
-110
99.875
99
101
FREQUENCY (MHz)
FREQUENCY (MHz)
-110
99.875
-60
-110
-110
-110
RF OUTPUT POWER (dBm)
RES BW = 3 kHz
VBW = 30 Hz
SWP = 60.0 SEC.
RES BW = 3 kHz
VBW = 30 Hz
SWP = 60.0 SEC.
RES BW = 3 kHz
VBW = 30 Hz
SWP = 60.0 SEC.
100
FREQUENCY (MHz)
Figure 38. HPMX-2005 NADC
Modulation Spectrum at 25°C.
7-64
100.125
-60
-110
99.850
100
FREQUENCY (MHz)
Figure 39. HPMX-2005 NADC
Modulation Spectrum at 85°C.
100.150
Part Number Ordering Information
Part Number
Option
No. of Devices
Container
25 Min.
Tube
1000
7" Reel
HPMX-2005
HPMX-2005
T10
Package Dimensions
SO-16 Package
HPMX-2005 Test Board Layout
1000 pF
VCC = +5 V
9.80 (0.385)
10.00 (0.394)
1000 pF
16 15 14 13 12 11 10 9
4.60 (0.181)
5.20 (0.205)
PIN:
1 2
3.80 (0.150)
4.00 (0.158)
3
4
5
6
7
1
16
2
15
3
14
4
13
5
12
Iref
6
11
Imod
7
10
8
9
1000 pF
5.80 (0.228)
6.20 (0.244)
RFout
8
Qref
0.10 (0.004)
0.20 (0.008)
Qmod
0.45 (0.018)
0.56 (0.022)
1.27 TYP.
(0.050)
0.35 (0.014)
0.45 (0.018)
1000 pF
LO +
LO –
1000 pF
1.35 (0.053)
1.75 (0.069)
0.15 (0.007)
0.254 (0.010)
OPTIONAL FOR
OPERATION TO 250 MHz
Finished board size 1.5" x 1" x 1/32"
Material: 1/32" epoxy/fiberglass, 1 oz. copper, both sides,
fused tin/lead coating, both sides.
4.60 (0.181)
5.20 (0.205)
8°
0°
Note: white “+” marks indicate drilling locations for plated-through via
holes to the groundplane on the bottom side of the board.
0.64 (0.025)
0.77 (0.030)
NOTE: DIMENSIONS ARE IN MILLIMETERS (INCHES).
O
7-65