INTEGRATED CIRCUITS DATA SHEET TDA9806 Multistandard VIF-PLL and FM-PLL demodulator Preliminary specification File under Integrated Circuits, IC02 1995 Sep 05 Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator TDA9806 FEATURES GENERAL DESCRIPTION • 5 V supply voltage The TDA9806 is an integrated circuit for multistandard vision IF signal processing and FM sound demodulation in TV and VCR sets. • Gain controlled wide band VIF-amplifier (AC-coupled) • True synchronous demodulation with active carrier regeneration (very linear demodulation, good intermodulation figures, reduced harmonics, excellent pulse response) • Separate video amplifier for sound trap buffering with high video bandwidth • VIF AGC detector for gain control, operating as peak sync detector for B/G • Tuner AGC with adjustable takeover point (TOP) • AFC detector without extra reference circuit • AC-coupled limiter amplifier for sound intercarrier signal • Alignment-free FM-PLL demodulator with high linearity, switchable de-emphasis for FM • Stabilizer circuit for ripple rejection and to achieve constant output signals. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA9806 1995 Sep 05 SDIP32 DESCRIPTION plastic shrink dual in-line package; 32 leads (400 mil) 2 VERSION SOT232-1 Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator TDA9806 QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VP supply voltage 4.5 5 5.5 V IP supply current 82 96 110 mA Vi VIF(rms) vision IF input signal voltage sensitivity (RMS value) − 60 100 µV Vo CVBS (p-p) CVBS output signal voltage (peak-to-peak value) 1.7 2.0 2.3 V B−3 −3 dB video bandwidth on pin CVBS 7 8 − MHz S/N (W) weighted signal-to-noise ratio for video 56 60 − dB −1 dB video at output B/G standard; CL < 20 pF; RL > 1 kΩ; AC load IMα1.1 intermodulation attenuation at ‘blue’ f = 1.1 MHz 58 64 − dB IMα3.3 intermodulation attenuation at ‘blue’ f = 3.3 MHz 58 64 − dB αH(sup) suppression of harmonics in video signal 35 40 − dB Vo(rms) audio output signal voltage for FM (RMS value) B/G standard; 54% modulation − 0.5 − V THD total harmonic distortion for FM 54% modulation − 0.15 0.5 % S/N (W) weighted signal-to-noise ratio for FM 54% modulation − 60 − dB 1995 Sep 05 3 5 28 AFC n.c. n.c. 3 6 19 7 TUNER AND VIF-AGC 25 18 24 n.c. 30 23 AFC DETECTOR VCO TWD 21 video 1 V (p-p) 10 CVBS 2 V (p-p) Philips Semiconductors 4 n.c. loop filter Multistandard VIF-PLL and FM-PLL demodulator tuner AGC CAGC n.c. BLOCK DIAGRAM handbook, full pagewidth 1995 Sep 05 2 x f PC TOP 2 VIF 4 n.c. n.c. 1 VIF AMPLIFIER VIDEO DEMODULATOR AND AMPLIFIER FPLL 32 TDA9806 VIDEO BUFFER INTERCARRIER MIXER 31 22 Vi(vid) 15 FM DETECTOR (PLL) AF AMPLIFIER INTERNAL VOLTAGE STABILIZER 29 5V 27 26 9 8 11 20 1/2 VP 17 16 5.5 n.c. n.c. n.c. n.c. 14 12 AF 13 de-emphasis SIF TDA9806 Fig.1 Block diagram. Preliminary specification MHA054 Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator TDA9806 PINNING SYMBOL PIN DESCRIPTION Vi VIF1 1 VIF differential input signal voltage 1 Vi VIF2 2 VIF differential input signal voltage 2 n.c. 3 not connected n.c. 4 not connected n.c. 5 not connected TADJ 6 tuner AGC takeover adjust (TOP) TPLL 7 handbook, halfpage PLL loop filter Vi VIF1 1 32 n.c. Vi VIF2 2 31 n.c. 3 30 n.c. n.c. 8 not connected n.c. n.c. 9 not connected n.c. 4 29 VP Vo CVBS 10 CVBS output signal voltage n.c. 5 28 C VAGC n.c. 11 not connected TADJ 6 27 GND Vo AF 12 audio voltage frequency output 7 DEEMI 13 de-emphasis input TPLL 26 Cref DEEMO 14 de-emphasis output n.c. 8 CDEC 15 decoupling capacitor n.c. 16 not connected Vi FM 17 sound intercarrier input voltage n.c. 18 not connected TAGC 19 tuner AGC output Vo(int) 20 sound intercarrier output voltage Vo(vid) 21 composite video output voltage Vi(vid) 22 video buffer input voltage AFC 23 AFC output VCO1 24 VCO1 reference circuit for 2fPC VCO2 25 VCO2 reference circuit for 2fPC 26 1⁄ Cref 2VP n.c. 24 VCO1 9 Vo CVBS 10 23 AFC 22 Vi(vid) n.c. 11 Vo AF 12 21 Vo(vid) DEEM I 13 20 Vo(int) DEEM O 14 19 TAGC C DEC 15 18 n.c. 17 Vi FM n.c. 16 MHA053 reference capacitor GND 27 ground CVAGC 28 VIF AGC capacitor VP 29 supply voltage n.c. 30 not connected n.c. 31 not connected n.c. 32 not connected 1995 Sep 05 25 VCO2 TDA9806 Fig.2 Pin configuration. 5 Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator TDA9806 FUNCTIONAL DESCRIPTION Video demodulator and amplifier Vision IF amplifier The video demodulator is realized by a multiplier which is designed for low distortion and large bandwidth. The vision IF input signal is multiplied with the ‘in-phase’ signal of the travelling wave divider output. The vision IF amplifier consists of three AC-coupled differential amplifier stages. Each differential stage comprises a feedback network controlled by emitter degeneration. The demodulator output signal is fed via an integrated low-pass filter for attenuation of the carrier harmonics to the video amplifier. The video amplifier is realized by an operational amplifier with internal feedback and high bandwidth. A low-pass filter is integrated to achieve an attenuation of the carrier harmonics. The video output signal is 1 V (p-p) for nominal vision IF modulation. Tuner and VIF AGC The AGC capacitor voltage is transferred to an internal IF control signal, and is fed to the tuner AGC to generate the tuner AGC output current (open-collector output). The tuner AGC takeover point can be adjusted. This allows the tuner and the SWIF filter to be matched to achieve the optimum IF input level. Video buffer For an easy adaption of the sound traps an operational amplifier with internal feedback is used. This amplifier is featured with a high bandwidth and 7 dB gain. The input impedance is adapted for operating in combination with ceramic sound traps. The output stage delivers a nominal 2 V (p-p) positive video signal. Noise clipping is provided. The AGC detector charges/discharges the AGC capacitor to the required voltage for setting of VIF and tuner gain in order to keep the video signal at a constant level. Therefore for negative video modulation the sync level of the video signal is detected. Frequency Phase Locked Loop detector (FPLL) Intercarrier mixer The VIF-amplifier output signal is fed into a frequency detector and into a phase detector via a limiting amplifier. During acquisition the frequency detector produces a DC current proportional to the frequency difference between the input and the VCO signal. After frequency lock-in the phase detector produces a DC current proportional to the phase difference between the VCO and the input signal. The DC current of either frequency detector or phase detector is converted into a DC voltage via the loop filter, which controls the VCO frequency. The intercarrier mixer is realized by a multiplier. The VIF amplifier output signal is fed to the intercarrier mixer and converted to intercarrier frequency by the regenerated picture carrier (VCO). The mixer output signal is fed via a high-pass for attenuation of the video signal components. VCO, travelling wave divider and AFC The VCO operates with a resonance circuit (with L and C in parallel) at double the PC frequency. The VCO is controlled by two integrated variable capacitors. The control voltage required to tune the VCO from its free-running frequency to actually double the PC frequency is generated by the Frequency-Phase detector and fed via the loop filter to the first variable capacitor (FPLL). This control voltage is amplified and additionally converted into a current which represents the AFC output signal. At centre frequency the AFC output current is equal to zero. The oscillator signal is divided-by-two with a Travelling Wave Divider (TWD) which generates two differential output signals with a 90 degree phase difference independent of the frequency. 1995 Sep 05 6 Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator TDA9806 FM detector Internal voltage stabilizer and 1⁄2VP-reference The FM detector consists of a limiter, an FM-PLL and an AF amplifier. The limiter provides the amplification and limitation of the FM sound intercarrier signal before demodulation. The result is high sensitivity and AM suppression. The amplifier consists of 7 stages which are internally AC-coupled in order to minimize the DC offset and to save pins for DC decoupling. The bandgap circuit internally generates a voltage of approximately 1.25 V, independent of supply voltage and temperature. A voltage regulator circuit, connected to this voltage, produces a constant voltage of 3.6 V which is used as an internal reference voltage. For all audio output signals the constant reference voltage cannot be used because large output signals are required. Therefore these signals refer to half the supply voltage to achieve a symmetrical headroom, especially for the rail-to-rail output stage. For ripple and noise attenuation the 1⁄2VP voltage has to be filtered via a low-pass filter by using an external capacitor together with an integrated resistor (fg = 5 Hz). For a fast setting to 1⁄2VP an internal start-up circuit is added. The FM-PLL consists of an integrated relaxation oscillator, an integrated loop filter and a phase detector. The oscillator is locked to the FM intercarrier signal, output from the limiter. As a result of locking, the oscillator frequency tracks with the modulation of the input signal and the oscillator control voltage is superimposed by the AF voltage. The FM-PLL operates as an FM-demodulator. The AF amplifier consists of two parts: 1. The AF preamplifier for FM sound is an operational amplifier with internal feedback, high gain and high common mode rejection. The AF voltage from the PLL demodulator, by principle a small output signal, is amplified by approximately 33 dB. The low-pass characteristic of the amplifier reduces the harmonics of the intercarrier signal at the sound output terminal, at which the de-emphasis network for FM sound is applied. An additional DC control circuit is implemented to keep the DC level constant, independent of process spread. 2. The AF output amplifier (10 dB) provides the required output level by a rail-to-rail output stage. This amplifier makes use of an input selector for switching to FM de-emphasis or mute state, controlled by the mute switching voltage. 1995 Sep 05 7 Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator TDA9806 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER VP supply voltage (pin 29) Vi CONDITIONS maximum chip temperature of 120 °C; note 1 MIN. MAX. UNIT 0 5.5 V voltage at pins 1 to 7, 12 to 19, 22, 23, 28 and 29 0 VP V ts(max) maximum short-circuit time − 10 s V19 tuner AGC output voltage 0 13.2 V Tstg storage temperature −25 +150 °C Tamb operating ambient temperature −20 +70 °C Ves electrostatic handling voltage −300 +300 V note 2 Notes 1. IP = 110 mA; Tamb = 70 °C; Rth j-a = 60 K/W. 2. Charge device model class B: equivalent to discharging a 200 pF capacitor via a 0 Ω series resistor. THERMAL CHARACTERISTICS SYMBOL Rth j-a 1995 Sep 05 PARAMETER thermal resistance from junction to ambient in free air 8 VALUE UNIT 60 K/W Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator TDA9806 CHARACTERISTICS VP = 5 V; Tamb = 25 °C; see Table 1 for input frequencies and level; input level Vi IF 1, 2 = 10 mV RMS value (sync-level for B/G); video modulation DSB; residual carrier B/G: 10%; video signal in accordance with “CCIR, line 17” ; measurements taken in Fig.10; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply (pin 29) VP supply voltage IP supply current note 1 4.5 5 5.5 V 82 96 110 mA Vision IF amplifier (pins 1 and 2) Vi VIF(rms) input signal voltage sensitivity (RMS value) B/G standard; −1 dB video at output − 60 100 µV Vi max(rms) maximum input signal voltage (RMS value) B/G standard; +1 dB video at output 120 200 − mV ∆Vo(int) internal IF amplitude difference within AGC range; between picture and sound B/G standard; carrier ∆f = 5.5 MHz − 0.7 1 dB GIFcr IF gain control range see Fig.3 65 70 − dB Ri(diff) differential input resistance note 2 1.7 2.2 2.7 kΩ Ci(diff) differential input capacitance note 2 1.2 1.7 2.5 pF V1,2 DC input voltage − 3.4 − V True synchronous video demodulator; note 3 fVCO(max) maximum oscillator frequency for carrier regeneration f = 2fPC 125 130 − MHz ∆fosc/∆T oscillator drift as a function of temperature oscillator is free-running; IAFC = 0; note 4 − − ±20 ppm/K V0 ref(rms) oscillator voltage swing at pins 24 and 25 (RMS value) B/G standard 70 100 130 mV fpcCR picture carrier capture range B/G standard ±1.5 ±2.0 − MHz tacq acquisition time BL = 60 kHz; note 5 − − 30 ms Vi VIF(rms) VIF input signal voltage sensitivity for PLL to be locked (RMS value; pins 1 and 2) maximum IF gain; note 6 − 30 70 µV IFPLL(offset) FPLL offset current at pin 7 note 7 − − ±4.5 µA 1995 Sep 05 9 Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator SYMBOL TDA9806 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Composite video amplifier (pin 21; sound carrier off) Vo video(p-p) output signal voltage (peak-to-peak value) see Fig.7 0.88 1.0 1.12 V V21(sync) sync voltage level B/G standard − 1.5 − V V21(clu) upper video clipping voltage level VP − 1.1 VP − 1 − V V21(cll) lower video clipping voltage level − 0.3 0.4 V Ro,21 output resistance − − 10 Ω Iint 21 internal DC bias current for emitter-follower 1.6 2.0 − mA I21 max(sink) maximum AC and DC output sink current 1.0 − − mA I21 max(source) maximum AC and DC output source current 2.0 − − mA B−1 −1 dB video bandwidth B/G standard; CL < 50 pF; RL > 1 kΩ; AC load 5 6 − MHz B−3 −3 dB video bandwidth B/G standard; CL < 50 pF; RL > 1 kΩ; AC load 7 8 − MHz αH suppression of video signal harmonics CL < 50 pF; RL > 1 kΩ; AC load; note 8a 35 40 − dB PSRR power supply ripple rejection at video signal; grey level; pin 21 B/G standard; see Fig.8 32 35 − dB 2.6 3.3 4.0 kΩ note 2 CVBS buffer amplifier (only) and noise clipper (pins 10 and 22) Ri,22 input resistance note 2 Ci,22 input capacitance note 2 VI,22 DC input voltage Gv voltage gain V10(clu) 1.4 2 3.0 pF 1.5 1.8 2.1 V 6.5 7 7.5 dB upper video clipping voltage level 3.9 4.0 − V V10(cll) lower video clipping voltage level − 1.0 1.1 V Ro,10 output resistance − − 10 Ω Iint 10 DC internal bias current for emitter-follower 2.0 2.5 − mA Io,10 max(sink) maximum AC and DC output sink current 1.4 − − mA Io,10 max(source) maximum AC and DC output source current 2.4 − − mA B/G standard; note 9 note 2 B−1 −1 dB video bandwidth B/G standard; CL < 20 pF; RL > 1 kΩ; AC load 8.4 11 − MHz B−3 −3 dB video bandwidth B/G standard; CL < 20 pF; RL > 1 kΩ; AC load 11 14 − MHz 1995 Sep 05 10 Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator SYMBOL TDA9806 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Measurements from IF input to CVBS output (pin 10; 330 Ω between pins 21 and 22, sound carrier off) Vo CVBS(p-p) CVBS output signal voltage note 9 on pin 10 (peak-to-peak value) 1.7 2.0 2.3 V Vo CVBS(sync) sync voltage level B/G standard − 1.35 − V ∆Vo deviation of CVBS output signal voltage at B/G 50 dB gain control − − 0.5 dB 30 dB gain control − − 0.1 dB ∆Vo(blBG) black level tilt in B/G standard gain variation; note 10 − − 1 % Gdiff differential gain “CCIR, line 330” − 2 5 % ϕdiff differential phase “CCIR, line 330” − 1 2 deg B−1 −1 dB video bandwidth B/G standard; CL < 20 pF; RL > 1 kΩ; AC load 5 6 − MHz B−3 −3 dB video bandwidth B/G standard; CL < 20 pF; RL > 1 kΩ; AC load 7 8 − MHz S/N (W) weighted signal-to-noise ratio see Fig.4 and note 11 56 60 − dB S/N unweighted signal-to-noise ratio see Fig.4 and note 11 49 53 − dB IMα1.1 intermodulation attenuation at ‘blue’ f = 1.1 MHz; see Fig.5 and note 12 58 64 − dB intermodulation attenuation at ‘yellow’ f = 1.1 MHz; see Fig.5 and note 12 60 66 − dB intermodulation attenuation at ‘blue’ f = 3.3 MHz; see Fig.5 and note 12 58 64 − dB intermodulation attenuation at ‘yellow’ f = 3.3 MHz; see Fig.5 and note 12 59 65 − dB αc(rms) residual vision carrier (RMS value) B/G standard; fundamental wave and harmonics − 2 5 mV αH(sup) suppression of video signal harmonics note 8a 35 40 − dB αH(spur) spurious elements note 8b 40 − − dB PSRR power supply ripple rejection at video signal; grey level; pin 10 B/G standard; see Fig.8 25 28 − dB 0.75 1 1.25 mA IMα3.3 VIF-AFC detector (pin 28) I28 tresp charging current B/G standard; note 10 discharging current B/G standard 15 20 25 µA AGC response to an increasing VIF step B/G standard; note 13 − 0.05 0.1 ms/dB − 2.2 3.5 ms/dB AGC response to a decreasing B/G standard VIF step 1995 Sep 05 11 Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator SYMBOL PARAMETER TDA9806 CONDITIONS MIN. TYP. MAX. UNIT Tuner AGC (pin 19) Vi(rms) Vo,19 IF input signal voltage for input at pins 1 and 2; minimum starting point of tuner RTOP = 22 kΩ; I19 = 0.4 mA takeover (RMS value) − 2 5 mV IF input signal voltage for maximum starting point of tuner takeover (RMS value) input at pins 1 and 2; RTOP = 0 Ω; I19 = 0.4 mA 50 100 5 mV permissible output voltage from external source; note 2 − − 13.2 V Vsat,19 saturation voltage I19 = 1.5 mA − − 0.2 V ∆VTOP,19/∆T variation of takeover point by temperature I19 = 0.4 mA − 0.03 0.07 dB/K I19(sink) sink current no tuner gain reduction; see Fig.3 V19 = 12 V − − 2.5 µA V19 = 13.2 V − − 5 µA maximum tuner gain reduction 1.5 2 2.6 mA tuner gain current from 20 to 80% − 6 8 dB ∆GIF IF slip by automatic gain control AFC circuit (pin 23); see Fig.6 and note 14 S control steepness ∆I23/∆f note 15 0.5 0.72 1.0 µA/kHz ∆fIF/∆T frequency variation by temperature IAFC = 0; note 5 − − ±20 ppm/K Vo,23 output voltage upper limit see Fig.6 VP − 0.6 VP − 0.3 − output voltage lower limit see Fig.6 − 0.3 0.6 V Io,23(source) output source current 150 200 250 µA Io,23(sink) output sink current 150 200 250 µA ∆I23(p-p) residual video modulation current (peak-to-peak value) − 20 30 µA 1995 Sep 05 B/G standard 12 V Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator SYMBOL TDA9806 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Intercarrier mixer (B/G standard; pin 20) Vo(rms) IF intercarrier level (RMS value) SC − note 16 − mV B−3 −3 dB intercarrier bandwidth upper limit 7.5 9 − MHz αc(rms) residual sound carrier (RMS value) fundamental wave and harmonics − 2 − mV Ro,20 output resistance note 2 − − 25 Ω VO,20 DC output voltage − 2.0 − V Iint 20 DC internal bias current for emitter-follower 1.5 1.9 − mA I20 max(sink) maximum AC and DC output sink current 1.1 1.5 − mA I20 max(source) maximum AC and DC output source current 3.0 3.5 − mA − − 100 µV − 300 400 µV 200 − − mV 480 600 720 Ω − 2.8 − V upper limit 7.0 − − MHz lower limit − − 4.0 MHz upper limit 9.0 − − MHz Limiter amplifier (pin 17); note 17 Vi FM(rms) input signal voltage for lock-in (RMS value) Vi FM(rms) input signal voltage (RMS value) S + N ------------ N - = 40 dB allowed input signal voltage (RMS value) Ri,17 input resistance VI,17 DC input voltage note 2 FM-PLL detector fi FM(catch) catching range of PLL fi FM(hold) holding range of PLL tacq acquisition time lower limit 1995 Sep 05 13 − − 3.5 MHz − − 4 µs Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator SYMBOL TDA9806 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT FM operation (B/G standard; pin 12); notes 17 and 17a Vo AF12(rms) AF output signal voltage (RMS value) without de-emphasis; short-circuit from pin 13 to pin 14; 27 kHz (54% FM deviation); see Fig.10 and note 18 Rx = 470 Ω 200 250 300 mV Rx = 0 Ω 400 500 600 mV − V Vo AF12(cl) AF output clipping signal voltage level THD < 1.5% 1.3 1.4 ∆fAF frequency deviation THD < 1.5%; note 18 − − ∆Vo/∆T temperature drift of AF output signal voltage V15 DC voltage at decoupling capacitor R12 output resistance 53 10−3 − 3× voltage dependent on VCO frequency; note 19 1.2 − 3.0 V note 2 − − 100 Ω − 1⁄ − V DC output voltage I12 max(sink) maximum AC and DC output sink current − − 1.1 mA I12 max(source) maximum AC and DC output source current − − 1.1 mA B−3 −3 dB video bandwidth 100 125 − kHz THD total harmonic distortion − 0.15 0.5 % S/N (W) weighted signal-to-noise ratio FM-PLL only; with 50 µs de-emphasis; 27 kHz (54% FM deviation); “CCIR 468-4” 55 60 − dB αc(rms) residual sound carrier (RMS value) fundamental wave and harmonics − − 75 mV αAM AM suppression 50 µs de-emphasis; AM: f = 1 kHz; m = 0.3 refer to 27 kHz (54% FM deviation) 46 50 − dB α12 mute attenuation of AF signal B/G standard 70 75 − dB ∆V12 DC jump voltage of AF output terminal for switching AF output to mute state and vice versa FM-PLL in lock mode − ±50 ±150 mV PSRR power supply ripple rejection at Rx = 470 Ω; see Fig.8 pin 12 26 30 − dB without de-emphasis; short-circuit from pin 13 to pin 14 14 2VP dB/K V12 1995 Sep 05 tracked with supply voltage 7× kHz 10−3 Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator SYMBOL TDA9806 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT AF performance for FM operation (B/G standard); notes 20, 21 and 22; see Table 1 S/N (W) weighted signal-to-noise ratio 27 − − dB black picture 45 51 − dB white picture 45 51 − dB 6 kHz sine wave (black to white modulation) 40 46 − dB sound carrier subharmonics; f = 2.75 MHz ±3 kHz 35 40 − dB PC/SC ratio at pins 1 and 2; 27 kHz (54% FM deviation); “CCIR 468-4” Notes 1. Values of video and sound parameters are decreased at VP = 4.5 V. 2. This parameter is not tested during production and is only given as application information for designing the television receiver. 3. Loop bandwidth BL = 60 kHz (natural frequency fn = 15 kHz; damping factor d = 2; calculated with sync level within gain control range). Resonance circuit of VCO: Q0 > 50; Cext = 8.2 pF ±0.25 pF; Cint ≈ 8.5 pF (loop voltage approximately 2.7 V). 4. Temperature coefficient of external LC-circuit is equal to zero. 5. Vi IF = 10 mV (RMS); ∆f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture video modulation. 6. Vi IF signal for nominal video signal. 7. Offset current measured between pin 7 and half of supply voltage (VP = 2.5 V) under the following conditions: no input signal at VIF input (pins 1 and 2) and VIF amplifier gain at minimum (V28 = VP). 8. Measurements taken with SAW filter G1962 (sound shelf: 20 dB); loop bandwidth BL = 60 kHz: a) modulation VSB; sound carrier off; fvideo > 0.5 MHz. b) sound carrier on; fvideo = 10 kHz to 10 MHz. 9. The 7 dB buffer gain accounts for 1 dB loss in the sound trap. Buffer output signal is typical 2 V (p-p), in event of CVBS video amplifier output typical 1 V (p-p). If no sound trap is applied a 330 Ω resistor must be connected from output to input (from pin 21 to pin 22). 10. The leakage current of the AGC capacitor should not exceed 1 µA at B/G standard. Larger currents will increase the tilt. 11. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value, pin 10). B = 5 MHz weighted in accordance with “CCIR 567”. 12. The intermodulation figures are defined: V 0 at 4.4 MHz α 1.1 = 20 log -------------------------------------- + 3.6dB ; α1.1 value at 1.1 MHz referenced to black/white signal; V 0 at 1.1 MHz V 0 at 4.4 MHz α 3.3 = 20 log -------------------------------------- ; α3.3 value at 3.3 MHz referenced to colour carrier. V 0 at 3.3 MHz 13. Response speed valid for a VIF input level range of 200 µV up to 70 mV. 1995 Sep 05 15 Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator TDA9806 14. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is given in Fig.6. The AFC-steepness can be changed by the resistors at pin 23. 15. Depending on the ratio ∆C/C0 of the LC resonant circuit of VCO (Q0 > 50; see note 3; C0 = Cint + Cext). 16. The intercarrier output signal at pin 20 can be calculated by the following formula taking into account the video output signal at pin 21 (Vo video(p-p) = 1 V typical) as a reference: 1 V o ( rms ) = 1 V ( p – p ) × ----------- × 10 2 2 V iSC ------------ ( dB ) + 6 dB ± 3 dB V iPC --------------------------------------------------------------20 1 with ----------- = correction term for RMS value, 2 2 V iSC ------------ ( dB ) = sound-to-picture carrier ratio at VIF input (pins 1 and 2) in dB, V iPC 6 dB = correction term of internal circuitry and ±3 dB = tolerance of video output and intercarrier output amplitude Vo(rms). V iSC Example: SAW filter G1962 (sound shelf: 20 dB) ⇒ ----------- = – 27 dB ⇒ Vo(rms) = 32 mV typical. V iPC 17. Input level for second IF from an external generator with 50 Ω source impedance. AC-coupled with 10 nF capacitor, fmod = 1 kHz, 27 kHz (54% FM deviation) of audio references. A VIF input signal is not permitted. Pin 28 has to be connected to positive supply voltage for minimum IF gain. S/N and THD measurements are taken at 50 µs de-emphasis. a) Second IF input level 10 mV RMS. 18. Measured with an FM deviation of 27 kHz the typical AF output signal is 500 mV (RMS) (Rx = 0 Ω; see Fig.10). By using Rx = 470 Ω the AF output signal is attenuated by 6 dB (250 mV RMS). For handling an FM deviation of more than 53 kHz the AF output signal has to be reduced by using Rx in order to avoid clipping (THD < 1.5%). For an FM deviation up to 100 kHz an attenuation of 6 dB is recommended with Rx = 470 Ω. 19. The leakage current of the decoupling capacitor (2.2 µF) should not exceed 1 µA. 20. For all S/N measurements the used vision IF modulator has to meet the following specifications: a) Incidental phase modulation for black-to-white jump less than 0.5 degrees. b) Picture-to-sound carrier ratio; PC/SC = 13 dB (transmitter). c) Sound shelf of VIF SAW filter: minimum 20 dB. 21. Measurements taken with SAW filter K6256 (Siemens) for vision and sound IF (sound shelf: 20 dB). Input level Vi SIF = 10 mV (RMS), 27 kHz (54% FM deviation). 22. The PC/SC ratio at pins 1 and 2 is calculated as the addition of TV transmitter PC/SC ratio and SAW filter PC/SC ratio. This PC/SC ratio is necessary to achieve the S/N (W) values as noted. A different PC/SC ratio will change these values. Table 1 Input frequencies and carrier ratios DESCRIPTION SYMBOL B/G STANDARD UNIT fPC 38.9 MHz Sound carrier fSC 33.4 MHz Picture-to-sound carrier ratio SC 13 Picture carrier 1995 Sep 05 16 dB Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator TDA9806 MHA061 70 andbook, full pagewidth gain (dB) 60 0.06 VIF input (1,2) (mV RMS) 50 0.6 40 Ituner (mA) 0 30 (1) 6 (2) (3) (4) 20 1.0 10 60 0 2.0 −10 1.0 1.5 (1) Ituner; RTOP = 22 kΩ. (2) Gain. 2 2.5 3 3.5 4 V28 (V) 4.5 (3) Ituner; RTOP = 11 kΩ. (4) Ituner; RTOP = 0 Ω. Fig.3 Typical VIF and tuner AGC characteristic. MED684 80 handbook, halfpage S/N (dB) 3.2 dB handbook, halfpage 60 10 dB 13.2 dB 13.2 dB 27 dB 27 dB 40 SC CC 20 PC BLUE SC CC PC YELLOW MED685 - 1 0 −60 −40 −20 0 20 Vi (VIF)(rms)(dB) 0.06 0.6 6 10 60 600 Vi (VIF)(rms)(mV) SC = sound carrier, with respect to sync level. CC = chrominance carrier, with respect to sync level. PC = picture carrier, with respect to sync level. The sound carrier levels are taking into account a sound shelf attenuation of 20 dB (SWIF G1962). Fig.4 1995 Sep 05 Typical signal-to-noise ratio as a function of IF input voltage. Fig.5 Input signal conditions. 17 Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator TDA9806 handbook, full pagewidth VP VP = 5 V V23 (V) I 23 (µA) 4.5 200 3.5 100 2.5 0 1.5 100 0.5 200 22 kΩ TDA9806 23 I 23 22 kΩ MHA055 (source current) (sink current) 38.5 38.9 39.3 f (MHz) Fig.6 Measurement conditions and typical AFC characteristic. 2.5 V zero carrier level white level 1.8 V black level 1.5 V sync level handbook, 2.6 V halfpage B/G standard MHA056 Fig.7 Typical video signal levels on output pin 21 (sound carrier off). handbook, full pagewidth VP = 5 V 100 mV (f ripple = 70 kHz) VP = 5 V TDA9806 MHA057 t Fig.8 Ripple rejection condition. 1995 Sep 05 18 29 28 + n.c. 27 26 20 kΩ + + 70 kΩ + ++ 20 kΩ + 22 23 24 25 + + + + 650 Ω 200 µA 420 Ω 420 Ω 21 20 + + + + + 2.2 kΩ 3.3 kΩ 1.7 pF 2 kΩ 2.8 V 1 kΩ 0.5 pF 9 kΩ 10 kΩ 1.6 kΩ 1.7 pF 1 kΩ 2.0 mA 1.9 mA 1 mA 10 kΩ 10 kΩ 31 n.c. 32 n.c. 19 2.5 mA n.c. Philips Semiconductors GND Multistandard VIF-PLL and FM-PLL demodulator 30 INTERNAL PIN CONFIGURATION 1995 Sep 05 VP 18 + + 3.6 V 10 kΩ TDA9806 1.1 kΩ 3.6 V 3.6 V + 3.9 kΩ 640 Ω 40 kΩ 40 kΩ n.c. 0.6 µA + 3.6 V 20 kΩ 9 kΩ + 67 µA + + 2.3 mA 10 pF 2.5 mA + 23 µA 5 6 7 n.c. 8 9 300 µA + + 650 Ω n.c. 10 Fig.9 Internal circuitry. 11 12 13 14 15 MHA060 TDA9806 4 n.c. 4.2 kΩ Preliminary specification 14.7 kΩ + 25 pF + 120 Ω n.c. n.c. n.c. 16 + + VCO 3 17 10 pF 1.1 kΩ 2 handbook, full pagewidth 19 1 Q 0 50 n.c. n.c. n.c. 32 31 30 VIF AGC 29 2.2 µF 28 GND 27 26 tuner AGC 22 kΩ 8.2 pF Cref 2.2 µF 25 10 nF 100 nF SFT 5.5 MHz n.c. 330 Ω 24 5.6 kΩ 560 Ω 23 22 21 20 19 18 17 10 11 12 13 14 15 16 Philips Semiconductors 22 kΩ 10 nF FM mute switch video output Multistandard VIF-PLL and FM-PLL demodulator intercarrier output TEST AND APPLICATION INFORMATION 1995 Sep 05 AFC VP TDA9806 20 1:1 VIF input 50 Ω 2 3 4 5 n.c. n.c. n.c. 6 1 5 TOP 2 4 22 kΩ 3 390 Ω 8 9 n.c. n.c. n.c. n.c. 5.6 kΩ Rx (1) loop filter AF output CVBS 220 nF 10 nF 22 µF C DEC MHA058 Preliminary specification Fig.10 Test circuit. TDA9806 (1) See note 18 of Chapter “Characteristics”. 7 handbook, full pagewidth 1 100 nF 22 kΩ 10 nF n.c. n.c. n.c. 32 31 30 VIF AGC 29 2.2 µF 28 GND 27 26 25 10 nF 330 Ω 8.2 pF Cref 2.2 µF FM mute switch video output 5.5 MHz 15 µH 24 5.6 kΩ 560 Ω tuner AGC Philips Semiconductors 22 kΩ Multistandard VIF-PLL and FM-PLL demodulator 1995 Sep 05 intercarrier output AFC VP n.c. 23 22 21 20 19 18 17 10 11 12 13 14 15 16 21 TDA9806 1 2 3 4 5 n.c. n.c. n.c. 6 TOP SWIF G1962 50 Ω (1) 9 n.c. n.c. n.c. AF output loop filter 220 nF 22 µF C DEC MHA059 Preliminary specification Fig.11 Application circuit. Rx (2) 10 nF CVBS n.c. 5.6 kΩ TDA9806 (1) Depends on standard. (2) See note 18 of Chapter “Characteristics”. 22 kΩ 390 Ω 8 handbook, full pagewidth IF input 7 Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator TDA9806 PACKAGE OUTLINE SDIP32: plastic shrink dual in-line package; 32 leads (400 mil) SOT232-1 ME seating plane D A2 A A1 L c e Z (e 1) w M b1 MH b 17 32 pin 1 index E 1 16 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.7 0.51 3.8 1.3 0.8 0.53 0.40 0.32 0.23 29.4 28.5 9.1 8.7 1.778 10.16 3.2 2.8 10.7 10.2 12.2 10.5 0.18 1.6 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 92-11-17 95-02-04 SOT232-1 1995 Sep 05 EUROPEAN PROJECTION 22 Philips Semiconductors Preliminary specification Multistandard VIF-PLL and FM-PLL demodulator TDA9806 The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. 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Box 218, 5600 MD EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-724825 (from 10-10-1995: +31-40-2724825) SCD41 © Philips Electronics N.V. 1995 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 533061/1500/01/pp24 Document order number: Date of release: 1995 Sep 05 9397 750 00307