INTEGRATED CIRCUITS DATA SHEET TDA9819 Multistandard vision and sound-IF PLL with DVB-IF processing Product specification Supersedes data of 1996 Aug 02 File under Integrated Circuits, IC02 1998 Jul 14 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing FEATURES DVB functions • 5 V supply voltage • Gain controlled IF-amplifier • Applicable for IF frequencies of 38.9 MHz and 45.75 MHz • Mixer for DVB-IF • Two switched VIF inputs, gain controlled wide band VIF-amplifier (AC-coupled) • External VCO control for DVB TDA9819 • VCO for QAM carrier recovery • Internal and external AGC for DVB • True synchronous demodulation with active carrier regeneration (very linear demodulation, good intermodulation figures, reduced harmonics and excellent pulse response) • DVB output level adjust via AGC adjust • High level DVB operational output amplifier. • VCO frequency switchable between TV (M or BG/L) IF-picture carrier and Digital Video Broadcast (DVB) frequency GENERAL DESCRIPTION The TDA9819 is an integrated circuit for multistandard vision and sound-IF signal processing with single reference PLL demodulator combined with the signal stages for DVB-IF processing. • Separate video amplifier for sound trap buffering with high video bandwidth • VIF AGC detector for gain control, operating as peak sync detector for M and B/G and peak white detector for L; controlled reaction time for L • Tuner AGC with adjustable takeover point (TOP) • AFC detector without extra reference circuit • SIF input for single reference QSS mode (PLL controlled); SIF AGC detector for gain controlled SIF amplifier; single reference QSS mixer able to operate in high performance single reference QSS mode • AC-coupled limiter amplifier for sound intercarrier signal • Alignment-free FM-PLL demodulator with high linearity • AM demodulator without extra reference circuit • Stabilizer circuit for ripple rejection and to achieve constant output signals. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA9819 TDA9819T 1998 Jul 14 SDIP32 SO32 DESCRIPTION VERSION plastic shrink dual in-line package; 32 leads (400 mil) SOT232-1 plastic small outline package; 32 leads; body width 7.5 mm SOT287-1 2 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VP supply voltage 4.5 5.0 5.5 V IP supply current 81 100 121 mA Vi VIF(rms) vision IF input signal voltage sensitivity (RMS value) − 60 100 µV Vo CVBS(p-p) CVBS output signal voltage (peak-to-peak value) 1.7 2.0 2.3 V 7 8 − MHz 56 60 − dB B (M, BG/L) −3 dB video bandwidth on pin 10 −1 dB video at output M, B/G and L standard; CL < 20 pF; RL > 1 kΩ; AC load S/N (W) weighted signal-to-noise ratio for video α1.1 intermodulation attenuation at ‘blue’ f = 1.1 MHz 58 64 − dB α3.3 intermodulation attenuation at ‘blue’ f = 3.3 MHz 58 64 − dB αH suppression of harmonics in video signal 35 40 − dB Vi SIF(rms) sound-IF input signal voltage sensitivity (RMS value) −3 dB at intercarrier output − 70 100 µV Vo(rms) audio output signal voltage for FM (RMS value) M and B/G standard; − 25 kHz frequency deviation 0.5 − V audio output signal voltage for AM (RMS value) L standard; 54% modulation − 0.5 − V 0.15 0.5 % − 0.5 1.0 % FM 25 kHz frequency deviation − 60 − dB AM 54% modulation 53 − dB THD S/N (W) 1998 Jul 14 total harmonic distortion FM 25 kHz frequency deviation − AM 54% modulation weighted signal-to-noise ratio 3 47 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 19 28 TUNER AGC 3 VIF-AGC 15 input/DVB switch 13 23 25 24 11 VCO TWD 21 video 1 V (p-p) 18 DVB 2 V (p-p) 10 CVBS 2 V (p-p) 30 A VIF DEMODULATOR/ DVB MIXER 2 4 DVB 16 VCO adjust FPLL 1 VIF 7 AFC DETECTOR DVB AGC TDA9819 (1) loop filter AFC 2fPC B VIF SWITCH 5 4 LOGIC 31 SIF AM DEMODULATOR 32 SIF MIXER 22 IF-filter INTERNAL VOLTAGE STABILIZER 29 27 SIF-AGC video buffer 12 AF FM DETECTOR (PLL) 26 8 1/2 VP 9 CSAGC 17 20 14 CAF 4.5/5.5 VP (+5 V) Philips Semiconductors 6 DVB external VCO control Multistandard vision and sound-IF PLL with DVB-IF processing tuner AGC DVB AGC external BLOCK DIAGRAM 1998 Jul 14 DVB CVAGC CBL AGC adjust TOP handbook, full pagewidth MBH352 standard (1) switch Fig.1 Block diagram. TDA9819 (1) See switch logic Table 2. AF mute Product specification QSS intercarrier output Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 PINNING SYMBOL PIN DESCRIPTION Vi VIF1 1 VIF differential input signal voltage 1 Vi VIF2 2 VIF differential input signal voltage 2 CBL 3 black level detector Vi VIF3 4 VIF differential input signal voltage 3 Vi VIF4 5 VIF differential input signal voltage 4 TADJ 6 tuner AGC takeover adjust (TOP) TPLL 7 PLL loop filter CSAGC 8 SIF AGC capacitor STD 9 standard switch input Vo CVBS 10 2 V CVBS output signal voltage VCOADJ 11 VCO adjust BG/L/M Vo AF 12 VAGC(ext) handbook, halfpage Vi VIF1 1 32 Vi SIF2 Vi VIF2 2 31 Vi SIF1 CBL 3 30 INSWI Vi VIF3 4 29 VP Vi VIF4 5 28 CVAGC audio voltage frequency output TADJ 6 27 GND 13 external AGC voltage (DVB) TPLL 7 26 Cref CAF 14 AF decoupling capacitor CSAGC 8 AGCADJ 15 AGC adjust (DVB) VVCO(ext) 16 external VCO control voltage (DVB) Vi FM 17 sound intercarrier input DVB 18 DVB output TAGC 19 tuner AGC output Vo QSS 20 single reference QSS output voltage Vo(vid) 21 composite video output voltage Vi(vid) 22 video buffer input voltage AFC 23 AFC output VCO1 24 VCO1 reference circuit for 2fPC VCO2 25 VCO2 reference circuit for 2fPC Cref 26 1⁄ 2VP STD 9 24 VCO1 Vo CVBS 10 23 AFC VCOADJ 11 22 Vi(vid) Vo AF 12 21 Vo(vid) VAGC(ext) 13 20 Vo QSS CAF 14 19 TAGC 18 DVB AGCADJ 15 VVCO(ext) 16 17 Vi FM MBH354 reference capacitor GND 27 ground CVAGC 28 VIF AGC capacitor VP 29 supply voltage (+5 V) INSWI 30 VIF input switch Vi SIF1 31 SIF differential input signal voltage 1 Vi SIF2 32 SIF differential input signal voltage 2 1998 Jul 14 25 VCO2 TDA9819 Fig.2 Pin configuration (SDIP32). 5 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 FUNCTIONAL DESCRIPTION VCO, Travelling Wave Divider (TWD) and AFC Vision IF amplifier and input switch The VCO operates with a resonance circuit (with L and C in parallel) at double the PC frequency. The VCO is controlled by two integrated variable capacitors. The control voltage required to tune the VCO from its free-running frequency to actually double the PC frequency is generated by the frequency phase detector (FPLL) and fed via the loop filter to the first variable capacitor. This control voltage is amplified and converted into a current which represents the AFC output signal. The VCO centre frequency can be decreased by activating an additional internal capacitor. With a variable resistor at VCOADJ (pin 11) the frequency for the M, B/G and L mode can be tuned to the picture carrier frequency. At centre frequency the AFC output current is equal to zero. The vision IF amplifier consists of three AC-coupled differential amplifier stages. Each differential stage comprises a feedback network controlled by emitter degeneration to control the IF gain. The first differential stage is extended by two pairs of emitter followers to provide two IF input channels. The VIF input can be selected by pin 30. Tuner and VIF AGC The AGC capacitor voltage is transferred to an internal IF control signal, and is fed to the tuner AGC to generate the tuner AGC output current (open-collector output). The tuner AGC takeover point can be adjusted. This allows the tuner and the SWIF filter to be matched to achieve the optimum IF input level. The oscillator signal is divided-by-two with a TWD which generates two differential output signals with a 90 degree phase difference independent of the frequency. The AGC detector charges/discharges the AGC capacitor to the required voltage for setting of VIF and tuner gain in order to keep the video signal at a constant level. Therefore for negative video modulation the sync level and for positive video modulation the peak white level of the video signal is detected. In order to reduce the reaction time for positive modulation, where a very large time constant is needed, an additional level detector increases the discharging current of the AGC capacitor (fast mode) in the event of a decreasing VIF amplitude step. The additional level information is given by the black-level detector voltage. Video demodulator and amplifier The video demodulator is realized by a multiplier which is designed for low distortion and large bandwidth. The vision IF input signal is multiplied with the ‘in phase’ signal of the travelling wave divider output. In the demodulator stage the video signal polarity can be switched in accordance with the TV standard. The demodulator output signal is fed via an integrated low-pass filter for attenuation of the carrier harmonics to the video amplifier. The video amplifier is realized by an operational amplifier with internal feedback and high bandwidth. A low-pass filter is integrated to achieve an attenuation of the carrier harmonics for M, B/G and L standard. The standard dependent level shift in this stage delivers the same sync level for positive and negative modulation. The video output signal is 1 V (p-p) for nominal vision IF modulation. Frequency Phase Locked Loop detector (FPLL) The VIF-amplifier output signal is fed into a frequency detector and into a phase detector via a limiting amplifier. During acquisition the frequency detector produces a DC current proportional to the frequency difference between the input and the VCO signal. After frequency lock-in the phase detector produces a DC current proportional to the phase difference between the VCO and the input signal. The DC current of either frequency detector or phase detector is converted into a DC voltage via the loop filter, which controls the VCO frequency. In the event of positive modulated signals the phase detector is gated by composite sync in order to avoid signal distortion for overmodulated VIF signals. 1998 Jul 14 Video buffer For an easy adaption of the sound traps an operational amplifier with internal feedback is used in the event of M, B/G and L standard. This amplifier is featured with a high bandwidth and 7 dB gain. The input impedance is adapted for operating in combination with ceramic sound traps. The output stage delivers a nominal 2 V (p-p) positive video signal. Noise clipping is provided. 6 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 SIF amplifier and AGC FM detector The sound IF amplifier consists of two AC-coupled differential amplifier stages. Each differential stage comprises a controlled feedback network provided by emitter degeneration. The FM detector consists of a limiter, an FM-PLL and an AF amplifier. The limiter provides the amplification and limitation of the FM sound intercarrier signal before demodulation. The result is high sensitivity and AM suppression. The amplifier consists of 7 stages which are internally AC-coupled in order to minimize the DC offset and to save pins for DC decoupling. The SIF AGC detector is related to the SIF input signals (average level of AM or FM carriers) and controls the SIF amplifier to provide a constant SIF signal to the AM demodulator and single reference QSS mixer. The SIF AGC reaction time is set to ‘slow’ for nominal video conditions. But with a decreasing VIF amplitude step the SIF AGC is set to ‘fast’ mode controlled by the VIF AGC detector. In FM mode this reaction time is also set to ‘fast’ controlled by the standard switch. The FM-PLL consists of an integrated relaxation oscillator, an integrated loop filter and a phase detector. The oscillator is locked to the FM intercarrier signal, output from the limiter. As a result of locking, the oscillator frequency tracks with the modulation of the input signal and the oscillator control voltage is superimposed by the AF voltage. The FM-PLL operates as an FM-demodulator. Single reference QSS mixer The AF amplifier consists of two parts: The single reference QSS mixer is realized by a multiplier. The SIF amplifier output signal is fed to the single reference QSS mixer and converted to intercarrier frequency by the regenerated picture carrier (VCO). The mixer output signal is fed via a high-pass for attenuation of the video signal components to the output pin 20. With this system a high performance hi-fi stereo sound processing can be achieved. 1. The AF preamplifier for FM sound is an operational amplifier with internal feedback, high gain and high common mode rejection. The AF voltage from the PLL demodulator, by principle a small output signal, is amplified by approximately 30 dB. The low-pass characteristic of the amplifier reduces the harmonics of the intercarrier signal at the sound output terminal. An additional DC control circuit is implemented to keep the DC level constant, independent of process spread. For a simplified application without a sound-IF SAW filter the single reference QSS mixer can be switched to the intercarrier mode by connecting pins 31 and 32 to ground (see note 18 of Chapter “Characteristics”). 2. The AF output amplifier (10 dB) provides the required output level by a rail-to-rail output stage. This amplifier makes use of an input selector for switching to AM/FM or mute state, controlled by the standard switching voltage and the mute switching voltage. In this mode the sound-IF passes the VIF SAW filter and the composite IF signal is fed to the single reference QSS mixer. This IF signal is multiplied by the 90° TWD output signal for converting the sound-IF to intercarrier frequency. By using this quadrature detection, the low frequency video signals are removed. Internal voltage stabilizer and 1⁄2VP reference The band gap circuit internally generates a voltage of approximately 1.25 V, independent of supply voltage and temperature. A voltage regulator circuit, connected to this voltage, produces a constant voltage of 3.6 V which is used as an internal reference voltage. Due to the sound-IF attenuation in the VIF filter (sound shelf), the audio signal-to-noise (S/N) figure decreases. AM demodulator For all audio output signals the constant reference voltage cannot be used because large output signals are required. Therefore these signals refer to half the supply voltage to achieve a symmetrical headroom, especially for the rail-to-rail output stage. For ripple and noise attenuation the 1⁄2VP voltage has to be filtered via a low-pass filter by using an external capacitor together with an integrated resistor (fg = 5 Hz). For a fast setting to 1⁄2VP an internal start-up circuit is added. The AM demodulator (French L standard) is realized by a multiplier. The modulated SIF amplifier output signal is multiplied in phase with the limited (AM is removed) SIF amplifier output signal. The demodulator output signal is fed via an integrated low-pass filter for attenuation of the carrier harmonics to the AF amplifier. 1998 Jul 14 7 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 The DVB output signal VO DVB can be adjusted in a range of ±3 dB by a control voltage ∆Vadj at pin 15. The internal AGC can be switched off (see Table 2) and the IF gain can be controlled by an external voltage at pin 13. The tuner AGC is active in both instances. DVB mixer The VCO can be controlled by an external DC signal to provide a carrier for the down-conversion of the DVB-IF signal. The VCO frequency as a function of the voltage at pin 16 is given in Figs 10 and 11. DVB output buffer DVB AGC The output buffer for the DVB signal has a high bandwidth and 0 dB gain. An inverting configuration was chosen to obtain minimum distortion. For non-DVB standards the buffer is switched to a mute to reduce the output signal level. For the DVB operation a peak AGC detector is activated. The peak value of (digital) QAM signal is detected and controlled to a constant value by the variable VIF amplifier. The detector bandwidth is adapted to the signal frequency (3 to 11 MHz). The external AGC time constant is given by the VIF AGC capacitor at pin 28. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT maximum chip temperature of 125 °C; 0 note 1 7.0 V voltage at pins 1 to 9, 11 to 13, 15, 16, 19, 22, 23 and 28 to 32 0 VP V tsc(max) maximum short-circuit time − 10 s VP supply voltage (pin 29) Vn V19 tuner AGC output voltage 0 13.2 V Tstg storage temperature −25 +150 °C Tamb operating ambient temperature −20 +70 °C Ves electrostatic handling voltage −300 +300 V note 2 Notes 1. IP = 125 mA; Tamb = 70 °C; Rth(j-a) = 60 K/W. 2. Machine model class B. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) 1998 Jul 14 PARAMETER CONDITIONS thermal resistance from junction to ambient in free air 8 VALUE UNIT 60 K/W Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 CHARACTERISTICS VP = 5 V; Tamb = 25 °C; see Table 1 for input frequencies and level; input level Vi IF1-2, 4-5 = 10 mV RMS value (sync-level for M and B/G, peak white level for L); video modulation DSB; residual carrier M and B/G: 10%; L = 3%; video signal in accordance with “CCIR, line 17”; measurements taken in Fig.12; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply (pin 29) VP supply voltage IP supply current note 1 4.5 5.0 5.5 V M, B/G and L standard 89 105 121 mA DVB 81 96 111 mA Vision IF amplifier (pins 1, 2, 4 and 5) Vi VIF(rms) input signal voltage sensitivity (RMS value) M, B/G and L standard; −1 dB video at output − 60 90 µV Vi max(rms) maximum input signal voltage (RMS value) M, B/G and L standard; +1 dB video at output 140 200 − mV ∆Vo(int) internal IF amplitude difference between picture and sound carrier within AGC range; ∆f = 5 MHz − 0.7 1 dB GIF IF gain control range see Fig.3 65 70 − dB Ri(diff) differential input resistance note 2; input activated 1.7 2.2 2.7 kΩ Ci(diff) differential input capacitance note 2; input activated 1.2 1.7 2.5 pF V1, 2, 4, 5 DC input voltage note 2; input activated − 3.3 − V Ri input resistance to ground note 2; input not activated − 1.1 − kΩ V1, 2, 4, 5 DC input voltage note 2; input not activated − 0.2 − V αi IF crosstalk attenuation of IF input switch at pins 1, 2, 4 and 5 notes 2 and 3 55 60 − dB True synchronous video demodulator; note 4 fVCO(max) maximum oscillator frequency for f = 2fPC carrier regeneration 125 130 − MHz ∆f osc ------------∆T oscillator drift as a function of temperature − − ±20 ppm/K V0 ref(rms) oscillator voltage swing between pins 24 and 25 (RMS value) − 60 − mV fPC CR vision carrier capture range M standard ±1.0 ±1.25 − MHz B/G and L standard ±1.35 ±1.6 − MHz ±150 ±300 kHz free-running oscillator; IAFC = 0; note 5 ∆fPC(fr) vision carrier frequency accuracy M standard (free-running) B/G and L standard − − ±200 ±400 kHz ∆fPC(alg) frequency alignment range IAFC = 0; M standard ±300 ±400 − kHz IAFC = 0; B/G and L standard ±400 ±600 − kHz tacq acquisition time BL = 70 kHz; note 6 − − 30 ms Vi VIF(rms) VIF input signal voltage sensitivity for PLL to be locked (RMS value; pins 1, 2, 4 and 5) maximum IF gain; note 7 − 60 90 µV 1998 Jul 14 9 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing SYMBOL IFPLL(offset) PARAMETER FPLL offset current at pin 7 TDA9819 CONDITIONS note 8 MIN. TYP. MAX. UNIT − − ±4.5 µA 0.88 1.0 1.12 V − 1.5 − V Composite video amplifier (pin 21; sound carrier off) Vo video(p-p) output signal voltage (peak-to-peak value) V21(sync) sync voltage level V21(clu) upper video clipping voltage level VP − 1.1 VP − 1 − V V21(cll) lower video clipping voltage level − 0.7 0.9 V Ro,21 output resistance − − 10 Ω Iint 21 internal DC bias current for emitter-follower 1.6 2.0 − mA I21 max(sink) maximum AC and DC output sink current 1.0 − − mA I21 max(source) maximum AC and DC output source current 2.0 − − mA B−1 −1 dB video bandwidth CL < 50 pF; RL > 1 kΩ; AC load 5 6 − MHz B−3 −3 dB video bandwidth CL < 50 pF; RL > 1 kΩ; AC load 7 8 − MHz αH suppression of video signal harmonics CL < 50 pF; RL > 1 kΩ; AC load; note 9 35 40 − dB PSRR power supply ripple rejection at pin 21 video signal; grey level; see Fig.9 M and B/G standard 32 35 − dB L standard 26 30 − dB see Fig.8 note 2 CVBS buffer amplifier (only) and noise clipper (pins 10 and 22) Ri,22 input resistance note 2 2.6 3.3 4.0 kΩ Ci,22 input capacitance note 2 1.4 2 3.0 pF VI,22 DC input voltage 1.5 1.8 2.1 V Gv voltage gain M, B/G and L standard; note 10 6.5 7 7.5 dB V10(clu) upper video clipping voltage level 3.9 4.0 − V − 1.0 1.1 V − − 10 Ω V10(cll) lower video clipping voltage level Ro,10 output resistance Iint 10 DC internal bias current for emitter-follower 2.0 2.5 − mA Io,10 max(sink) maximum AC and DC output sink current 1.4 − − mA Io,10 max(source) maximum AC and DC output source current 2.4 − − mA note 2 B−1 −1 dB video bandwidth CL < 20 pF; RL > 1 kΩ; AC load 8.4 11 − MHz B−3 −3 dB video bandwidth CL < 20 pF; RL > 1 kΩ; AC load 11 14 − MHz 1998 Jul 14 10 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing SYMBOL PARAMETER TDA9819 CONDITIONS MIN. TYP. MAX. UNIT Measurements from IF input to CVBS output (pin 10; 330 Ω between pins 21 and 22, sound carrier off) Vo CVBS(p-p) CVBS output signal voltage on pin 10 (peak-to-peak value) note 10 1.7 2.0 2.3 V Vo CVBS(sync) sync voltage level M and B/G standard − 1.35 − V L standard − 1.35 − V deviation of CVBS output signal voltage at M and B/G standard 50 dB gain control − − 0.5 dB 30 dB gain control − − 0.1 dB ∆Vo(blBG) black level tilt in M and B/G standard gain variation; note 11 − − 1 % ∆Vo(blL) black level tilt for worst case in L standard vision carrier modulated by test line (VITS) only; gain variation; note 11 − − 1.9 % Gdiff differential gain “CCIR, line 330” − 2 5 % ϕdiff differential phase “CCIR, line 330” − 1 2 deg B−1 −1 dB video bandwidth CL < 20 pF; RL > 1 kΩ; AC load; M, B/G and L standard 5 6 − MHz B−3 −3 dB video bandwidth CL < 20 pF; RL > 1 kΩ; AC load; M, B/G and L standard 7 8 − MHz S/N (W) weighted signal-to-noise ratio see Fig.5 and note 12 56 60 − dB S/N unweighted signal-to-noise ratio see Fig.5 and note 12 49 53 − dB IMα1.1 intermodulation attenuation at ‘blue’ f = 1.1 MHz; see Fig.6 and note 13 58 64 − dB intermodulation attenuation at ‘yellow’ f = 1.1 MHz; see Fig.6 and note 13 60 66 − dB intermodulation attenuation at ‘blue’ f = 3.3 MHz; see Fig.6 and note 13 58 64 − dB intermodulation attenuation at ‘yellow’ f = 3.3 MHz; see Fig.6 and note 13 59 65 − dB αc(rms) residual vision carrier (RMS value) fundamental wave and harmonics; M, B/G and L standard − 2 10 mV αH(sup) suppression of video signal harmonics note 9 35 40 − dB αH(spur) spurious elements note 14 40 − − dB PSRR power supply ripple rejection at pin 10 video signal; grey level; see Fig.9 M and B/G standard 25 28 − dB L standard 20 23 − dB ∆Vo IMα3.3 1998 Jul 14 11 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing SYMBOL PARAMETER TDA9819 CONDITIONS MIN. TYP. MAX. UNIT VIF-AGC detector (pin 28) charging current M, B/G and L standard; note 11 0.75 1 1.25 mA additional charging current L standard in event of missing VITS pulses and no white video content 1.9 2.5 3.1 µA discharging current M and B/G standard 15 20 25 µA normal mode L 225 300 375 nA fast mode L 30 40 50 µA AGC response to an increasing VIF step M, B/G and L standard; note 15 − − 0.1 ms/dB AGC response to a decreasing VIF step M and B/G standard − 2.2 3.5 ms/dB fast mode L − 1.1 1.8 ms/dB normal mode L; note 15 − 150 240 ms/dB −2 −6 −10 dB L standard − 1.95 − V L standard; fast mode L − 1.65 − V IF input signal voltage for minimum starting point of tuner takeover (RMS value) input at pins 1, 2, 4 and 5; RTOP = 22 kΩ; I19 = 0.4 mA − 2 5 mV IF input signal voltage for maximum starting point of tuner takeover (RMS value) input at pins 1, 2, 4 and 5; RTOP = 0 Ω; I19 = 0.4 mA 50 100 − mV Vo,19 permissible output voltage from external source; note 2 − − 13.2 V Vsat,19 saturation voltage I19 = 1.5 mA − − 0.2 V ∆V TOP ,19 -----------------------∆T variation of takeover point by temperature I19 = 0.4 mA − 0.03 0.07 dB/K I19(sink) sink current see Fig.3 no tuner gain reduction; V19 = 13.2 V − − 5 µA maximum tuner gain reduction 1.5 2 2.6 mA − 6 8 dB I28 tresp ∆IF VIF amplitude step for activating fast AGC mode L standard V3(th) threshold voltage level additional charging current see Fig.8 Tuner AGC (pin 19) Vi(rms) ∆GIF 1998 Jul 14 IF slip by automatic gain control tuner gain current from 20 to 80% 12 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing SYMBOL PARAMETER TDA9819 CONDITIONS MIN. TYP. MAX. UNIT AFC circuit (pin 23); see Fig.7 and note 16 SUSA control steepness ∆I23/∆f SEUR f0 = 45.75 MHz; see Fig.12 and note 17 0.6 0.91 1.2 µA/kHz f0 = 38.9 MHz; see Fig.12 and note 17 0.5 0.72 1.0 µA/kHz − ±20 ppm/K ∆f IF --------∆T frequency variation by temperature IAFC = 0; note 5 − Vo,23 output voltage upper limit see Fig.7 VP − 0.6 VP − 0.3 − output voltage lower limit see Fig.7 − 0.3 0.6 V Io,23(source) output source current 150 200 250 µA Io,23(sink) output sink current 150 200 250 µA ∆I23(p-p) residual video modulation current (peak-to-peak value) M, B/G and L standard − 20 30 µA FM mode; −3 dB at intercarrier output pin 20 − 40 70 µV AM mode; −3 dB at AF output pin 12 − 80 110 µV FM mode; +1 dB at intercarrier output pin 20 40 80 − mV AM mode; +1 dB at AF output pin 12 100 160 − mV V Sound IF amplifier (pins 31 and 32); note 18 Vi SIF(rms) Vi max(rms) input signal voltage sensitivity (RMS value) maximum input signal voltage (RMS value) GSIFcr SIF gain control range FM and AM mode; see Fig.4 59 64 − dB Ri(diff) differential input resistance note 2 1.7 2.2 2.7 kΩ Ci(diff) differential input capacitance note 2 1.2 1.7 2.5 pF VI(31,32) DC input voltage − 3.4 − V αSIF,VIF crosstalk attenuation between SIF and VIF input 50 − − dB between pins 1, 2, 4 and 5 and pins 31 and 32; notes 2 and 3 SIF-AGC detector (pin 8) I8 charging current discharging current 1998 Jul 14 FM mode 8 12 16 µA AM mode 0.8 1.2 1.6 µA FM mode 8 12 16 µA normal mode AM 1 1.4 1.8 µA fast mode AM 60 85 110 µA 13 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing SYMBOL PARAMETER TDA9819 CONDITIONS MIN. TYP. MAX. UNIT Single reference QSS intercarrier mixer (M and B/G standard; pin 20); note 18 Vo(rms) IF intercarrier level (RMS value) SC1; sound carrier 2 off 75 100 125 mV B−3 −3 dB intercarrier bandwidth upper limit 7.5 9 − MHz αSC(rms) residual sound carrier (RMS value) fundamental wave and harmonics − 2 − mV Ro,20 output resistance note 2 − 10 20 Ω VO,20 DC output voltage − 2.0 − V Iint 20 DC internal bias current for emitter-follower 1.5 1.9 − mA I20 max(sink) maximum AC and DC output sink current 1.1 1.5 − mA I20 max(source) maximum AC and DC output source current 3.0 3.5 − mA − − 100 µV − 300 400 µV 200 − − mV 480 600 720 Ω − 2.7 − V upper limit 7.0 − − MHz lower limit − − 4.0 MHz Limiter amplifier (pin 17); note 19 Vi FM(rms) input signal voltage for lock-in (RMS value) Vi FM(rms) input signal voltage (RMS value) S+N -------------- = 40 dB N allowed input signal voltage (RMS value) R17 input resistance V17 DC input voltage note 2 FM-PLL detector fi FM(catch) fi FM(hold) tacqu 1998 Jul 14 catching range of PLL holding range of PLL upper limit 9.0 − − MHz lower limit − − 3.0 MHz − − 4 µs acquisition time 14 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing SYMBOL PARAMETER TDA9819 CONDITIONS MIN. TYP. MAX. UNIT FM operation (M and B/G standard) (pin 12); note 19 Vo AF12(rms) AF output signal voltage (RMS value) without de-emphasis; 25 kHz; see Fig.12 and note 20 Rx = 470 Ω 200 250 300 mV Rx = 0 Ω 400 500 600 mV Vo AF12(cl)(rms) AF output clipping signal voltage level (RMS value) THD < 1.5% 1.3 1.4 − V ∆fAF frequency deviation THD < 1.5%; note 20 − − ±53 kHz ∆Vo temperature drift of AF output signal voltage − 3 7 10−3 dB/K V14 DC voltage at decoupling capacitor voltage dependent on VCO frequency; note 21 1.2 − 3.0 V R12 output resistance note 2 − − 100 Ω − 1⁄ V 2 P − V V12 DC output voltage I12(max)(sink) maximum AC and DC output sink current − − 1.1 mA I12(max)(source) maximum AC and DC output source current − − 1.1 mA B−3 −3 dB AF bandwidth 100 125 − kHz tracked with supply voltage without de-emphasis THD total harmonic distortion − 0.15 0.5 % S/N (W) weighted signal-to-noise ratio FM-PLL only; with 75 µs de-emphasis; 25 kHz; “CCIR 468-4” 55 60 − dB αc(rms) residual sound carrier (RMS value) fundamental wave and harmonics − − 75 mV αAM AM suppression 75 µs de-emphasis; AM: f = 1 kHz; m = 0.3 referenced to 25 kHz 45 50 − dB α12 mute attenuation of AF signal 68 73 − dB I17(mute) current output from pin 17 AF signal muted 200 300 600 µA ∆V12 DC jump voltage of AF output terminal for switching AF output to mute state and vice versa FM-PLL in lock mode − ±50 ±150 mV PSRR power supply ripple rejection at pin 12 M standard; see Fig.9 26 30 − dB B/G standard; see Fig.9 20 24 − dB 1998 Jul 14 15 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing SYMBOL PARAMETER TDA9819 CONDITIONS MIN. TYP. MAX. UNIT Single reference QSS AF performance for FM operation (M standard); see Table 1 and notes 20 and 22 to 24; sound attenuation of VIF SAW filter: minimum 33 dB S/N (W) weighted signal-to-noise ratio 40 − − dB black picture 51 56 − dB white picture 50 53 − dB colour bar 48 51 − dB PC/SC ratio at pins 1 and 2; 25 kHz FM deviation; 75 µs de-emphasis; “CCIR 468-4” Single reference QSS AF performance for FM operation (B/G standard); see Table 1 and notes 20 and 22 to 24; sound attenuation of VIF filter: minimum 27 dB S/N (W) weighted signal-to-noise ratio (SC1/SC2) PC/SC ratio at pins 1 and 2; 27 kHz; “CCIR 468-4”; 50 µs de-emphasis 40 − − dB black picture 53/48 58/55 − dB white picture 52/46 55/53 − dB 6 kHz sine wave (black to white modulation) 44/42 48/46 − dB AM operation (L standard; pin 12); note 25 Vo AF 12(rms) AF output signal voltage (RMS value) 54% modulation 400 500 600 mV THD total harmonic distortion 54% modulation − 0.5 1.0 % B−3 −3 dB AF bandwidth 100 125 − kHz S/N (W) weighted signal-to-noise ratio “CCIR 468-4” 47 53 − dB V12 DC potential voltage tracked with supply voltage − 1⁄ V 2 P − V PSRR power supply ripple rejection see Fig.9 22 25 − dB Standard switch (pin 9); see also Table 2 V9 DC potential for settings VIH HIGH-level input voltage 1.3 − VP V VIL LOW-level input voltage 0 − 0.8 V IIL LOW-level input current 85 110 135 µA 1.3 − VP V V9 = 0 V VIF input/DVB switch (pin 30); see also Table 2 V30 DC potential for settings VIH HIGH-level input voltage VIL LOW-level input voltage IIL LOW-level input current V30 = 0 V 0 − 0.8 V 180 230 280 µA 0 1 2 V VCO adjust (pin 11) V11 1998 Jul 14 DC potential for VCO frequency adjust 16 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing SYMBOL PARAMETER TDA9819 CONDITIONS MIN. TYP. MAX. UNIT VIF amplifier (measured at fIF = 43.75 MHz; DVB mode) V4-5(rms) input sensitivity (RMS value) −1 dB αAM signal at output − 200 − µV V4-5(rms) maximum input signal (RMS value) +1 dB αAM signal at output − 200 − mV ∆G total gain control IF amplifier 52 58 − dB tilt for ∆f ±3 MHz fs = 6.9 MHz; 40 dB gain − 0.5 1 dB R4-5(diff) input resistance (differential) note 2 − 2.2 − kΩ C4-5(diff) input capacitance (differential) note 2 − 1.7 − pF DVB mixer and VCO fVCO maximum oscillator frequency V0 ref(rms) oscillator voltage swing between pins 24 and 25 (RMS value) ∆ϕSSB VCO phase noise at f = 100 kHz V16 VCO control range Ri,16 VCO control input resistance SVCO control steepness ∆fs/∆V16 125 130 − MHz − 60 − mV free-running 103 107 − dBc/Hz see Figs 10 and 11 0 − VP V 50 63 76 kΩ 2(fIF + fs) see Figs 10 and 11 DVB (USA) − 0.29 − MHz/V DVB (EUROPE) − 0.40 − MHz/V DVB output buffer VO DVB(p-p) DVB output signal (QAM) (peak-to-peak value) 1.8 2.1 2.4 V Iint 18 DC internal bias current for emitter-follower 1.9 2.3 2.7 mA I18 max(sink) maximum AC and DC output sink current 1.5 − − mA I18 max(source) maximum AC and DC output source current 2.0 − − mA response to an increasing amplitude step in the IF input signal − 0.25 0.1 ms/dB response to a decreasing amplitude step in the IF input signal − 0.25 − ms/dB charging current − 200 − µA DVB AGC detector tresp I28 discharging current − 200 − µA V15 AGC adjust input voltage range 1 2.5 4.5 V Ri,15 AGC adjust input resistance 8 10 12 kΩ Sadj AGC adjust steepness 2 V < V15 < 3 V − −5 − dB/V V13 external AGC voltage for DVB see Fig.3 1 − 4.5 V Ri,13 external AGC input resistance 40 − − kΩ 1998 Jul 14 17 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing SYMBOL PARAMETER TDA9819 CONDITIONS MIN. TYP. MAX. UNIT AFC circuit (DVB mode) SUS control steepness ∆I23/∆f SEU f0 = 48.75 MHz; see Fig.12 and note 17 0.7 0.98 1.3 µA/kHz f0 = 43.0 MHz; see Fig.12 and note 17 0.45 0.70 0.95 µA/kHz CL < 15 pF; RL > 5 kΩ; with internal AGC 1.8 2.1 2.4 V − 2.5 − V 11 12 − MHz DVB output signal (IF input to DVB output) V18(p-p) output voltage (peak-to-peak value) V18DC DC voltage B −1 dB bandwidth CL < 15 pF; RL > 5 kΩ −3 dB bandwidth − 17 − MHz αC(DVB) fundamental input signal and IF harmonics 35 40 − dB αH suppression of in-band harmonics 30 35 − dB 2.0 V (p-p) output voltage Notes to the characteristics 1. Values of video and sound parameters are decreased at VP = 4.5 V. 2. This parameter is not tested during production and is only given as application information for designing the television receiver. 3. Source impedance: 2.3 kΩ in parallel to 12 pF (SAW filter); fIF = 45 MHz. 4. Loop filter 330 Ω/220 nF; loop bandwidth for M standard: BL ≈ 70 kHz (natural frequency fn ≈ 12 kHz; damping factor d ≈ 2.9; loop bandwidth for B/G and L standard: BL ≈ 80 kHz (natural frequency fn ≈ 13 kHz; damping factor d ≈ 3.2; calculated with sync level within gain control range). Resonance circuit of VCO: Q0 > 50; Cext and Cint see Fig.12. 5. Temperature coefficient of external LC-circuit is equal to zero. 6. Vi IF = 10 mV RMS; ∆f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture video modulation. 7. Vi IF signal for nominal video signal. 8. Offset current measured between pin 7 and half of supply voltage (VP = 2.5 V) under the following conditions: no input signal at VIF input (pins 1, 2, 4 and 5) and VIF amplifier gain at minimum (V28 = VP). Due to sample-and-hold mode of the FPLL in L standard, the leakage current of the loop filter capacitor (C = 220 nF) should not exceed 500 nA. 9. Measurements taken with SAW filter M3951M and M9352M (Siemens, M standard); frequency range = 10 kHz to 5 MHz. Sound carrier ON; PC/SC ratio 7 dB (transmitter); modulation VSB. 10. The 7 dB buffer gain accounts for 1 dB loss in the sound trap. Buffer output signal is typical 2 V (p-p), in event of CVBS video amplifier output typical 1 V (p-p). If no sound trap is applied a 330 Ω resistor must be connected from output to input (from pin 21 to pin 22). 11. The leakage current of the AGC capacitor should not exceed 1 µA at M and B/G standard respectively 10 nA current at L standard. Larger currents will increase the tilt. 12. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value, pin 10). B = 5 MHz weighted in accordance with “CCIR 567”. 1998 Jul 14 18 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 13. The intermodulation figures are defined: V 0 at 3.58 MHz α 0.92 = 20 log --------------------------------------- + 3.6dB ; α0.92 value at 0.92 MHz referenced to black/white signal; V 0 at 0.92 MHz V 0 at 3.58 MHz α 2.76 = 20 log --------------------------------------- ; α2.76 value at 2.76 MHz referenced to colour carrier. V 0 at 2.76 MHz 14. Sound carrier ON; SIF SAW filter L9453; fvideo = 10 kHz to 10 MHz. 15. Response speed valid for a VIF input level range of 200 µV up to 70 mV. 16. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is given in Fig.7. The AFC-steepness can be changed by the resistors at pin 23. 17. Depending on the ratio ∆C/C0 of the LC resonant circuit of VCO (Q0 > 50; C0 = Cint + Cext; see Fig.12). 18. The intercarrier mode can be activated by connecting the SIF input pins 31 and 32 to GND (only for negative modulation B/G and M standard). In this event the intercarrier level depends on the sound shelf of VIF SAW filter and the transmitter PC/SC ratio. 19. Input level for second IF from an external generator with 50 Ω source impedance. AC-coupled with 10 nF capacitor, fmod = 400 Hz, 25 kHz (50% FM deviation) of audio references. A VIF/SIF input signal is not permitted. Pins 8 and 28 have to be connected to positive supply voltage for minimum IF gain. S/N and THD measurements are taken at 75 µs de-emphasis. The FM demodulator steepness ∆Vo AF/∆fAF is negative. 20. Measured with an FM deviation of 25 kHz the typical AF output signal is 500 mV RMS (Rx = 0 Ω; see Fig.12). By using Rx = 470 Ω the AF output signal is attenuated by 6 dB (250 mV RMS). For handling an FM deviation of more than 53 kHz the AF output signal has to be reduced by using Rx in order to avoid clipping (THD < 1.5%). For an FM deviation up to 100 kHz an attenuation of 6 dB is recommended with Rx = 470 Ω. 21. The leakage current of the decoupling capacitor (2.2 µF) should not exceed 1 µA. 22. For all S/N measurements the used vision IF modulator has to meet the following specifications: Incidental phase modulation for black-to-white jump less than 0.5 degrees; QSS AF performance, measured with the television-demodulator AMF2 (audio output, weighted S/N ratio) better than 60 dB (deviation 25 kHz) for 6 kHz sine wave black-to-white video modulation. 23. The PC/SC ratio at pins 1 and 2 is calculated as the addition of TV transmitter PC/SC ratio and SAW filter PC/SC ratio. This PC/SC ratio is necessary to achieve the S/N(W) values as noted. A different PC/SC ratio will change these values. 24. Measurements for M standard with SAW filter M3951M (Siemens) for vision IF (suppressed sound carrier) and M9352M (Siemens) for sound IF (suppressed picture carrier). Input level Vi SIF = 10 mV RMS, 25 kHz FM deviation. Measurements for B/G standard with SAW filter G3962 (Siemens) for vision IF (suppressed sound carrier) and G9350 (Siemens) for sound IF (suppressed picture carrier). Input level Vi SIF = 10 mV RMS, 27 kHz (54% FM deviation). 25. Measurements taken with SAW filter L9453 (Siemens) for AM sound IF (suppressed picture carrier). 1998 Jul 14 19 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing Table 1 TDA9819 Input frequencies and carrier ratios DESCRIPTION SYMBOL B/G STANDARD M STANDARD − DVB (EU) DVB (US) UNIT 36.15/6.9 43.75/5.0 MHz Symbol frequency fIF/fs − Picture carrier fPC 38.9 45.75 38.9 − − MHz Sound carrier fSC1 33.4 41.25 32.4 − − MHz fSC2 33.158 − − − − MHz Picture-to-sound carrier ratio SC1 13 7 10 − − dB SC2 20 − − − − dB Table 2 − L STANDARD Switch logic STANDARD DVB M, B/G and L 1998 Jul 14 INPUT STANDARD SWITCH SWITCH MODULATIO N MODE AGC VIDEO OUTPUT VCO CONTROL IF INPUT AF M, B/G, L DVB 0 0 digital external external B mute off on 0 1 digital internal external B mute off on 1 0 positive internal PLL A AM on off 1 1 negative internal PLL A FM on off 20 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 MED682 - 1 70 handbook, full pagewidth gain 0.06 (dB) 60 VIF input (1/2 or 4/5) (mV RMS) 50 0.6 40 Ituner (mA) 0 30 (1) 6 (2) (3) (4) 20 1 10 60 0 2 −10 1 (1) Ituner; RTOP = 22 kΩ. (2) Gain. 1.5 2 2.5 3 3.5 4 V28 (V) 4.5 (3) Ituner; RTOP = 11 kΩ. (4) Ituner; RTOP = 0 Ω. Fig.3 Typical VIF and tuner AGC characteristic. MED683 - 1 110 handbook, full pagewidth 100 (dBµV) 100 SIF input (31,32) (mV RMS) 10 90 80 70 1 60 (1) (2) 50 0.1 40 30 0.01 20 1 1.5 2 2.5 3 (1) AM mode. (2) FM mode. Fig.4 Typical SIF AGC characteristic. 1998 Jul 14 21 3.5 4 V8 (V) 4.5 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 MED684 70 handbook, halfpage S/N (dB) 60 3.2 dB handbook, halfpage 10 dB 13.2 dB 50 13.2 dB 27 dB 40 27 dB 30 SC CC 20 PC SC CC BLUE 10 PC YELLOW MED685 - 1 0 60 40 0.06 0.6 20 0 20 Vi IF(rms) (dB) 60 600 Vi IF(rms) (mV) 6 10 Fig.5 SC = sound carrier, with respect to sync level. CC = chrominance carrier, with respect to sync level. PC = picture carrier, with respect to sync level. The sound carrier levels are taking into account a sound shelf attenuation of 20 dB (SAW filter G1962). Typical signal-to-noise ratio as a function of IF input voltage. handbook, full pagewidth VP VP = 5 V 22 kΩ TDA9819 23 I 23 22 kΩ Fig.6 Input signal conditions. V23 (V) I 23 (µA) 4.5 200 3.5 100 2.5 0 1.5 100 0.5 200 MBH355 (source current) (sink current) 38.5 38.9 39.3 f (MHz) Fig.7 Measurement conditions and typical AFC characteristic. 1998 Jul 14 22 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing handbook, 2.5halfpage V TDA9819 white level 1.8 V black level 1.5 V sync level B/G standard standard B/G white level 2.5 V threshold level 1.95 V black level 1.8 V threshold level 1.65 V sync level 1.5 V Lstandard standard L MED864 Fig.8 Typical video signal levels on output pin 21 (sound carrier off). handbook, full pagewidth VP = 5 V 100 mV (fripple = 70 Hz) VP = 5 V TDA9819 MBH356 t Fig.9 Ripple rejection condition. 1998 Jul 14 23 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 MBH357 100 handbook, full pagewidth (1) fVCO (MHz) (2) 96 (3) 92 (4) 88 0 1 2 3 4 L = 115 nH and C = 15 pF. (1) DVB. (2) f0 = 97.5 MHz. (3) M standard. (4) f0 = 91.5 MHz. Fig.10 VCO control characteristic for DVB (USA) and M standard. 1998 Jul 14 24 V16 (V) V7 (V) 5 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 MBH358 90 handbook, full pagewidth fVCO (MHz) (1) 86 (2) 82 (3) 78 (4) 74 0 1 3 2 4 V16 (V) V7 (V) L = 248 nH and C = 5.6 pF. (1) DVB. (2) f0 = 86.0 MHz. (3) B/G and L standard. (4) f0 = 77.8 MHz. Fig.11 VCO control characteristic for DVB (EUROPE), B/G and L standard. 1998 Jul 14 25 5 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 100 nF 1:1 50 Ω 1 5 2 4 560 Ω 22 kΩ 3 32 31 30 29 5.6 kΩ (3) L C7 2.2 µF Cref GND 28 4.5/5.5 MHz video output VIF/DVB input switch 2.2 µF VIF AGC tuner AGC 27 10 nF 330 Ω 25 26 DVBOUT 24 23 22 21 20 19 18 17 10 11 12 13 14 15 16 TDA9819 1 VIF input A 1:1 26 50 Ω 1 5 2 4 2 3 100 nF 4 CBL 5 6 TOP 22 kΩ 1:1 50 Ω 1 5 2 4 3 8 330 Ω loop filter 3 DVB input B 7 220 nF 9 2.2 µF 22 kΩ SIF AGC VP standard switch 10 µF CVBS DVB AGCexternal Rx (1) VCO adjust VP AFOUT (2) 75 Ω BC547 DVB AGCadjust 2.2 kΩ VCOcontrol AF mute Philips Semiconductors QSS output Multistandard vision and sound-IF PLL with DVB-IF processing 22 kΩ 10 nF SIF input TEST CIRCUIT idth 1998 Jul 14 AFC VP 22 µF CAF AFde-emphasis CD CVBS 220 Ω Product specification Fig.12 Test circuit. TDA9819 (1) See note 20 in Chapter “Characteristics”. (2) CD = 22 nF for 50 µs de-emphasis; CD = 33 nF for 75 µs de-emphasis. (3) See Table 3. MBH353 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing Table 3 TDA9819 Test circuit values PARAMETER EUROPE USA IF frequency 36.15/38.9 MHz 43.75/45.75 MHz VCO frequency 86.0/77.8 MHz 97.5/91.5 MHz Oscillator circuit fpage 24 (1) alfpage (2) (3) 24 (1) 25 (2) 25 MBH359 MBH359 (1) C(VCO) = 8.2/11.3 pF. (2) C7 = 5.6 pF. (3) L = 248 nH. Toko coil Philips ceramic capacitor 1998 Jul 14 (3) (1) C(VCO) = 8.2/11.3 pF. (2) C7 = 15 pF. (3) L = 115 nH. 5KM 369SNS - 2010Z 5KM 369SNS - 1647Z 2222 632 39478 2222 632 33129 27 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 INTERNAL PIN CONFIGURATIONS + + + 1 1.1 kΩ 5 kΩ 2.5 µA + + 1.1 kΩ 25 µA 3.6 V 3 2 2.65 V MGD641 MGD640 Fig.13 Pin 1; Vi VIF1 and pin 2; Vi VIF2. Fig.14 Pin 3; CBL. + 4 30 kΩ 1.1 kΩ 20 kΩ 5 kΩ + + 9 kΩ 1.1 kΩ 3.6 V 6 5 2.65 V 3.6 V 1.9 V MGD643 MGD642 Fig.15 Pin 4; Vi VIF3 and pin 5; Vi VIF4. 1998 Jul 14 Fig.16 Pin 6; TADJ. 28 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 + 50 kΩ + 7 VCO 5 µA + 39 µA 53 µA + + + 8 MGD644 MGD645 Fig.17 Pin 7; TPLL. Fig.18 Pin 8; CSAGC. + 26 kΩ + 6.4 kΩ 0.5 pF + 10 9 3.6 V 5.1 kΩ 0.2 pF 2.5 mA MGD647 MGD646 Fig.19 Pin 9; STD. 1998 Jul 14 Fig.20 Pin 10; Vo CVBS. 29 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 + 2.3 mA + 17 kΩ + + 9 kΩ 14.7 kΩ 12 25 pF 11 3.6 V 120 Ω MGD648 MGD649 Fig.21 Pin 11; VCOADJ. Fig.22 Pin 12; Vo AF. + + + 50 kΩ 13 14 MGD650 MGD651 Fig.23 Pin 13; VAGC(ext). Fig.24 Pin 14; CAF. + + 12 kΩ + 1.6 kΩ 15 50 kΩ 50 kΩ 16 10.1 kΩ 3.6 V VCO 12.5 kΩ 17.2 kΩ 2.7 V MGD652 MGD653 Fig.25 Pin 15; AGCADJ. 1998 Jul 14 Fig.26 Pin 16; VVCO(ext). 30 5 µA Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 10 kΩ + + + 10 µA 3.6 V 640 Ω 5.1 kΩ 3.9 kΩ 18 17 MGD654 40 kΩ 5.1 kΩ 40 kΩ 2.7 mA MGD655 10 pF Fig.27 Pin 17; Vi FM. Fig.28 Pin 18; DVB. + + 19 10 kΩ 20 1.6 kΩ 2.5 mA MGD656 1.9 mA Fig.29 Pin 19; TAGC. MGD657 Fig.30 Pin 20; Vo QSS. + 10 kΩ 2.1 pF 21 + 0.7 pF 2.0 mA 3.3 kΩ 50 kΩ 3.3 kΩ 2.2 kΩ 2 kΩ 22 20 kΩ 10 pF MGD659 MGD658 3.6 V Fig.31 Pin 21; Vo(vid). 1998 Jul 14 Fig.32 Pin 22; Vi(vid). 31 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 + 420 Ω + 24 2 × 10 kΩ 200 µA 23 + 1 kΩ MGD661 1 kΩ 25 420 Ω MGD660 2.8 V Fig.33 Pin 23; AFC. Fig.34 Pin 24; VCO1 and pin 25; VCO2. + 20 kΩ 70 kΩ + + + 20 kΩ GND 27 650 Ω 26 MGD663 MGD662 Fig.35 Pin 26; Cref. 1998 Jul 14 Fig.36 Pin 27; GND. 32 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing + TDA9819 + 50 kΩ 28 + 29 + + + MGD665 1 mA MGD664 Fig.37 Pin 28; CVAGC. Fig.38 Pin 29; VP. + + 31 1.1 kΩ 30 13 kΩ 5 kΩ 3.6 V + MGD666 1.1 kΩ 3.6 V 32 2.65 V MGD667 Fig.39 Pin 30; INSWI. 1998 Jul 14 Fig.40 Pin 31; Vi SIF1 and pin 32; Vi SIF2. 33 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 PACKAGE OUTLINES SDIP32: plastic shrink dual in-line package; 32 leads (400 mil) SOT232-1 ME seating plane D A2 A A1 L c e Z (e 1) w M b1 MH b 17 32 pin 1 index E 1 16 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.7 0.51 3.8 1.3 0.8 0.53 0.40 0.32 0.23 29.4 28.5 9.1 8.7 1.778 10.16 3.2 2.8 10.7 10.2 12.2 10.5 0.18 1.6 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 92-11-17 95-02-04 SOT232-1 1998 Jul 14 EUROPEAN PROJECTION 34 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 SO32: plastic small outline package; 32 leads; body width 7.5 mm SOT287-1 D E A X c y HE v M A Z 17 32 Q A2 A (A 3) A1 pin 1 index θ Lp L 16 1 0 detail X w M bp e 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.27 0.18 20.7 20.3 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.2 1.0 0.25 0.25 0.1 0.95 0.55 inches 0.10 0.012 0.096 0.004 0.086 0.01 0.02 0.01 0.011 0.007 0.81 0.80 0.30 0.29 0.050 0.419 0.394 0.055 0.043 0.016 0.047 0.039 0.01 0.01 0.004 0.037 0.022 θ 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 95-01-25 97-05-22 SOT287-1 1998 Jul 14 EUROPEAN PROJECTION 35 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. WAVE SOLDERING This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (order code 9398 652 90011). Wave soldering techniques can be used for all SO packages if the following conditions are observed: • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. SDIP • The longitudinal axis of the package footprint must be parallel to the solder flow. SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. • The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. REPAIRING SOLDERED JOINTS A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. 1998 Jul 14 TDA9819 36 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing TDA9819 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1998 Jul 14 37 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing NOTES 1998 Jul 14 38 TDA9819 Philips Semiconductors Product specification Multistandard vision and sound-IF PLL with DVB-IF processing NOTES 1998 Jul 14 39 TDA9819 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 545104/00/02/pp40 Date of release: 1998 Jul 14 Document order number: 9397 750 03813