PHILIPS TDA9813T

INTEGRATED CIRCUITS
DATA SHEET
TDA9813T
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
Product specification
Supersedes data of 1995 Oct 03
File under Integrated Circuits, IC02
1999 Sep 16
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
FEATURES
GENERAL DESCRIPTION
• 5 V supply voltage
The TDA9813T is an integrated circuit for vision IF signal
processing and sound dual FM demodulation, with single
reference QSS-IF in TV and VCR sets. For negative
modulation standards only.
• Gain controlled wide band VIF amplifier (AC-coupled)
• True synchronous demodulation with active carrier
regeneration (very linear demodulation, good
intermodulation figures, reduced harmonics,
excellent pulse response)
• Separate video amplifier for sound trap buffering with
high video bandwidth
• VIF-AGC detector for gain control, operating as peak
sync detector
• Tuner AGC with adjustable takeover point (TOP)
• AFC detector without extra reference circuit
• AC-coupled limiter amplifier for sound intercarrier signal
• Two alignment-free FM-PLL demodulators with
high linearity
• SIF input for single reference QSS mode (PLL
controlled); SIF-AGC detector for gain controlled SIF
amplifier; single reference QSS mixer able to operate in
high performance single reference QSS mode
• Stabilizer circuit for ripple rejection and to achieve
constant output signals
• ESD protection for all pins.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
TDA9813T
1999 Sep 16
SO28
DESCRIPTION
plastic small outline package; 28 leads; body width 7.5 mm
2
VERSION
SOT136-1
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
VP
supply voltage
4.5
5
5.5
V
IP
supply current
93
109
125
mA
Vi VIF(rms)
vision IF input signal voltage sensitivity −1 dB video at output
(RMS value)
−
60
100
µV
Vo CVBS(p-p)
CVBS output signal voltage
(peak-to-peak value)
1.7
2.0
2.3
V
B−3
−3 dB video bandwidth on pin 8
7
8
−
MHz
S/N(W)
weighted signal-to-noise ratio for video
56
60
−
dB
CL < 20 pF; RL > 1 kΩ; AC load
IMα1.1
intermodulation attenuation at ‘blue’
f = 1.1 MHz
58
64
−
dB
IMα3.3
intermodulation attenuation at ‘blue’
f = 3.3 MHz
58
64
−
dB
αH(sup)
suppression of harmonics in video
signal
35
40
−
dB
Vi SIF(rms)
sound IF input signal voltage
sensitivity (RMS value)
−3 dB at intercarrier output
−
30
70
µV
Vo(rms)
audio output signal voltage for FM
(RMS value)
B/G standard; 54% modulation
−
0.5
−
V
THD
total harmonic distortion
54% modulation
−
0.15
0.5
%
S/N(W)
weighted signal-to-noise ratio
54% modulation
−
60
−
dB
1999 Sep 16
3
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
CAGC
loop
filter
AFC
n.c.
25
3
4
16
5
TUNER AND VIF-AGC
22
21
20
AFC DETECTOR
VCO TWD
18
video
1 V (p-p)
8
CVBS
2 V (p-p)
Philips Semiconductors
tuner
AGC
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
BLOCK DIAGRAM
handbook, full pagewidth
1999 Sep 16
2 x f PC
TOP
2
VIF
1
VIF AMPLIFIER
VIDEO DEMODULATOR
AND AMPLIFIER
FPLL
4
VIDEO
BUFFER
28
SIF
TDA9813T
SIF
AMPLIFIER
27
INTERNAL VOLTAGE
STABILIZER
26
24
SIF-AGC
23
7
6
9
17
n.c.
15
5.5
C AGC
Vi(vid)
13
SINGLE REFERENCE
MIXER
1/2 VP
19
14
FM DETECTOR (PLL) 10
AF AMPLIFIER
AF1
FM DETECTOR (PLL) 11
AF AMPLIFIER
AF2
12
MHA037
n.c.
5.74
5V
SIF
Product specification
TDA9813T
Fig.1 Block diagram.
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
PINNING
SYMBOL
PIN
DESCRIPTION
Vi VIF1
1
VIF differential input signal voltage 1
Vi VIF2
2
VIF differential input signal voltage 2
n.c.
3
not connected
TADJ
4
tuner AGC takeover adjust (TOP)
TPLL
5
PLL loop filter
CSAGC
6
SIF-AGC capacitor
Vi VIF1
1
28 V i SIF2
n.c.
7
not connected
Vi VIF2
2
27 V i SIF1
Vo CVBS
8
CVBS output signal voltage
n.c.
3
26 VP
n.c.
9
not connected
TADJ
4
25 C VAGC
TPLL
5
24 GND
CSAGC
6
23 Cref
n.c.
7
Vo AF1
10
audio voltage frequency output 1
Vo AF2
11
audio voltage frequency output 2
CDEC2
12
decoupling capacitor 2
CDEC1
13
decoupling capacitor 1
handbook, halfpage
Vi FM2
14
sound intercarrier input voltage 2
Vo CVBS
Vi FM1
15
sound intercarrier input voltage 1
n.c.
TAGC
16
tuner AGC output
Vo QSS
17
single reference QSS output voltage
Vo(vid)
18
composite video output voltage
Vi(vid)
19
video buffer input voltage
AFC
20
AFC output
VCO1
21
VCO1 reference circuit for 2fPC
VCO2
22
VCO2 reference circuit for 2fPC
Cref
23
1⁄
GND
24
ground
CVAGC
25
VIF-AGC capacitor
VP
26
supply voltage
Vi SIF1
27
SIF differential input signal voltage 1
Vi SIF2
28
SIF differential input signal voltage 2
1999 Sep 16
2VP
22 VCO2
TDA9813T
8
21 VCO1
9
20 AFC
Vo AF1 10
19 Vi(vid)
Vo AF2 11
18 Vo(vid)
CDEC2 12
17 Vo QSS
CDEC1 13
16 TAGC
Vi FM2 14
15 V i FM1
MHA038
reference capacitor
Fig.2 Pin configuration.
5
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
FUNCTIONAL DESCRIPTION
VCO, Travelling Wave Divider (TWD) and AFC
The integrated circuit comprises the functional blocks as
shown in Fig.1:
The VCO operates with a resonance circuit (with L and C
in parallel) at double the PC frequency. The VCO is
controlled by two integrated variable capacitors.
The control voltage required to tune the VCO from its
free-running frequency to actually double the PC
frequency is generated by the frequency-phase detector
(FPLL) and fed via the loop filter to the first variable
capacitor. This control voltage is amplified and additionally
converted into a current which represents the AFC output
signal. At centre frequency the AFC output current is equal
to zero.
• Vision IF amplifier
• Tuner and VIF-AGC
• Frequency Phase Locked Loop (FPLL) detector
• VCO, Travelling Wave Divider (TWD) and AFC
• Video demodulator and amplifier
• Video buffer
• SIF amplifier and SIF-AGC
• Single reference Quasi Split Sound (QSS) mixer
The oscillator signal is divided-by-two with a TWD which
generates two differential output signals with a 90 degree
phase difference independent of the frequency.
• FM-PLL demodulator
• Internal voltage stabilizer and 1⁄2VP reference.
Video demodulator and amplifier
Vision IF amplifier
The video demodulator is realized by a multiplier which is
designed for low distortion and large bandwidth. The vision
IF input signal is multiplied with the ‘in phase’ signal of the
travelling wave divider output.
The vision IF amplifier consists of three AC-coupled
differential amplifier stages. Each differential stage
comprises a feedback network controlled by emitter
degeneration.
The demodulator output signal is fed via an integrated
low-pass filter for attenuation of the carrier harmonics to
the video amplifier. The video amplifier is realized by an
operational amplifier with internal feedback and high
bandwidth. A low-pass filter is integrated to achieve an
attenuation of the carrier harmonics. The video output
signal is 1 V (p-p) for nominal vision IF modulation.
Tuner and VIF-AGC
The AGC capacitor voltage is transferred to an internal IF
control signal, and is fed to the tuner AGC to generate the
tuner AGC output current (open-collector output).
The tuner AGC takeover point can be adjusted. This
allows the tuner and the SAW filter to be matched to
achieve the optimum IF input level.
Video buffer
The AGC detector charges/discharges the AGC capacitor
to the required voltage for setting of VIF and tuner gain in
order to keep the video signal at a constant level.
Therefore the sync level of the video signal is detected.
For an easy adaption of the sound traps an operational
amplifier with internal feedback is used. This amplifier is
featured with a high bandwidth and 7 dB gain. The input
impedance is adapted for operating in combination with
ceramic sound traps. The output stage delivers a nominal
2 V (p-p) positive video signal. Noise clipping is provided.
Frequency Phase Locked Loop (FPLL) detector
The VIF amplifier output signal is fed into a frequency
detector and into a phase detector via a limiting amplifier.
During acquisition the frequency detector produces a DC
current proportional to the frequency difference between
the input and the VCO signal. After frequency lock-in the
phase detector produces a DC current proportional to the
phase difference between the VCO and the input signal.
The DC current of either frequency detector or phase
detector is converted into a DC voltage via the loop filter,
which controls the VCO frequency.
1999 Sep 16
SIF amplifier and SIF-AGC
The sound IF amplifier consists of two AC-coupled
differential amplifier stages. Each differential stage
comprises a controlled feedback network provided by
emitter degeneration.
The SIF-AGC detector is related to the SIF input signals
(average level of FM carriers) and controls the SIF
amplifier to provide a constant SIF signal to the single
reference QSS mixer.
6
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
Single reference QSS mixer
The AF amplifier consists of two parts:
The single reference QSS mixer is realized by a multiplier.
The SIF amplifier output signal is fed to the single
reference QSS mixer and converted to intercarrier
frequency by the regenerated picture carrier (VCO).
The mixer output signal is fed via a high-pass for
attenuation of the video signal components to the output
pin 17. With this system a high performance hi-fi stereo
sound processing can be achieved.
1. The AF preamplifier for FM sound is an operational
amplifier with internal feedback, high gain and high
common mode rejection. The AF voltage from the PLL
demodulator, by principle a small output signal, is
amplified by approximately 33 dB. The low-pass
characteristic of the amplifier reduces the harmonics of
the intercarrier signal at the sound output terminal.
An additional DC control circuit is implemented to keep
the DC level constant, independent of process spread.
FM-PLL demodulator
2. The AF output amplifier (10 dB) provides the required
output level by a rail-to-rail output stage. This amplifier
makes use of an input selector for switching to FM or
mute state, controlled by the mute switching voltage.
Each FM-PLL demodulator consists of a limiter, an
FM-PLL and an AF amplifier. The limiter provides the
amplification and limitation of the FM sound intercarrier
signal before demodulation. The result is high sensitivity
and AM suppression. The amplifier consists of 7 stages
which are internally AC-coupled in order to minimize the
DC offset and to save pins for DC decoupling.
Internal voltage stabilizer and 1⁄2VP reference
The band gap circuit internally generates a voltage of
approximately 1.25 V, independent of supply voltage and
temperature. A voltage regulator circuit, connected to this
voltage, produces a constant voltage of 3.6 V which is
used as an internal reference voltage.
The second limiter is extended with an additional level
detector consisting of a rectifier and a comparator.
By means of this the AF2 signal is set to mute and the
PLL VCO is switched off, if the intercarrier signal at pin 14
is below 1 mV (RMS) in order to avoid false identification
of a stereo decoder. It should be noted that noise at pin 14
disables the mute state (at low SIF input signal), but this
will not lead to false identification. This ‘auto-mute’ function
can be disabled by connecting a 5.6 kΩ resistor from
pin 14 to VP (see Fig.11).
For all audio output signals the constant reference voltage
cannot be used because large output signals are required.
Therefore these signals refer to half the supply voltage to
achieve a symmetrical headroom, especially for the
rail-to-rail output stage. For ripple and noise attenuation
the 1⁄2VP voltage has to be filtered via a low-pass filter by
using an external capacitor together with an integrated
resistor (fg = 5 Hz). For a fast setting to 1⁄2VP an internal
start-up circuit is added.
Furthermore the AF output signals can be muted by
connecting a resistor between the limiter inputs pin 14 or
pin 15 and ground.
The FM-PLL consists of an integrated relaxation oscillator,
an integrated loop filter and a phase detector.
The oscillator is locked to the FM intercarrier signal, output
from the limiter. As a result of locking, the oscillator
frequency tracks with the modulation of the input signal
and the oscillator control voltage is superimposed by the
AF voltage. The FM-PLL operates as an FM demodulator.
1999 Sep 16
7
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
VP
supply voltage (pin 26)
Vn
CONDITIONS
maximum chip temperature
of 125 °C; note 1
MIN.
MAX.
UNIT
0
5.5
V
voltage at pins 1 to 7, 9 to 16, 19, 20 and
23 to 28
0
VP
V
ts(max)
maximum short-circuit time
−
10
s
V16
tuner AGC output voltage
0
13.2
V
Tstg
storage temperature
−25
+150
°C
Tamb
ambient temperature
−20
+70
°C
Ves
electrostatic handling voltage
−300
+300
V
note 2
Notes
1. IP = 125 mA; Tamb = 70 °C; Rth(j-a) = 80 K/W.
2. Machine model class B (L = 2.5 µH).
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
PARAMETER
thermal resistance from junction to ambient
1999 Sep 16
CONDITIONS
in free air
8
VALUE
UNIT
80
K/W
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
CHARACTERISTICS
VP = 5 V; Tamb = 25 °C; see Table 1 for input frequencies and carrier ratios (B/G standard); input level
Vi IF 1-2 = 10 mV RMS value (sync-level); video modulation DSB; residual carrier: 10%; video signal in accordance with
“CCIR, line 17” ; measurements taken in Fig.11; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply (pin 26)
VP
supply voltage
IP
supply current
note 1
4.5
5
5.5
V
93
109
125
mA
Vision IF amplifier (pins 1 and 2)
Vi VIF(rms)
input signal voltage
sensitivity (RMS value)
−1 dB video at output
−
60
100
µV
Vi max(rms)
maximum input signal
voltage (RMS value)
+1 dB video at output
120
200
−
mV
∆Vo(int)
internal IF amplitude
difference between picture
and sound carrier
within AGC range;
∆f = 5.5 MHz
−
0.7
1
dB
GIFcr
IF gain control range
see Fig.3
65
70
−
dB
Ri(diff)
differential input resistance
note 2
1.7
2.2
2.7
kΩ
Ci(diff)
differential input capacitance note 2
1.2
1.7
2.5
pF
V1,2
DC input voltage
−
3.4
−
V
MHz
note 2
True synchronous video demodulator; note 3
fVCO(max)
maximum oscillator
frequency for carrier
regeneration
f = 2fPC
125
130
−
∆fosc/∆T
oscillator drift as a function
of temperature
oscillator is free-running;
IAFC = 0; note 4
−
−
±20 × 10−6 K−1
Vo ref(rms)
oscillator voltage swing at
pins 21 and 22 (RMS value)
70
100
130
mV
fPC CR
picture carrier capture range
±1.4
±1.8
−
MHz
tacq
acquisition time
BL = 75 kHz; note 5
−
−
30
ms
Vi VIF(rms)
VIF input signal voltage
sensitivity for PLL to be
locked (RMS value; pins 1
and 2)
maximum IF gain; note 6
−
30
70
µV
0.88
1.0
1.12
V
3.0
−
Composite video amplifier (pin 18; sound carrier off)
Vo video(p-p)
output signal voltage
(peak-to-peak value)
V/S
ratio between video
(black-to-white) and
sync level
1.9
2.33
V18(sync)
sync voltage level
−
1.5
V18(clu)
upper video clipping voltage
level
VP − 1.1 VP − 1
1999 Sep 16
see Fig.8
9
−
V
−
V
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
SYMBOL
TDA9813T
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
−
0.7
0.9
V
−
−
10
Ω
2.2
3.0
−
mA
maximum AC and DC output
sink current
1.6
−
−
mA
I18 max(source)
maximum AC and DC output
source current
2.9
−
−
mA
B−1
−1 dB video bandwidth
CL < 50 pF; RL > 1 kΩ;
AC load
5
6
−
MHz
B−3
−3 dB video bandwidth
CL < 50 pF; RL > 1 kΩ;
AC load
7
8
−
MHz
αH(sup)
suppression of video signal
harmonics
CL < 50 pF; RL > 1 kΩ;
AC load; note 7a
35
40
−
dB
PSRR
power supply ripple rejection video signal; grey level;
at pin 18
see Fig.9
32
35
−
dB
V18(cll)
lower video clipping voltage
level
Ro,18
output resistance
Iint 18
internal DC bias current for
emitter-follower
I18 max(sink)
note 2
CVBS buffer amplifier (only) and noise clipper (pins 8 and 19)
Ri,19
input resistance
note 2
2.6
3.3
4.0
kΩ
Ci,19
input capacitance
note 2
1.4
2
3.0
pF
VI,19
DC input voltage
1.4
1.7
2.0
V
Gv
voltage gain
6.5
7
7.5
dB
V8(clu)
upper video clipping voltage
level
3.9
4.0
−
V
V8(cll)
lower video clipping voltage
level
−
1.0
1.1
V
Ro,8
output resistance
−
−
10
Ω
Iint 8
DC internal bias current for
emitter-follower
2.0
2.5
−
mA
Io,8 max(sink)
maximum AC and DC output
sink current
1.4
−
−
mA
Io,10 max(source)
maximum AC and DC output
source current
2.4
−
−
mA
B−1
−1 dB video bandwidth
CL < 20 pF; RL > 1 kΩ;
AC load
8.4
11
−
MHz
B−3
−3 dB video bandwidth
CL < 20 pF; RL > 1 kΩ;
AC load
11
14
−
MHz
note 8
note 2
Measurements from IF input to CVBS output (pin 8; 330 Ω between pins 18 and 19, sound carrier off)
Vo CVBS(p-p)
CVBS output signal voltage
on pin 8
(peak-to-peak value)
Vo CVBS(sync)
sync voltage level
1999 Sep 16
note 8
10
1.7
2.0
2.3
V
−
1.35
−
V
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
SYMBOL
TDA9813T
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
∆Vo
deviation of CVBS output
signal voltage at B/G
50 dB gain control
−
−
0.5
30 dB gain control
−
−
0.1
dB
∆Vo(blB/G)
black level tilt in
B/G standard
gain variation; note 9
−
−
1
%
Gdiff
differential gain
“CCIR, line 330”
−
2
5
%
ϕdiff
differential phase
“CCIR, line 330”
−
1
2
deg
B−1
−1 dB video bandwidth
CL < 20 pF; RL > 1 kΩ;
AC load
5
6
−
MHz
B−3
−3 dB video bandwidth
CL < 20 pF; RL > 1 kΩ;
AC load
7
8
−
MHz
S/N(W)
weighted signal-to-noise
ratio
see Fig.5 and note 10
56
60
−
dB
S/N
unweighted signal-to-noise
ratio
see Fig.5 and note 10
49
53
−
dB
IMα1.1
intermodulation attenuation
at ‘blue’
f = 1.1 MHz;
see Fig.6 and note 11
58
64
−
dB
intermodulation attenuation
at ‘yellow’
f = 1.1 MHz;
see Fig.6 and note 11
60
66
−
dB
intermodulation attenuation
at ‘blue’
f = 3.3 MHz;
see Fig.6 and note 11
58
64
−
dB
intermodulation attenuation
at ‘yellow’
f = 3.3 MHz;
see Fig.6 and note 11
59
65
−
dB
αpc(rms)
residual picture carrier
(RMS value)
fundamental wave and
harmonics
−
2
5
mV
αH(sup)
suppression of video signal
harmonics
note 7a
35
40
−
dB
αH(spur)
spurious elements
note 7b
40
−
−
dB
PSRR
power supply ripple rejection video signal; grey level;
at pin 8
see Fig.9
25
28
−
dB
0.75
1
1.25
mA
15
20
25
µA
−
0.05
0.1
ms/dB
−
2.2
3.5
ms/dB
IMα3.3
dB
VIF-AGC detector (pin 25)
I25
charging current
note 9
discharging current
tresp
AGC response to an
increasing VIF step
note 12
AGC response to a
decreasing VIF step
Tuner AGC (pin 16)
Vi(rms)
Vo,16
1999 Sep 16
IF input signal voltage for
minimum starting point of
tuner takeover (RMS value)
input at pins 1 and 2;
RTOP = 22 kΩ; I16 = 0.4 mA
−
2
5
mV
IF input signal voltage for
maximum starting point of
tuner takeover (RMS value)
input at pins 1 and 2;
RTOP = 0 Ω; I16 = 0.4 mA
50
100
−
mV
permissible output voltage
from external source; note 2 −
−
13.2
V
11
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
SYMBOL
TDA9813T
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Vsat,16
saturation voltage
I16 = 1.5 mA
−
−
0.2
V
∆VTOP,16/∆T
variation of takeover point by I16 = 0.4 mA
temperature
−
0.03
0.07
dB/K
I16(sink)
sink current
no tuner gain reduction;
V16 = 13.2 V
−
−
1
µA
maximum tuner gain
reduction
1.5
2
2.6
mA
tuner gain current from
20% to 80%
−
6
8
dB
note 14
0.5
0.75
1.0
∆GIF
IF slip by automatic gain
control
see Fig.3
AFC circuit (pin 20); see Fig.7 and note 13
S
∆fIF/∆T
control steepness ∆I20/∆f
±20 ×
K−1
frequency variation by
temperature
IAFC = 0; note 5
−
output voltage upper limit
see Fig.7 without external
components
VP − 0.6 VP − 0.3 −
V
output voltage lower limit
−
0.3
0.6
V
Io,20(source)
output source current
see Fig.7
150
200
250
µA
Io,20(sink)
output sink current
150
200
250
µA
∆I20(p-p)
residual video modulation
current (peak-to-peak value)
−
20
30
µA
Vo,20
−
µA/kHz
10−6
Sound IF amplifier (pins 27 and 28)
Vi SIF(rms)
input signal voltage
sensitivity (RMS value)
−3 dB at intercarrier output
pin 17
−
30
70
µV
Vi max(rms)
maximum input signal
voltage (RMS value)
+1 dB at intercarrier output
pin 17
50
70
−
mV
GSIFcr
SIF gain control range
see Fig.4
60
67
−
dB
Ri(diff)
differential input resistance
note 2
1.7
2.2
2.7
kΩ
Ci(diff)
differential input capacitance note 2
1.2
1.7
2.5
pF
VI(27,28)
DC input voltage
−
3.4
−
V
αct(SIF,VIF)
crosstalk attenuation
between SIF and VIF input
50
−
−
dB
charging current
8
12
16
µA
discharging current
8
12
16
µA
75
100
125
mV
between pins 1 and 2 and
pins 27 and 28; note 15
SIF-AGC detector (pin 6)
I6
Single reference QSS intercarrier mixer (B/G standard; pin 17)
Vo(rms)
IF intercarrier level
(RMS value)
B−3
−3 dB intercarrier bandwidth upper limit
7.5
9
−
MHz
αSC(rms)
residual sound carrier
(RMS value)
fundamental wave and
harmonics
−
2
−
mV
Ro,17
output resistance
note 2
−
−
25
Ω
VO,17
DC output voltage
−
2.0
−
V
1999 Sep 16
SC1; sound carrier 2 off
12
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
SYMBOL
TDA9813T
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Iint 17
DC internal bias current for
emitter-follower
1.5
1.9
−
mA
I17 max(sink)
maximum AC and DC output
sink current
1.1
1.5
−
mA
I17 max(source)
maximum AC and DC output
source current
3.0
3.5
−
mA
−
−
100
µV
−
300
400
µV
200
−
−
mV
480
600
720
Ω
−
2.8
−
V
−
−
100
µV
−
300
400
µV
allowed input signal voltage
(RMS value)
200
−
−
mV
input signal voltage for no
auto mute; PLL enabled
(RMS value)
0.7
1
1.5
mV
HYS14
hysteresis of level detector
for auto mute
−3
−6
−8
dB
Ri,14
input resistance
480
600
720
Ω
VI,14
DC input voltage
−
2.0
−
V
upper limit
7.0
−
−
MHz
lower limit
−
−
4.0
MHz
upper limit
8.0
−
−
MHz
lower limit
−
−
3.5
MHz
−
−
4
µs
Limiter amplifier 1 (pin 15); note 16
Vi FM(rms)
input signal voltage for
lock-in (RMS value)
Vi FM(rms)
input signal voltage
(RMS value)
S+N
-------------- = 40 dB
N
allowed input signal voltage
(RMS value)
Ri,15
input resistance
VI,15
DC input voltage
note 2
Limiter amplifier 2 (pin 14); note 16
Vi FM(rms)
input signal voltage for
lock-in (RMS value)
Vi FM(rms)
input signal voltage
(RMS value)
S+N
-------------- = 40 dB
N
PLL1 has to be in locked
mode; auto mute off
note 2
FM-PLL demodulator
fi FM(catch)
fi FM(hold)
tacq
1999 Sep 16
catching range of PLL
holding range of PLL
acquisition time
13
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
SYMBOL
TDA9813T
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
FM operation (B/G standard; pins 10 and 11); notes 16 and 16a
Vo AF10,11(rms)
AF output signal voltage
(RMS value)
27 kHz (54% FM deviation);
see Fig.11 and note 17
Rx = Ry = 470 Ω
200
250
300
mV
Rx = Ry = 0 Ω
400
500
600
mV
−
V
Vo AF10,11(cl)
AF output clipping signal
voltage level
THD < 1.5%
1.3
1.4
∆fAF
frequency deviation
THD < 1.5%; note 17
−
−
∆Vo/∆T
temperature drift of AF
output signal voltage
V12,13
DC voltage at decoupling
capacitor
R10,11
output resistance
±53
10−3
kHz
−
3×
voltage dependent on VCO
frequency; note 18
1.2
−
3.0
V
note 2
−
−
100
Ω
−
1⁄
−
V
tracked with supply voltage
2VP
7×
10−3
dB/K
V10,11
DC output voltage
I10,11max(sink)
maximum AC and DC output
sink current
−
−
1.1
mA
I10,11max(source) maximum AC and DC output
source current
−
−
1.1
mA
B−3
−3 dB video bandwidth
100
125
−
kHz
THD
total harmonic distortion
−
0.15
0.5
%
S/N(W)
weighted signal-to-noise
ratio
FM-PLL only; with 50 µs
de-emphasis; 27 kHz
(54% FM deviation);
“CCIR 468-4”
55
60
−
dB
αSC(rms)
residual sound carrier
(RMS value)
fundamental wave and
harmonics
−
−
75
mV
αAM
AM suppression
50 µs de-emphasis;
AM: f = 1 kHz; m = 0.3 refer
to 27 kHz (54% FM
deviation)
46
50
−
dB
α10,11
mute attenuation of AF
signal
70
80
−
dB
∆V10,11
DC jump voltage of AF
output terminals for
switching AF output to mute
state and vice versa
−
±50
±150
mV
PSRR
power supply ripple rejection Rx = Ry = 0 Ω;
see Figs 9 and 11
at pins 10 and 11
22
28
−
dB
1999 Sep 16
FM-PLLs in lock mode;
note 19
14
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
SYMBOL
PARAMETER
TDA9813T
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Single reference QSS AF performance for FM operation (B/G standard); see Table 1 and notes 20, 21 and 22
S/N(W)
weighted signal-to-noise
ratio (SC1/SC2)
PC/SC1 ratio at pins 1
and 2; 27 kHz (54% FM
deviation); “CCIR 468-4”
black picture
40
−
−
dB
53/48
58/55
−
dB
white picture
50/46
55/52
−
dB
6 kHz sine wave;
black-to-white modulation
42/40
48/46
−
dB
250 kHz square wave;
45/42
black-to-white modulation;
see note 2 in Fig.12
53/50
−
dB
sound carrier
subharmonics;
f = 2.75 MHz ±3 kHz
45/44
51/50
−
dB
sound carrier
subharmonics;
f = 2.87 MHz ±3 kHz
46/45
52/51
−
dB
Notes
1. Values of video and sound parameters are decreased at VP = 4.5 V.
2. This parameter is not tested during production and is only given as application information for designing the
television receiver.
3. Loop bandwidth BL = 75 kHz (natural frequency fn = 11 kHz; damping factor d ≈ 3.5; calculated with sync level within
gain control range). Resonance circuit of VCO: Q0 > 50; Cext = 8.2 pF ±0.25 pF; Cint ≈ 8.5 pF (loop voltage
approximately 2.7 V).
4. Temperature coefficient of external LC circuit is equal to zero.
5. Vi IF = 10 mV RMS; ∆f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture
video modulation.
6. Vi IF signal for nominal video signal.
7. Measurements taken with SAW filter G3962 (sound carrier suppression: 40 dB); loop bandwidth BL = 75 kHz:
a) Modulation VSB; sound carrier off; fvideo > 0.5 MHz.
b) Sound carrier on; SIF SAW filter G9353; fvideo = 10 kHz to 10 MHz.
8. The 7 dB buffer gain accounts for 1 dB loss in the sound trap. Buffer output signal is typical 2 V (p-p), in event of
CVBS video amplifier output typical 1 V (p-p). If no sound trap is applied a 330 Ω resistor must be connected from
output to input (between pin 18 and pin 19).
9. The leakage current of the AGC capacitor should not exceed 1 µA. Larger currents will increase the tilt.
10. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value), on pin 8. B = 5 MHz
weighted in accordance with “CCIR 567”.
11. The intermodulation figures are defined:
V 0 at 4.4 MHz
α 1.1 = 20 log  -------------------------------------- + 3.6 dB ; α1.1 value at 1.1 MHz referenced to black/white signal;
 V 0 at 1.1 MHz
V 0 at 4.4 MHz
α 3.3 = 20 log  -------------------------------------- ; α3.3 value at 3.3 MHz referenced to colour carrier.
 V 0 at 3.3 MHz
12. Response speed valid for a VIF input level range of 200 µV up to 70 mV.
1999 Sep 16
15
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
13. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is
given in Fig.7. The AFC steepness can be changed by the resistors at pin 20.
14. Depending on the ratio ∆C/C0 of the LC resonant circuit of VCO (Q0 > 50; see note 3; C0 = Cint + Cext).
15. Source impedance: 2.3 kΩ in parallel to 12 pF (SAW filter); fIF = 38.9 MHz.
16. Input level for second IF from an external generator with 50 Ω source impedance. AC-coupled with 10 nF capacitor,
fmod = 1 kHz, 27 kHz (54% FM deviation) of audio references. A VIF/SIF input signal is not permitted. Pins 6 and 25
have to be connected to positive supply voltage for minimum IF gain. S/N and THD measurements are taken at 50 µs
de-emphasis. The not tested FM-PLL has to be locked to an unmodulated carrier.
a) Second IF input level 10 mV RMS.
17. Measured with an FM deviation of 27 kHz the typical AF output signal is 500 mV RMS (Rx = Ry = 0 Ω; see Fig.11).
By using Rx = Ry = 470 Ω the AF output signal is attenuated by 6 dB (250 mV RMS) and adapted to the stereo
decoder family TDA9840. For handling an FM deviation of more than 53 kHz the AF output signal has to be reduced
by using Rx and Ry in order to avoid clipping (THD < 1.5%). For an FM deviation up to 100 kHz an attenuation of 6 dB
is recommended with Rx = Ry = 470 Ω.
18. The leakage current of the decoupling capacitor (2.2 µF) should not exceed 1 µA.
19. In the event of activated auto mute state the second FM-PLL oscillator is switched off, if the input signal at pin 14 is
missing or too weak (see Fig.11). In the event of switching the second FM-PLL oscillator on by the auto mute stage
an increased DC jump is the consequence. It should be noted that noise at pin 14 disables the mute state (at low SIF
input signal), but this will not lead to false identification of the stereo decoder family TDA9840.
20. For all S/N measurements the used vision IF modulator has to meet the following specifications:
a) Incidental phase modulation for black-to-white jump less than 0.5 degrees.
b) QSS AF performance, measured with the television-demodulator AMF2 (audio output, weighted S/N ratio) better
than 60 dB (deviation 27 kHz) for 6 kHz sine wave black-to-white video modulation.
c) Picture-to-sound carrier ratio; PC/SC1 = 13 dB (transmitter).
21. Measurements taken with SAW filter G3962 (Siemens) for vision IF (suppressed sound carrier) and G9350
(Siemens) for sound IF (suppressed picture carrier). Input level Vi SIF = 10 mV RMS, 27 kHz (54% FM deviation).
22. The PC/SC ratio at pins 1 and 2 is calculated as the addition of TV transmitter PC/SC ratio and SAW filter PC/SC
ratio. This PC/SC ratio is necessary to achieve the S/N(W) values as noted. A different PC/SC ratio will change these
values.
Table 1
Input frequencies and carrier ratios
DESCRIPTION
SYMBOL
B/G STANDARD
UNIT
Picture carrier
fPC
38.9
MHz
Sound carrier
fSC1
33.4
MHz
fSC2
33.158
MHz
Picture-to-sound carrier ratio
SC1
13
dB
SC2
20
dB
1999 Sep 16
16
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
MED861 - 1
70
handbook, full pagewidth
gain
0.06
(dB)
60
VIF input
(1,2)
(mV RMS)
50
0.6
40
Ituner
(mA)
0
30
(1)
6
(2)
(3)
(4)
20
1
10
60
0
2
−10
1
(1) Ituner; RTOP = 22 kΩ.
(2) Gain.
1.5
2
2.5
3
3.5
4
V25 (V)
4.5
(3) Ituner; RTOP = 11 kΩ.
(4) Ituner; RTOP = 0 Ω.
Fig.3 Typical VIF and tuner AGC characteristic.
MHA039
110
handbook, full pagewidth
100
(dBµV)
100
SIF input
(27,28)
(mV RMS)
10
90
80
70
1
60
50
0.1
40
30
0.01
20
1
1.5
2
2.5
3
Fig.4 Typical SIF-AGC characteristic.
1999 Sep 16
17
3.5
4
V6 (V)
4.5
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
MED684
75
handbook, halfpage
S/N
(dB)
3.2 dB
handbook, halfpage
10 dB
50
13.2 dB
13.2 dB
27 dB
27 dB
25
SC CC
PC
SC CC
BLUE
0
−60
YELLOW
MED685 - 1
−40
−20
0
20
Vi (VIF)(rms)(dB)
0.06
Fig.5
0.6
6 10
60
600
Vi (VIF)(rms)(mV)
SC = sound carrier, with respect to sync level.
CC = chrominance carrier, with respect to sync level.
PC = picture carrier, with respect to sync level.
The sound carrier levels are taking into account
a sound shelf attenuation of 20 dB (SAW filter G1962).
Typical signal-to-noise ratio as a function of
IF input voltage.
handbook, full pagewidth
VP = 5 V
VP
Fig.6 Input signal conditions.
TDA9813T 20
MHA040
V20 I20
(V) (µA)
−200
(source current)
−100
22 kΩ
I20
2.5
0
100
22 kΩ
(sink current)
200
38.5
38.9
39.3 f (MHz)
Fig.7 Measurement conditions and typical AFC characteristic.
1999 Sep 16
PC
18
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
white level
handbook,
2.5 V halfpage
1.8 V
black level
1.5 V
sync level
B/G standard
MHA041
Fig.8 Typical video signal levels on output pin 18 (sound carrier off).
handbook, full pagewidth
VP = 5 V
100 mV
(fripple = 70 Hz)
VP = 5 V
TDA9813T
MHA042
t
Fig.9 Ripple rejection condition.
1999 Sep 16
19
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
140
ndbook, full pagewidth
10
IF signals
RMS value
(V)
antenna input
(dBµV)
video 2 V (p-p)
120
1
(1)
100
10−1
SAW insertion
loss 14 dB
IF slip
6 dB
80
10−2 (TOP)
tuning gain
control range
70 dB
VIF AGC
10−3
0.66 × 10−3
60
SAW insertion
loss 14 dB
10−4
40
40 dB
RF gain
10−5
0.66 × 10−5
20
10
VHF/UHF tuner
VIF
VIF amplifier, demodulator
and video
tuner
SAW filter
TDA9813T
MHB571
(1) Depends on TOP.
Fig.10 Front-end level diagram.
1999 Sep 16
20
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
INTERNAL CIRCUITRY
Table 2
Equivalent pin circuits and pin voltages
PIN
NO.
PIN
SYMBOL
DC VOLTAGE
(V)
1
Vi VIF1
3.4
2
Vi VIF2
3.4
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
+
1
1.1 kΩ
800 Ω
1.1 kΩ
650 µA
+
2
650 µA
3.4 V
MHA673
3
n.c.
−
4
TADJ
0 to 1.9
30 kΩ
20 kΩ
3.6 V
9 kΩ
4
1.9 V
MHB020
5
TPLL
1.5 to 4.0
+
+
+
+
Ib
+
5
VCO
200 µA
MHB021
1999 Sep 16
21
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
PIN
NO.
6
PIN
SYMBOL
CSAGC
DC VOLTAGE
(V)
TDA9813T
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
1.5 to 4.0
+
15 µA
6
Ib
+
+
+
±1 µA
MHB022
7
n.c.
−
8
Vo CVBS
sync level:
1.35
+
8
2.5 mA
MHB024
9
n.c.
−
10
Vo AF1
2.3
+
+
21.7 kΩ
10
25 pF
23.7 kΩ
120 Ω
MHB025
1999 Sep 16
22
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
PIN
NO.
11
PIN
SYMBOL
Vo AF2
DC VOLTAGE
(V)
TDA9813T
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
2.3
+
+
21.7 kΩ
11
25 pF
23.7 kΩ
120 Ω
MHB026
12
CDEC2
1.2 to 3.0
+
+
+
90 µA
12
1 kΩ
MHB027
13
CDEC1
1.2 to 3.0
+
+
+
90 µA
13
1 kΩ
MHB028
1999 Sep 16
23
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
PIN
NO.
14
PIN
SYMBOL
Vi FM2
DC VOLTAGE
(V)
TDA9813T
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
2.65
400 Ω
14
640 Ω
40 kΩ
35 µA
2.65 V
600 µA
MHB029
15
Vi FM1
2.65
400 Ω
15
640 Ω
40 kΩ
35 µA
2.65 V
600 µA
MHB030
16
TAGC
0 to 13.2
16
MHB031
17
Vo QSS
2.0
+
150 Ω
1.9 mA
17
14.7 kΩ
MHB032
18
Vo(vid)
sync level: 1.5
+
100 Ω
2.1 pF
3.0 mA
18
MHB033
1999 Sep 16
24
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
PIN
NO.
19
PIN
SYMBOL
Vi(vid)
DC VOLTAGE
(V)
TDA9813T
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
1.7
3.3
kΩ
2.2
kΩ
2 kΩ
19
MHB034
20
AFC
0.3 to VP − 0.3
+
+
IAFC
±200 µA
20
MHB035
21
VCO1
2.7
22
VCO2
2.7
420 Ω
420 Ω
50 Ω
21
22
+
+
500 µA
2.8 V
MHB570
1999 Sep 16
25
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
PIN
NO.
23
PIN
SYMBOL
Cref
DC VOLTAGE
(V)
TDA9813T
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
1⁄ V
2 P
+
+
+
20
kΩ
70 kΩ
20
kΩ
650 Ω
23
MHB037
24
GND
0
25
CVAGC
1.5 to 4.0
40 µA
25
Ib
2.5 µA
1 mA
0.3/20/40 µA
MHB038
26
VP
VP
27
Vi SIF1
3.4
28
Vi SIF2
3.4
+
27
+
100 µA
1.1 kΩ
400 µA
5 kΩ
10 kΩ
1.8 V
1.1 kΩ
+
28
800 Ω
3.4 V
400 µA
MHB039
1999 Sep 16
26
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
10 nF
1:1
1
50 Ω
5
2
10
nF
video
output
22
kΩ
100
nF
Q0 > 50
GND
4
2.2
µF
VIF
AGC
3
28
27
26
25
5.6
kΩ
560 Ω
(1)
2.2
µF
24
8.2 pF
Cref
23
22
SFT
5.5 MHz
330
Ω
21
20
19
18
17
16
Philips Semiconductors
22 kΩ
SIF
input
AF1
mute switch
QSS
intercarrier
output
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
VP
TEST AND APPLICATION INFORMATION
1999 Sep 16
tuner
AGC
AFC
15
560 Ω
TDA9813T
27
SFT
5.74 MHz
1
1
50 Ω
3
5
2
4
5
6
7
4
8
9
n.c.
n.c.
1:1
VIF
input
2
TOP
22
kΩ
10
11
12
SIF
AGC
CVBS
5.6
kΩ
(1)
470
Ω
Rx
Ry
(2)
(2)
22 µF
220
nF
3
10 nF
39
pF
14
n.c.
2.2 µF
loop
filter
13
5.6
kΩ
CAF2
CAF1
22
µF
5.6
kΩ
10
nF
AF2 mute switch
+ 5 V: auto mute off
open: auto mute on
ground: mute
10 nF
820
pF
+5V
AF1 output
de-emphasis
AF2 output
de-emphasis
handbook, full pagewidth
Fig.11 Test circuit.
Product specification
(1) Application for improved 250 kHz sound performance.
(2) See note 17 of Chapter “Characteristics”.
TDA9813T
MHA043
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
22 kΩ
50 Ω
22
kΩ
100
nF
VIF
AGC
(1)
28
27
26
2.2
µF
2.2
µF
330
Ω
25
24
23
22
21
20
19
5.6
kΩ
560 Ω
15
µH
8.2 pF
Cref
10
nF
(2)
Q0 > 50
SAW
FILTER
G9350
AF1
mute switch
video
output
10 nF
IF
input
tuner
AGC
Philips Semiconductors
QSS intercarrier
output
AFC
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
1999 Sep 16
VP
SFT
5.5 MHz
18
17
16
15
560 Ω
28
TDA9813T
1
2
4
3
5
6
7
n.c.
SAW
FILTER
G3962
8
9
n.c.
10
11
12
n.c.
2.2 µF
TOP
22 kΩ
SFT
5.74 MHz
loop
filter
SIF
AGC
CAF2
14
Rx
Ry
(3)
(3)
22 µF
CVBS
220 nF
(1)
13
CAF1
22
µF
470 Ω
39
pF
820
pF
10
nF
AF2 mute switch
+ 5 V: auto mute off
open: auto mute on
ground: mute
(2)
de-emphasis
depending on
TV standard/stereo
decoder
5.6
kΩ
+5V
handbook, full pagewidth
Fig.12 Application circuit.
TDA9813T
(1) Depends on standard.
(2) Application for improved 250 kHz sound performance.
(3) See note 17 of Chapter “Characteristics”.
Product specification
MHA044
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
PACKAGE OUTLINE
SO28: plastic small outline package; 28 leads; body width 7.5 mm
SOT136-1
D
E
A
X
c
y
HE
v M A
Z
15
28
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
1
14
e
w M
bp
0
detail X
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.30
0.10
2.45
2.25
0.25
0.49
0.36
0.32
0.23
18.1
17.7
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.9
0.4
inches
0.10
0.012 0.096
0.004 0.089
0.01
0.019 0.013
0.014 0.009
0.71
0.69
0.30
0.29
0.050
0.419
0.043
0.055
0.394
0.016
0.043
0.039
0.01
0.01
0.004
0.035
0.016
Z
(1)
θ
8o
0o
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT136-1
075E06
MS-013AE
1999 Sep 16
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
95-01-24
97-05-22
29
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
SOLDERING
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
1999 Sep 16
30
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
TDA9813T
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
REFLOW(1)
WAVE
BGA, SQFP
not suitable
suitable(2)
HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS
not
PLCC(3), SO, SOJ
suitable
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
suitable
suitable
suitable
not
recommended(3)(4)
suitable
not
recommended(5)
suitable
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Sep 16
31
Philips Semiconductors – a worldwide company
Argentina: see South America
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,
Tel. +61 2 9704 8141, Fax. +61 2 9704 8139
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,
Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,
220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773
Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 68 9211, Fax. +359 2 68 9102
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700
Colombia: see South America
Czech Republic: see Austria
Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,
Tel. +45 33 29 3333, Fax. +45 33 29 3905
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615 800, Fax. +358 9 6158 0920
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,
Tel. +33 1 4099 6161, Fax. +33 1 4099 6427
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 2353 60, Fax. +49 40 2353 6300
Hungary: see Austria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. +91 22 493 8541, Fax. +91 22 493 0966
Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),
Tel. +39 039 203 6838, Fax +39 039 203 6800
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087
Middle East: see Italy
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. +64 9 849 4160, Fax. +64 9 849 7811
Norway: Box 1, Manglerud 0612, OSLO,
Tel. +47 22 74 8000, Fax. +47 22 74 8341
Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,
Tel. +48 22 5710 000, Fax. +48 22 5710 001
Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,
Tel. +65 350 2538, Fax. +65 251 6500
Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,
Tel. +27 11 471 5401, Fax. +27 11 471 5398
South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 821 2382
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 93 301 6312, Fax. +34 93 301 4107
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 5985 2000, Fax. +46 8 5985 2745
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2741 Fax. +41 1 488 3263
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
SCA 68
© Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/02/pp32
Date of release: 1999
Sep 16
Document order number:
9397 750 06056