IRF IRF7504

PD - 9.1267G
IRF7504
HEXFET® Power MOSFET
l
l
l
l
l
l
l
Generation V Technology
Ultra Low On-Resistance
Dual P-Channel MOSFET
Very Small SOIC Package
Low Profile (<1.1mm)
Available in Tape & Reel
Fast Switching
1
8
D1
G1
2
7
D1
S2
3
6
4
5
S1
G2
VDSS = -20V
D2
D2
RDS(on) = 0.27Ω
T o p V iew
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The new Micro8 package, with half the footprint area of the
standard SO-8, provides the smallest footprint available in
an SOIC outline. This makes the Micro8 an ideal device for
applications where printed circuit board space is at a
premium. The low profile (<1.1mm) of the Micro8 will allow
it to fit easily into extremely thin application environments
such as portable electronics and PCMCIA cards.
Micro8
Absolute Maximum Ratings
Parameter
ID @ TA = 25°C
ID @ TA = 70°C
IDM
PD @TA = 25°C
VGS
dv/dt
TJ,TSTG
Max.
Continuous Drain Current, VGS @ -4.5V
Continuous Drain Current, VGS @ -4.5V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt ‚
Junction and Storage Temperature Range
Units
-1.7
-1.4
-9.6
1.25
10
± 12
-5.0
-55 to + 150
A
W
mW/°C
V
V/ns
°C
Thermal Resistance
Parameter
RθJA
Maximum Junction-to-Ambient„
Typ.
Max.
Units
–––
100
°C/W
All Micro8 Data Sheets reflect improved Thermal Resistance, Power and Current -Handling Ratings- effective
only for product marked with Date Code 505 or later .
8/25/97
IRF7504
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(ON)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
I GSS
Qg
Q gs
Q gd
t d(on)
tr
t d(off)
tf
Ciss
Coss
Crss
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min. Typ. Max. Units
Conditions
-20 ––– –––
V
VGS = 0V, ID = -250µA
––– -0.012 ––– V/°C Reference to 25°C, I D = -1mA
––– ––– 0.27
VGS = -4.5V, ID = -1.2A ƒ
Ω
––– ––– 0.40
VGS = -2.7V, ID = -0.60A ƒ
-0.70 ––– –––
V
VDS = VGS, ID = -250µA
1.3 ––– –––
S
VDS = -10V, ID = -0.60A
––– ––– -1.0
VDS = -16V, VGS = 0V
µA
––– ––– -25
VDS = -16V, VGS = 0V, TJ = 125°C
––– ––– -100
VGS = -12V
nA
––– ––– 100
VGS = +12V
––– 5.4 8.2
ID = -1.2A
––– 0.96 1.4
nC
V DS = -16V
––– 2.4 3.6
VGS = -4.5V, See Fig. 6 and 9 ƒ
––– 9.1 –––
VDD = -10V
––– 35 –––
I D = -1.2A
ns
––– 38 –––
RG = 6.0Ω
––– 43 –––
RD = 8.3Ω, See Fig. 10 ƒ
––– 240 –––
VGS = 0V
––– 130 –––
pF
VDS = -15V
––– 64 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
t rr
Q rr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
MOSFET symbol
––– ––– -1.25
showing the
A
G
integral reverse
––– ––– -9.6
p-n junction diode.
––– ––– -1.2
V
TJ = 25°C, IS = -1.2A, VGS = 0V ƒ
––– 52
78
ns
TJ = 25°C, IF = -1.2A
––– 63
95
nC
di/dt = 100A/µs ƒ
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
‚ ISD ≤ -1.2A, di/dt ≤ 100A/µs, VDD ≤ V(BR)DSS ,
TJ ≤ 150°C
ƒ Pulse width ≤ 300µs; duty cycle ≤ 2%.
„ Surface mounted on FR-4 board, t ≤ 10sec.
D
S
IRF7504
100
100
VGS
- 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTT OM - 1.5V
10
VGS
- 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTT OM - 1.5V
TOP
-ID , D ra in -to -S o u rce C u rre n t (A )
-I D , D ra in -to -S o u rce C u rre n t (A )
TOP
1
0.1
-1.5 V
20 µs P U LSE W IDTH
TJ = 25 °C
A
0.01
0.1
1
10
1
- 1.5V
0.1
20 µs P UL SE W IDTH
TJ = 150 °C
0.01
10
0.1
1
-VD S , D rain-to-S ource V oltage (V )
Fig 2. Typical Output Characteristics
2.0
R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce
(N o rm a li ze d )
-I D , D rain -to- S our ce C urr ent ( A )
10
T J = 2 5 °C
TJ = 1 5 0 ° C
1
0.1
V DS = -1 0 V
2 0 µ s P U L S E W ID T H
1.5
2.0
2.5
3.0
3.5
4.0
4.5
-VG S , Ga te-to-S o urce V oltage (V )
Fig 3. Typical Transfer Characteristics
A
-VD S , Drain-to-Source V oltage (V )
Fig 1. Typical Output Characteristics
0.01
10
5.0
A
I D = -1.2A
1.5
1.0
0.5
V G S = -4.5 V
0.0
-60
-40
-20
0
20
40
60
80
A
100 120 140 160
T J , Junction T emperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRF7504
10
V GS
C iss
C rs s
C os s
C , C a p a cita n ce (p F )
400
=
=
=
=
0V ,
f = 1 MH z
C gs + C gd , C ds SH O R TED
C gd
C ds + C gd
-V G S , G a te -to -S o u rce V o lta g e (V )
500
C is s
300
C os s
200
C rs s
100
0
10
8
6
4
2
FOR TE ST C IR C U IT
SE E FIG U R E 9
0
A
1
I D = -1 .2A
VD S = -1 6V
0
100
4
6
8
A
10
Q G , Total G ate C harge (nC)
-VD S , D rain-to-S ource V oltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
10
100
OPE R ATIO N IN TH IS A RE A LIMITE D
BY R D S(o n)
T J = 15 0°C
-I D , D ra in C u rre n t (A )
-IS D , R e ve rse D ra in C u rre n t (A )
2
1
T J = 25 °C
0.1
10
1 00µs
1m s
1
10m s
VG S = 0 V
0.01
0.4
0.6
0.8
1.0
-VS D , S ource-to-Drain V oltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
1.2
T A = 25 °C
T J = 15 0°C
S ing le Pulse
0.1
1
A
10
100
-V D S , D rain-to-S ource Voltage (V )
Fig 8. Maximum Safe Operating Area
IRF7504
-4.5V
QGS
RD
VDS
QG
VGS
QGD
D.U.T.
RG
+
VG
VDD
-4.5V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Charge
Fig 10a. Switching Time Test Circuit
Fig 9a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
td(on)
.2µF
tr
t d(off)
tf
VGS
.3µF
D.U.T.
+VDS
10%
VGS
-3mA
90%
IG
VDS
ID
Current Sampling Resistors
Fig 9b. Gate Charge Test Circuit
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJA )
1000
100
D = 0.50
0.20
0.10
10
0.05
PDM
0.02
0.01
1
t1
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.1
0.00001
0.0001
0.001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJA + TA
0.01
0.1
1
10
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
100
IRF7504
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
ƒ
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
‚
-
-
„
+
**

• dv/dt controlled by RG
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
RG
VGS*
+
-
*
VDD
*
Reverse Polarity for P-Channel
** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive
Period
P.W.
D=
P.W.
Period
[
] ***
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[
]
VDD
Forward Drop
Inductor Curent
[
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 12. For P-Channel HEXFETS
]
ISD
IRF7504
Package Outline
Micro8 Outline
Dimensions are shown in millimeters (inches)
L E AD A S S IG N M E N TS
INC H E S
D IM
D
M ILL IM E TE R S
M IN
MAX
M IN
A
.036
.044
0.91
1.11
A1
.004
.008
0.10
0.20
B
.010
.014
0.25
0.36
C
.0 05
.0 07
0 .13
0.18
D
.1 16
.1 20
2 .95
3.05
e
.02 56 B A S IC
0.65 BA S IC
e1
.01 28 B A S IC
0.33 BA S IC
E
.116
.120
2 .9 5
3.05
H
.1 88
.1 98
4 .78
5.03
e
L
.01 6
.0 26
0.4 1
0.6 6
6X
θ
0°
6°
0°
6°
3
-B-
D D D D
D1 D1 D 2 D 2
8 7 6 5
8 7 6 5
SIN G L E
DUAL
8 7 6 5
3
H
E
-A-
0.25 ( .0 10 )
M
A
M
1 2 3 4
1 2 3 4
S S S G
S1 G 1 S2 G2
1 2 3 4
MAX
e1
R EC O M M E N DE D FO O TP R IN T
θ
1.04
( .04 1 )
8X
A
-CB
0 .1 0 (.00 4)
A 1
8X
0.08 ( .0 03 )
M
C
L
8X
A S
B S
0 .3 8
8X
( .01 5 )
C
8X
3 .20
( .12 6 )
4.24
5.28
( .16 7 ) ( .2 08 )
N O TE S :
1 D IM E N S IO N IN G A N D T O LE R A N C IN G P E R A N SI Y 14 .5M -19 82 .
0.65 6 X
( .02 56 )
2 C O N T R O LL IN G D IM E N S IO N : IN C H .
3 D IM E N S IO N S D O N O T IN C L U D E M O LD F LA S H .
Part Marking Information
Micro8
A
D A T E C O D E (Y W W )
Y = L A S T D IG IT O F YE A R
W W = W E EK
E X A M P L E : T H IS IS A N IR F 7 5 0 1
45 1
75 0 1
PART N UMB ER
TOP
IRF7504
Tape & Reel Information
Micro8
Dimensions are shown in millimeters (inches)
T E R M IN A L N U M B E R 1
12 .3 ( .4 8 4 )
11 .7 ( .4 6 1 )
8 .1 ( .3 1 8 )
7 .9 ( .3 1 2 )
F E E D D I R E C T IO N
N O TE S :
1 . O U TL IN E C O N FO R M S TO E IA -4 81 & E IA -5 4 1.
2 . C O N TR O LL IN G D IM E N S IO N : M IL L IM E TE R .
3 30 . 00
( 12 . 99 2 )
MA X.
1 4. 4 0 ( . 56 6 )
1 2. 4 0 ( . 48 8 )
NO T E S :
1. C O N T R O L L IN G D IM E N S IO N : M IL L IM E T E R .
2. O U T L IN E C O N F O R M S T O E I A -48 1 & E IA -5 4 1.
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
8/97