DISCRETE SEMICONDUCTORS DATA SHEET M3D379 M3D461 BLF0810-180; BLF0810S-180 Base station LDMOS transistors Product specification Supersedes data of 2003 May 09 2003 Jun 12 Philips Semiconductors Product specification Base station LDMOS transistors BLF0810-180; BLF0810S-180 FEATURES APPLICATIONS • Typical CDMA IS95 performance at standard settings with a supply voltage of 27 V and IDQ of 1130 mA. Adjacent channel bandwidth is 30 kHz, adjacent channel at ± 750 kHz: • Common source class-AB operation applications in the 860 to 960 MHz frequency range • CDMA and multicarrier applications. – Output power = 30 W DESCRIPTION – Gain = 16 dB 180 W LDMOS power transistor for base station applications at frequencies from 800 to 1000 MHz. – Efficiency = 27% – ACPR = −46 dBc at 750 kHz and BW = 30 kHz • Easy power control • Excellent ruggedness • High power gain • Excellent thermal stability • Designed for broadband operation (800 to 1000 MHz) • Internally matched for ease of use. PINNING - SOT502A PINNING - SOT502B PIN PIN DESCRIPTION DESCRIPTION 1 drain 1 drain 2 gate 2 gate 3 source; connected to flange 3 source; connected to flange handbook, halfpage 1 1 3 2 Top view 3 2 Top view MBK394 Fig.1 Simplified outline SOT502A (BLF0810-180). MBL105 Fig.2 Simplified outline SOT502B (BLF0810S-180). QUICK REFERENCE DATA Typical RF performance at Th = 25 °C in a common source test circuit. MODE OF OPERATION Class-AB (2-tone) CDMA (IS95) 2003 Jun 12 f (MHz) VDS (V) PL (W) Gp (dB) ηD (%) d3 (dBc) ACPR 750 (dBc) f1 = 890.0; f2 = 890.1 27 140 (PEP) 16 39 −28 − 890 27 30 (AV) 16 27 − −46 2 Philips Semiconductors Product specification Base station LDMOS transistors BLF0810-180; BLF0810S-180 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER MIN. MAX. UNIT VDS drain-source voltage − 75 V VGS gate-source voltage − ±15 V Tstg storage temperature −65 +150 C Tj junction temperature − 200 °C THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS VALUE UNIT Rth j-c thermal resistance from junction to case Th = 25 °C, PL = 35 W (AV), note 1 0.42 K/W Rth j-hs thermal resistance from heatsink to junction Th = 25 °C, PL = 35 W (AV), note 2 0.62 K/W Notes 1. Thermal resistance is determined under RF operating conditions. 2. Depending on mounting condition in application. CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(BR)DSS drain-source breakdown voltage VGS = 0; ID = 3 mA 75 − − V VGSth gate-source threshold voltage VDS = 10 V; ID = 300 mA 4 − 5 V IDSS drain-source leakage current VGS = 0; VDS = 36 V − − 3 µA IDSX on-state drain current VGS = VGSth + 9 V; VDS = 10 V 45 − − A IGSS gate leakage current VGS = ±20 V; VDS = 0 − − 1 µA gfs forward transconductance VDS = 10 V; ID = 10 A − 9 − S RDSon drain-source on-state resistance VGS = 9 V; ID = 10 A − 60 − mΩ 2003 Jun 12 3 Philips Semiconductors Product specification Base station LDMOS transistors BLF0810-180; BLF0810S-180 APPLICATION INFORMATION RF performance in a common source class-AB circuit. VDS = 27 V; IDQ = 1130 mA; f = 890 MHz; Th = 25 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Mode of operation: 2-tone CW, 100 kHz spacing Gp gain power PL = 90 W (PEP) 15 16 − dB ηD drain efficiency 24 30 − % IRL input return loss − −13 −6 dB d3 third order intermodulation distortion − −40 − dBc Gp gain power − 16 − dB ηD drain efficiency 33 37 − % d3 third order intermodulation distortion − −32 −27 dBc ruggedness PL = 125 W (PEP) VSWR = 15 : 1 through all phases; PL = 125 W (PEP) no degradation in output power Mode of operation: CDMA, IS95 (pilot, paging, sync and traffic codes 8 to 13) Gp gain power PL = 30 W (AV) − ηD drain efficiency PL = 30 W (AV) ACPR 750 adjacent channel power ratio at BW = 30 kHz 2003 Jun 12 4 16 − dB − 27 − % − −46 − dBc Philips Semiconductors Product specification Base station LDMOS transistors MDB158 50 handbook, halfpage η BLF0810-180; BLF0810S-180 handbook, halfpage gain (dB) 16.5 (4) (%) 40 MDB159 −20 17 d3 (dBc) −30 η(1,2,3) 16 (5) 30 −40 15.5 20 (1) 15 (6) (2) −50 10 (3) 14.5 0 −60 14 100 150 PL (PEP) (W) 0 50 VDS = 27 V; IDQ = 1.1 A; f1 = 890.0 MHz; f2 = 890.1 MHz. Fig.3 (5) gain at Th = 20 °C. (6) gain at Th = 80 °C. 2-tone power gain and efficiency as functions of load power at different temperatures. Fig.4 MDB160 −30 50 100 150 PL (PEP) (W) VDS = 27 V; IDQ = 1.1 A; f1 = 890.0 MHz; f2 = 890.1 MHz. (1) Th = −40 °C. (2) Th = 20 °C. (3) Th = 80 °C. (4) gain at Th = −40 °C. (1) η at Th = −40 °C. (2) η at Th = 20 °C. (3) η at Th = 80 °C. 0 Third order intermodulation distortion as a function of load power at different temperatures. MDB161 −40 handbook, halfpage handbook, halfpage d5 (dBc) d7 (dBc) (3) (3) (2) −40 −50 (1) (1) (2) −50 −60 −60 −70 −70 0 50 100 150 PL (PEP) (W) 0 50 100 150 PL (PEP) (W) VDS = 27 V; IDQ = 1.1 A; f1 = 890.0 MHz; f2 = 890.1 MHz. (1) Th = −40 °C. (2) Th = 20 °C. (3) Th = 80 °C. VDS = 27 V; IDQ = 1.1 A; f1 = 890.0 MHz; f2 = 890.1 MHz. (1) Th = −40 °C. (2) Th = 20 °C. (3) Th = 80 °C. Fig.5 Fig.6 Fifth order intermodulation distortion as a function of load power at different temperatures. 2003 Jun 12 5 Seventh order intermodulation distortion as a function of load power at different temperatures. Philips Semiconductors Product specification Base station LDMOS transistors MDB162 20 handbook, halfpage gain (dB) 40 dim (dBc) −20 30 (1) MDB163 0 handbook, halfpage ηD (%) (2) 15 BLF0810-180; BLF0810S-180 (3) 10 −40 20 (4) 5 0 −80 0 100 150 PL (PEP) (W) 50 (4) (6) (3) −60 10 0 (2) (5) (1) 0 50 100 150 PL (PEP) (W) VDS = 27 V; f1 = 890.0 MHz; f2 = 890.1 MHz. VDS = 27 V; f1 = 890.0 MHz; f2 = 890.1 MHz. Fig.7 (1) d3; IDQ = 1 A. (2) d5; IDQ = 1 A. (3) d7; IDQ = 1 A. (3) IDQ = 1 A. (4) IDQ = 1.45 A. (1) IDQ = 1 A. (2) IDQ = 1.45 A. Power gain and drain efficiency as functions of peak envelope load power; typical values. Fig.8 MDB164 −45 ACPR (dBc) −50 Intermodulation distortion as a function of peak envelope load power; typical values. MDB165 −40 handbook, halfpage handbook, halfpage ACPR (dBc) ACPR at 750 kHz −50 (2) −55 (4) d3; IDQ = 1.3 A. (5) d5; IDQ = 1.3 A. (6) d7; IDQ = 1.3 A. ACPR at 750 kHz (1) (1) −60 −60 (2) −65 ACPR at 1.98 MHz −70 ACPR at 1.98 MHz −70 (4) (3) (4) (3) −75 40 41 42 43 −80 44 45 PL (AV) (dBm) 0 10 20 30 40 PL (PEP) (W) VDS = 27 V; f = 894 MHz; IDQ = 1.1 A. VDS = 27 V; f = 894 MHz. (1) IDQ = 1 .1A. (2) IDQ = 1.4 A. Fig.9 (1) Th = 20 °C. (2) Th = 80 °C. (3) IDQ = 1.1 A. (4) IDQ = 1.4 A. Fig.10 CDMA IS95 ACPR distortion as a function of peak envelope load power at different temperatures. CDMA IS95 ACPR distortion as a function of average load power and IDQ. 2003 Jun 12 (3) Th = 20 °C. (4) Th = 80 °C. 6 Philips Semiconductors Product specification Base station LDMOS transistors BLF0810-180; BLF0810S-180 MDB166 2 MDB167 2 handbook, Z halfpage handbook, Z halfpage L (Ω) i (Ω) 1.5 1.5 ri 1 1 RL 0.5 0.5 0 0 xi −1 0.85 XL −0.5 −0.5 0.9 0.95 −1 0.85 1 f (GHz) 0.9 0.95 f (GHz) 1 Class-AB operation; VDS = 27 V; IDQ = 1125 mA; PL = 35 W. Values comprised for different parameters. Class-AB operation; VDS = 27 V; IDQ = 1125 mA; PL = 35 W. Values comprised for different parameters. Fig.11 Input impedance as a function of frequency (series components); typical values. Fig.12 Load impedance as a function of frequency (series components); typical values. drain handbook, halfpage ZL gate Z IN MGS998 Fig.13 Definition of transistor impedance. 2003 Jun 12 7 Philips Semiconductors Product specification Base station LDMOS transistors BLF0810-180; BLF0810S-180 handbook, full pagewidth C2 C15 C3 Q1 C4 L12 C6 Vbias L9 C17 R1 L10 C9 C7 Vsupply L5 C10 L7 L3 RF in L1 C1 L2 L4 Q2 L11 L14 L6 L15 L16 RF out C13 C18 C5 C11 L8 C12 C8 L13 C16 C14 MDB168 Fig.14 Test circuit for 860 to 900 MHz. 2003 Jun 12 8 Philips Semiconductors Product specification Base station LDMOS transistors BLF0810-180; BLF0810S-180 handbook, full pagewidth BLF0810-180 output Rev C C2 C4 C15 C17 C6 C9 C3 C1 C10 L5 R1 C7 C5 C13 C18 C8 C11 C12 C16 C14 BLF0810-180 input Rev C BLF0810-180 output Rev C 60 60 BLF0810-180 input Rev C 40 40 MDB169 Dimensions in mm. The components are situated on one side of the copper-clad Rogers 6006 printed-circuit board (εr = 6.15); thickness = 25 mm. The other side is unetched and serves as a ground plane. Fig.15 Component layout for 860 to 900 MHz test circuit. 2003 Jun 12 9 Philips Semiconductors Product specification Base station LDMOS transistors BLF0810-180; BLF0810S-180 List of components (see Figs 14 and 15) COMPONENT DESCRIPTION VALUE DIMENSIONS C1, C6, C13, C14, C15, C16, C17 multilayer ceramic chip capacitor; note 1 68 pF C2 multilayer ceramic chip capacitor; note 1 330 nF C3 multilayer ceramic chip capacitor; note 1 100 nF C4, C9, C10, C11, C12 tantalum capacitor 10 µF C5, C18 air trimmer capacitor 5 pF C7, C8 multilayer ceramic chip capacitor 8.2 pF R1 potentiometer 1 kΩ Q1 7808 voltage regulator Q2 BLF0810-180/BLF0810S-180 LDMOS transistor L1 stripline; note 2 5.22 × 0.92 mm L2 stripline; note 2 6.47 × 0.92 mm L3 stripline; note 2 5.38 × 4.8 mm L4 stripline; note 2 2.4 × 0.92 mm L5 ferroxcube L6 stripline; note 2 9.73 × 0.92 mm L7 stripline; note 2 1.82 × 9.3 mm L8 stripline; note 2 8.15 × 17.9 mm L9 stripline; note 2 44 × 0.92 mm L10 stripline; note 2 18.45 × 28.3 mm L11 stripline; note 2 9.95 × 5.38 mm L12, L13 stripline; note 2 37.6 × 3.35 mm L14 stripline; note 2 2.36 × 0.92 mm L15, L16 stripline; note 2 4.22 × 0.92 mm Notes 1. American Technical Ceramics type 100A or capacitor of same quality. 2. The striplines are on a double copper-clad Rogers 6006 printed-circuit board (εr = 6.15); thickness = 0.64 mm 2003 Jun 12 10 Philips Semiconductors Product specification Base station LDMOS transistors BLF0810-180; BLF0810S-180 PACKAGE OUTLINES Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A D A F 3 D1 U1 B q c C 1 H L E1 p U2 E w1 M A M B M A 2 w2 M C M b 0 5 Q 10 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A b c mm 4.72 3.43 12.83 12.57 0.15 0.08 inches 0.186 0.135 0.505 0.006 0.495 0.003 OUTLINE VERSION D E E1 F H L p Q q U1 U2 w1 w2 20.02 19.96 19.61 19.66 9.50 9.30 9.53 9.25 1.14 0.89 19.94 18.92 5.33 4.32 3.38 3.12 1.70 1.45 27.94 34.16 33.91 9.91 9.65 0.25 0.51 0.788 0.786 0.772 0.774 0.374 0.375 0.366 0.364 0.067 1.100 0.057 1.345 1.335 0.390 0.380 0.01 0.02 D1 0.045 0.785 0.035 0.745 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-28 03-01-10 SOT502A 2003 Jun 12 0.210 0.133 0.170 0.123 11 Philips Semiconductors Product specification Base station LDMOS transistors BLF0810-180; BLF0810S-180 Earless flanged LDMOST ceramic package; 2 leads SOT502B D A F 3 D D1 c U1 1 L H E1 U2 E 2 w2 M D M b 0 5 Q 10 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A b c mm 4.72 3.43 12.83 12.57 0.15 0.08 inches 0.186 0.135 0.505 0.006 0.495 0.003 OUTLINE VERSION D E E1 F H L Q U1 U2 w2 20.02 19.96 19.61 19.66 9.50 9.30 9.53 9.25 1.14 0.89 19.94 18.92 5.33 4.32 1.70 1.45 20.70 20.45 9.91 9.65 0.25 0.788 0.786 0.772 0.774 0.374 0.375 0.366 0.364 0.045 0.785 0.035 0.745 0.210 0.170 0.067 0.815 0.057 0.805 D1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-28 03-01-10 SOT502B 2003 Jun 12 0.390 0.010 0.380 12 Philips Semiconductors Product specification Base station LDMOS transistors BLF0810-180; BLF0810S-180 DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2003 Jun 12 13 Philips Semiconductors Product specification Base station LDMOS transistors BLF0810-180; BLF0810S-180 NOTES 2003 Jun 12 14 Philips Semiconductors Product specification Base station LDMOS transistors BLF0810-180; BLF0810S-180 NOTES 2003 Jun 12 15 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: [email protected]. SCA75 © Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613524/06/pp16 Date of release: 2003 Jun 12 Document order number: 9397 750 11545