DISCRETE SEMICONDUCTORS DATA SHEET M3D379 M3D461 BLF900-110; BLF900S-110 Base station LDMOS transistors Product specification Supersedes data of 2003 Sep 22 2004 Feb 04 Philips Semiconductors Product specification Base station LDMOS transistors BLF900-110; BLF900S-110 FEATURES APPLICATIONS • Typical CDMA IS95 performance at standard settings with a supply voltage of 27 V, frequency of 881.5 MHz and IDQ of 700 mA; adjacent channel bandwidth is 30 kHz, adjacent channel at ± 750 kHz: • RF power amplifier for GSM, EDGE and CDMA base stations and multicarrier operations in the 800 to 1000 MHz frequency range. – Output power = 24 W (AV) DESCRIPTION – Gain = 15 dB 110 W LDMOS power transistor for base station applications at frequencies from 800 to 1000 MHz. – Efficiency = 27% – ACPR = −45 dBc at 750 kHz and BW = 30 kHz. • 110 W CW performance • Easy power control • Excellent ruggedness • High power gain • Excellent thermal stability • Designed for broadband operation (800 to 1000 MHz) • Internally matched for ease of use. PINNING - SOT502A PINNING - SOT502B PIN PIN DESCRIPTION DESCRIPTION 1 drain 1 drain 2 gate 2 gate 3 source; connected to flange 3 source; connected to flange handbook, halfpage 1 1 3 2 Top view 2 3 Top view MBL105 MBK394 Leads are gold-plated. Fig.1 Simplified outline SOT502A (BLF900-110). Fig.2 Simplified outline SOT502B (BLF900S-110). QUICK REFERENCE DATA Typical RF performance at Th = 25 °C in a common source test circuit. MODE OF OPERATION 2-tone, class-AB CDMA (IS95) 2004 Feb 04 f (MHz) VDS (V) PL (W) Gp (dB) ηD (%) d3 (dBc) ACPR 750 (dBc) f1 = 890.0; f2 = 890.1 27 100 (PEP) 17 38 −33 − 881.5 27 24 (AV) 15 27 − −45 2 Philips Semiconductors Product specification Base station LDMOS transistors BLF900-110; BLF900S-110 ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION BLF900-110 − Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A BLF900S-110 − Earless flanged LDMOST ceramic package; 2 leads SOT502B LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER MIN. MAX. UNIT VDS drain-source voltage − 75 V VGS gate-source voltage − ±15 V Tstg storage temperature −65 +150 °C Tj junction temperature − 200 °C THERMAL CHARACTERISTICS SYMBOL Rth(j-c) PARAMETER thermal resistance from junction to case CONDITIONS VALUE UNIT Th = 25 °C, PL = 160 W (AV), note 1 0.9 K/W Note 1. Thermal resistance is determined under specified RF operating conditions. CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(BR)DSS drain-source breakdown voltage VGS = 0; ID = 3 mA 75 − − V VGSth gate-source threshold voltage VDS = 10 V; ID = 250 mA 4.5 − 5.5 V IDSS drain-source leakage current VGS = 0; VDS = 28 V − − 3 µA IDSX on-state drain current VGS = VGSth + 9 V; VDS = 10 V 31 − − A IGSS gate leakage current VGS = ±15 V; VDS = 0 − − 0.5 µA gfs forward transconductance VDS = 20 V; ID = 7.5 A − 7 − S RDSon drain-source on-state resistance VGS = VGSth + 9 V; ID = 9 A − 90 − mΩ 2004 Feb 04 3 Philips Semiconductors Product specification Base station LDMOS transistors BLF900-110; BLF900S-110 APPLICATION INFORMATION RF performance in a common source class-AB circuit. VDS = 27 V; f = 890 MHz; Th = 25 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Mode of operation: 2-tone CW, 100 kHz spacing, IDQ = 700 mA 16 17 (1) − dB drain efficiency 35 38 − % IRL input return loss − −9 <−6 dB d3 third order intermodulation distortion − −33 −27 dBc Gp power gain ηD PL = 100 W (PEP) ruggedness VSWR = 10 : 1 through all phases; PL = 125 W (PEP) no degradation in output power Mode of operation: CDMA, IS95 (pilot, paging, sync and traffic codes 8 to 13), IDQ = 575 mA Gp power gain PL = 24 W (AV) − 15 − dB ηD drain efficiency PL = 24 W (AV) − 27 − % ACPR 750 adjacent channel power ratio at BW = 30 kHz − −45 − dBc Note 1. Refer to RF Gain grouping table. RF Gain grouping GAIN(2) (dB) CODE(1) MAX. B 16.0 16.5 C 16.5 17.0 D 17.0 17.5 E 17.5 18.0 Notes 1. 0.2 dB overlap is allowed for measurement repeatability. 2. For 2-tone at f1 = 890 MHz; f2 = 890.1 MHz. 2004 Feb 04 MIN. 4 Philips Semiconductors Product specification Base station LDMOS transistors MLE343 22 handbook, halfpage BLF900-110; BLF900S-110 handbook, halfpage ηD (%) Gp (dB) 18 MLE344 18 Gp 60 (dB) 17 50 ηD (%) Gp 40 40 Gp 16 30 ηD 14 15 20 14 10 20 ηD 10 1 10 102 Pout (W) 13 0 103 0 80 40 0 120 PL(PEP) (W) VDS = 27 V; IDQ = 700 mA; f = 890 MHz. VDS = 27 V; IDQ = 700 mA; f1 = 890.0 MHz; f2 = 890.1 MHz. Fig.3 Fig.4 Power gain and efficiency as functions of load power; typical values. MLE345 0 Power gain and efficiency as functions of peak envelope load power; typical values. MLE346 0 handbook, halfpage handbook, halfpage dim (dBc) dim (dBc) −20 −20 −40 (1) (2) −40 (1) −60 (3) (2) (3) −60 10 1 102 −80 103 1 10 PL(PEP) (W) VDS = 27 V; f1 = 890.0 MHz; f2 = 890.1 MHz. (1) IDQ = 600 mA. Fig.5 (2) IDQ = 800 mA. 103 PL(PEP) (W) VDS = 27 V; IDQ = 700 mA; f1 = 890.0 MHz; f2 = 890.1 MHz. (3) IDQ = 700 mA. (1) d3. Third order intermodulation distortion as a function of peak envelope load power; typical values. 2004 Feb 04 102 Fig.6 5 (2) d5. (3) d7. Third order intermodulation distortion as a function of peak envelope load power; typical values. Philips Semiconductors Product specification Base station LDMOS transistors BLF900-110; BLF900S-110 MLE348 1.5 handbook, halfpage ri ZI (Ω) ZL (Ω) 0.5 2.5 −0.5 2 −1.5 XL 0.88 0.87 0.89 f (GHz) 1 0.86 0.9 Input impedance as a function of frequency (series components); typical values. mle347 Gp 40 (dB) 0.87 0.88 0.89 f (GHz) 0.9 Class-AB operation; VDS = 27 V; IDQ = 700 mA; PL = 100 W. Values comprised for different parameters. Class-AB operation; VDS = 27 V; IDQ = 700 mA; PL = 100 W. Values comprised for different parameters. Fig.7 RI 1.5 xi −2.5 0.86 MLE349 3 handbook, halfpage Fig.8 Input impedance as a function of frequency (series components); typical values. −40 ACPR (dB) ηD (%) −50 30 ADJ ηD 20 −60 Gp drain handbook, halfpage ALT 10 −70 ZL gate 0 24 32 40 Pout (dBm) 48 Z IN −80 MGS998 VDS = 27 V;IDQ = 575 mA; f = 881.5 MHz. Test signal: Single carrier IS-97 CDMA with PAR = 9.5 dB at 0.01 % (pilot, paging, sync, 6 traffic channels with Walsh codes 8-13). ADJ at 750 kHz offset in 30 kHz BW; ALT at 1.98 MHz offset in 30 kHz BW. Fig.9 Single carrier CDMA performance as a function of output power. 2004 Feb 04 Fig.10 Definition of transistor impedance. 6 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... R1 L4 R2 L1 C8 R3 C13 Vdd Philips Semiconductors Base station LDMOS transistors 2004 Feb 04 C19 C18 C9 C3 C10 C4 7 L5 C1 L6 L7 C12 D.U.T. C2 L2 L3 L 11 L8 L9 C17 L 12 L 10 RF in RF out C6 C5 C11 C14 C15 mle351 Product specification Fig.11 Test circuit for 860 to 900 MHz operation. C16 BLF900-110; BLF900S-110 C7 Philips Semiconductors Product specification Base station LDMOS transistors BLF900-110; BLF900S-110 58.5 58.5 L3 71 PHILIPS PHILIPS 900 MHz Input Rev. 1 900 MHz Output Rev. 1 C19 _ R1 R2 L4 R3 C18 C8 +V9 L6 L2 L7 Vdd + C13 C12 C10 C4 C3 C2 L5 C9 L1 L3 L9 L8 L10 C15 L11 L12 C17 C1 C14 C6 C7 C5 C16 C11 PHILIPS PHILIPS 900 MHz Input Rev. 1 900 MHz Output Rev. 1 mle350 Dimensions in mm. The components are situated on one side of the copper-clad Ultralam 2000 printed-circuit board (εr = 2.5); thickness = 31 mm. The other side is unetched and serves as a ground plane. Fig.12 Component layout for 860 to 900 MHz test circuit. 2004 Feb 04 8 Philips Semiconductors Product specification Base station LDMOS transistors BLF900-110; BLF900S-110 List of components (see Figs 11 and 12) COMPONENT DESCRIPTION VALUE DIMENSIONS C1 multilayer ceramic chip capacitor; note 1 30 pF C2, C12 multilayer ceramic chip capacitor; note 1 47 pF C3, C13 multilayer ceramic chip capacitor; note 1 300 pF C4 multilayer ceramic chip capacitor; note 1 10 pF C5 multilayer ceramic chip capacitor; note 1 3 pF C6, C7, C15 trimmer capacitors (Tekelec); note 2 0.8 to 8 pF C8 multilayer ceramic chip capacitor; note 1 20 nF C9 tantalum capacitor 10 µF; 35 V C10, C11 multilayer ceramic chip capacitor; note 1 13 pF C14 multilayer ceramic chip capacitor; note 1 8.2 pF C16 trimmer capacitor 0.5 to 4.5 pF C17 multilayer ceramic chip capacitor; note 1 56 pF C18 tantalum capacitor; low ESR 10 µF; 35 V C19 electrolytic capacitor 220 µF; 40 V L1 ferrite bead (long) grade 4S2 L2 3 turn ind. copper wire 1 mm; int dia = 4.5 mm L3 4 turn ind. copper wire 1 mm; int dia = 3 mm L4 ferrite bead (short) grade 4S2 L5 stripline; note 3 Z0 = 50 Ω 2 x 17.2 mm L6 stripline; note 3 Z0 = 50 Ω 2 x 25.4 mm L7 stripline; note 3 Z0 = 50 Ω 5.6 x 17.4 mm L8 stripline; note 3 Z0 = 50 Ω 16 x 10.2 mm L9 stripline; note 3 Z0 = 10 Ω 16 x 10.2 mm L10 stripline; note 3 Z0 = 25 Ω 5.6 x 17.4 mm L11 stripline; note 3 Z0 = 50 Ω 2 x 25.4 mm L12 stripline; note 3 Z0 = 50 Ω 2 x 17.2 mm R1 SMD resistor 8.2 Ω, 0.1 W R2 SMD resistor 4.7 Ω, 0.1 W R3 metal film resistor 10 Ω, 0.6 W Notes 1. American Technical Ceramics type 100A or capacitor of same quality. 2. Mounted flat. 3. Striplines are on a double copper-clad Ultralam 2000 printed-circuit board (εr = 2.5); thickness = 0.31 mm. 2004 Feb 04 9 Philips Semiconductors Product specification Base station LDMOS transistors BLF900-110; BLF900S-110 PACKAGE OUTLINES Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A D A F 3 D1 U1 B q c C 1 H L E1 p U2 E w1 M A M B M A 2 w2 M C M b 0 5 Q 10 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A b c mm 4.72 3.43 12.83 12.57 0.15 0.08 inches 0.186 0.135 0.505 0.006 0.495 0.003 OUTLINE VERSION E E1 F H L p Q q U1 U2 w1 w2 20.02 19.96 19.61 19.66 9.50 9.30 9.53 9.25 1.14 0.89 19.94 18.92 5.33 4.32 3.38 3.12 1.70 1.45 27.94 34.16 33.91 9.91 9.65 0.25 0.51 0.788 0.786 0.772 0.774 0.374 0.375 0.366 0.364 0.067 1.100 0.057 1.345 1.335 0.390 0.380 0.01 0.02 D D1 0.045 0.785 0.035 0.745 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-28 03-01-10 SOT502A 2004 Feb 04 0.210 0.133 0.170 0.123 10 Philips Semiconductors Product specification Base station LDMOS transistors BLF900-110; BLF900S-110 Earless flanged LDMOST ceramic package; 2 leads SOT502B D A F 3 D D1 c U1 1 L H E1 U2 E 2 w2 M D M b 0 5 Q 10 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A b c mm 4.72 3.43 12.83 12.57 0.15 0.08 inches 0.186 0.135 0.505 0.006 0.495 0.003 OUTLINE VERSION E E1 F H L Q U1 U2 w2 20.02 19.96 19.61 19.66 9.50 9.30 9.53 9.25 1.14 0.89 19.94 18.92 5.33 4.32 1.70 1.45 20.70 20.45 9.91 9.65 0.25 0.788 0.786 0.772 0.774 0.374 0.375 0.366 0.364 0.045 0.785 0.035 0.745 0.210 0.170 0.067 0.815 0.057 0.805 D D1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-28 03-01-10 SOT502B 2004 Feb 04 0.390 0.010 0.380 11 Philips Semiconductors Product specification Base station LDMOS transistors BLF900-110; BLF900S-110 DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2004 Feb 04 12 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: [email protected]. SCA76 © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R77/02/pp13 Date of release: 2004 Feb 04 Document order number: 9397 750 12171