bq2004 Fast-Charge IC Features General Description ➤ Fast charge and conditioning of nickel cadmium or nickel-metal hydride batteries The bq2004 Fast Charge IC provides comprehensive fast charge control functions together with high-speed switching power control circuitry on a monolithic CMOS device. ➤ Hysteretic PWM switch-mode current regulation or gated control of an external regulator ➤ Easily integrated into systems or used as a stand-alone charger ➤ Pre-charge qualification of temperature and voltage ➤ Configurable, direct LED outputs display battery and charge status ➤ Fast-charge termination by ∆ temperature/∆ time, peak volume detection, -∆V, maximum voltage, maximum temperature, and maximum time Integration of closed-loop current control circuitry allows the bq2004 to be the basis of a cost-effective solution for stand-alone and systemintegrated chargers for batteries of one or more cells. Switch-activated discharge-beforecharge allows bq2004-based chargers to support battery conditioning and capacity determination. ➤ Opt i o na l to p - o f f cha r g e a nd pulsed current maintenance charging High-efficiency power conversion is accomplished using the bq2004 as a hysteretic PWM controller for switch-mode regulation of the charging current. The bq2004 may alternatively be used to gate an externally regulated charging current. ➤ Logic-level controlled low-power mode (< 5µA standby current) Fast charge may begin on application of the charging supply, replacement Pin Connections Pin Names of the battery, or switch depression. For safety, fast charge is inhibited unless/until the battery temperature and voltage are within configured limits. Temperature, voltage, and time are monitored throughout fast charge. Fast charge is terminated by any of the following: n Rate of temperature time (∆T/∆t) n Peak voltage detection (PVD) n Negative delta voltage (-∆V) n Maximum voltage n Maximum temperature n Maximum time After fast charge, optional top-off and pulsed current maintenance phases are available. DCMD Discharge command SNS Sense resistor input DSEL Display select LED1 Charge status output 1 VSEL Voltage termination select LED2 Charge status output 2 VSS System ground TM1 Timer mode select 1 VCC 5.0V ± 10% power TM2 Timer mode select 2 MOD Charge current control DIS Discharge control output INH Charge inhibit input DCMD 1 16 INH DSEL 2 15 DIS VSEL 3 14 MOD TM1 4 13 VCC TM2 5 12 VSS TCO 6 11 LED2 TCO Temperature cutoff TS 7 10 LED1 TS Temperature sense BAT 8 9 SNS BAT Battery voltage 16-Pin Narrow DIP or Narrow SOIC PN2004E01.eps SLUS063–JUNE 1999 F 1 bq2004 SNS Pin Descriptions DCMD SNS controls the switching of MOD based on an external sense resistor in the current path of the battery. SNS is the reference potential for both the TS and BAT pins. If SNS is connected to VSS, then MOD switches high at the beginning of charge and low at the end of charge. Discharge-before-charge control input The DCMD input controls the conditions that enable discharge-before-charge. DCMD is pulled up internally. A negative-going pulse on DCMD initiates a discharge to endof-discharge voltage (EDV) on the BAT pin, followed by a new charge cycle start. Tying D C M D to g r o und e nabl e s a u t om a t ic discharge-before-charge on every new charge cycle start. DSEL VSEL LED1– LED2 Display select input VSS Ground This three-state input configures the charge status display mode of the LED1 and LED2 outputs. See Table 2. VCC VCC supply input Voltage termination select input MOD 5.0V, ±10% power input. Timer mode inputs DIS INH Temperature cut-off threshold input Charge inhibit input When low, the bq2004 suspends all charge actions, drives all outputs to high impedance, and assumes a low-power operational state. When transitioning from low to high, a new charge cycle is started. Temperature sense input Input, referenced to SNS, for an external thermister monitoring battery temperature. BAT Discharge control output Push-pull output used to control an external transistor to discharge the battery before charging. Input to set maximum allowable battery temperature. If the potential between TS and SNS is less than the voltage at the TCO input, then fast charge or top-off charge is terminated. TS Charge current control output MOD is a push-pull output that is used to control the charging current to the battery. MOD switches high to enable charging current to flow and low to inhibit charging current flow. TM1 and TM2 are three-state inputs that configure the fast charge safety timer, voltage termination hold-off time, “top-off ”, and trickle charge control. See Table 1. TCO Charge status outputs Push-pull outputs indicating charging status. See Table 2. This three-state input controls the voltagetermination technique used by the bq2004. When high, PVD is active. When floating, -∆V is used. When pulled low, both PVD and -∆V are disabled. TM1– TM2 Charging current sense input Battery voltage input BAT is the battery voltage sense input, referenced to SNS. This is created by a highimpedance resistor-divider network connected between the positive and the negative terminals of the battery. 2 bq2004 Functional Description Discharge-Before-Charge Figure 3 shows a block diagram and Figure 4 shows a state diagram of the bq2004. The DCMD input is used to command discharge-beforecharge via the DIS output. Once activated, DIS becomes active (high) until VCELL falls below VEDV, at which time DIS goes low and a new fast charge cycle begins. Battery Voltage and Temperature Measurements The DCMD input is internally pulled up to VCC (its inactive state). Leaving the input unconnected, therefore, results in disabling discharge-before-charge. A negative going pulse on DCMD initiates discharge-before-charge at any time regardless of the current state of the bq2004. If DCMD is tied to VSS, discharge-before-charge will be the first step in all newly started charge cycles. Battery voltage and temperature are monitored for maximum allowable values. The voltage presented on the battery sense input, BAT, should represent a two-cell potential for the battery under charge. A resistor-divider ratio of: RB1 N = -1 RB2 2 Starting a Charge Cycle is recommended to maintain the battery voltage within the valid range, where N is the number of cells, RB1 is the resistor connected to the positive battery terminal, and RB2 is the resistor connected to the negative battery terminal. See Figure 1. A new charge cycle (see Figure 2) is started by: 1. VCC rising above 4.5V 2. VCELL falling through the maximum cell voltage, VMCV where: Note: This resistor-divider network input impedance to end-to-end should be at least 200kΩ and less than 1MΩ. VMCV = 0.8 ∗ VCC ± 30mV 3. A ground-referenced negative temperature coefficient thermistor placed in proximity to the battery may be used as a low-cost temperature-to-voltage transducer. The temperature sense voltage input at TS is developed using a resistor-thermistor network between VCC and VSS. See Figure 1. Both the BAT and TS inputs are referenced to SNS, so the signals used inside the IC are: A transition on the INH input from low to high. If DCMD is tied low, a discharge-before-charge is executed as the first step of the new charge cycle. Otherwise, pre-charge qualification testing is the first step. The battery must be within the configured temperature and voltage limits before fast charging begins. The valid battery voltage range is VEDV < VBAT < VMCV where: VBAT - VSNS = VCELL and VEDV = 0.4 ∗ VCC ± 30mV VTS - VSNS = VTEMP The valid temperature range is VHTF < VTEMP < VLTF, where: Negative Temperature Coefficient Thermister VCC PACK + RT1 PACK+ bq2004 TS RB1 bq2004 BAT RB2 SNS RT2 N T C SNS PACK- PACK - Fg2004a.eps Figure 1. Voltage and Temperature Monitoring 3 bq2004 Discharge Charge Pending* Fast Charging Top-Off Pulse-Trickle (Optional) (Optional) (Pulse-Trickle) DIS 260 s 260 s Switch-mode MOD Configuration or 2080 s 260 s Note* 2080 s Note* 260 s External MOD Regulation (SNS Grounded) Mode 1, LED2 Status Output Mode 1, LED1 Status Output Mode 2, LED2 Status Output Mode 2, LED1 Status Output Mode 3, LED2 Status Output Mode 3, LED1 Status Output Battery within temperature/voltage limits. Battery discharged to 0.4 * VCC. Battery outside temperature/voltage limits. Discharge-Before-Charge started *See Table 3 for pulse-trickle period. TD200401a.eps Figure 2. Charge Cycle Phases 4 bq2004 VLTF = 0.4 ∗ VCC ± 30mV sulting sample periods (9.17ms and 18.18ms, respectively) filter out harmonics centered around 55Hz and 109Hz. This technique minimizes the effect of any AC line ripple that may feed through the power supply from either 50Hz or 60Hz AC sources. Tolerance on all timing is ±16%. VHTF = [(1/4 ∗ VLTF) + (3/4 ∗ VTCO)] ± 30mV Note: The low temperature fault (LTF) threshold is not enforced if the IC is configured for PVD termination (VSEL = high). Voltage Termination Hold-off VTCO is the voltage presented at the TCO input pin, and is configured by the user with a resistor divider between VCC and ground. The allowed range is 0.2 to 0.4 ∗ VCC. A hold-off period occurs at the start of fast charging. During the hold-off period, -∆V termination is disabled. This avoids premature termination on the voltage spikes sometimes produced by older batteries when fast-charge current is first applied. ∆T/∆t, maximum voltage and maximum temperature terminations are not affected by the hold-off period. If the temperature of the battery is out of range, or the voltage is too low, the chip enters the charge pending state and waits for both conditions to fall within their allowed limits. The MOD output is modulated to provide the configured trickle charge rate in the charge pending state. There is no time limit on the charge pending state; the charger remains in this state as long as the voltage or temperature conditons are outside of the allowed limits. If the voltage is too high, the chip goes to the battery absent state and waits until a new charge cycle is started. ∆T/∆t Termination The bq2004 samples at the voltage at the TS pin every 34s, and compares it to the value measured two samples earlier. If VTEMP has fallen 16mV ±4mV or more, fast charge is terminated. If VSEL = high, the ∆T/∆t termination test is valid only when VTCO < VTEMP < VTCO + 0.2 ∗ VCC. Otherwise the ∆T/∆t termination test is valid only when VTCO < VTEMP < VLTF. Fast charge continues until termination by one or more of the six possible termination conditions: n Delta temperature/delta time (∆T/∆t) n Peak voltage detection (PVD) n Negative delta voltage (-∆V) n Maximum voltage n Maximum temperature n Maximum time Temperature Sampling Each sample is an average of 16 voltage measurements taken 57µs apart. The resulting sample period (18.18ms) filters out harmonics around 55Hz. This technique minimizes the effect of any AC line ripple that may feed through the power supply from either 50Hz or 60Hz AC sources. Tolerance on all timing is ±16%. Maximum Voltage, Temperature, and Time PVD and -∆V Termination Anytime VCELL rises above VMCV, the LEDs go off and charging ceases immediately. If VCELL then falls back below VMCV before tMCV = 1.5s ±0.5s, the chip transitions to the Charge Complete state (maximum voltage termination). If VCELL remains above VMCV at the expiration of tMCV, the bq2004 transitions to the Battery Absent state (battery removal). See Figure 4. The bq2004 samples the voltage at the BAT pin once every 34s. When -∆V termination is selected, if VCELL is lower than any previously measured value by 12mV ±4mV (6mV/cell), fast charge is terminated. When PVD termination is selected, if VCELL is lower than any previously measured value by 6mV ±2mV (3mV/cell), fast charge is terminated. The PVD and -∆V tests are valid in the range 0.4 ∗ VCC < VCELL < 0.8 ∗ VCC. VSEL Input Low Float High Maximum temperature termination occurs anytime VTEMP falls below the temperature cutoff threshold VTCO. Unless PVD termination is enabled (VSEL = high), charge will also be terminated if VTEMP rises above the low temperature fault threshold, VLTF, after fast charge begins. The VLTF threshold is not enforced when the IC is configured for PVD termination. Voltage Termination Disabled -∆V PVD Maximum charge time is configured using the TM pin. Time settings are available for corresponding charge rates of C/4, C/2, 1C, and 2C. Maximum time-out termination is enforced on the fast-charge phase, then reset, and enforced again on the top-off phase, if selected. There is no time limit on the trickle-charge phase. Voltage Sampling Each sample is an average of voltage measurements taken 57µs apart. The IC takes 32 measurements in PVD mode and 16 measurements in -∆V mode. The re- 5 bq2004 Top-off Charge Charge Status Indication An optional top-off charge phase may be selected to follow fast charge termination for the C/2 through 4C rates. This phase may be necessary on NiMH or other battery chemistries that have a tendency to terminate charge prior to reaching full capacity. With top-off enabled, charging continues at a reduced rate after fast-charge termination for a period of time equal to the fast-charge safety time (See Table 1.) During topoff, the MOD pin is enabled at a duty cycle of 260µs active for every 1820µs inactive. This modulation results in an average rate 1/8th that of the fast charge rate. Maximum voltage, time, and temperature are the only termination methods enabled during top-off. Charge status is indicated by the LED1 and LED2 outputs. The state of these outputs in the various charge cycle phases is given in Table 2 and illustrated in Figure 2. In all cases, if VCELL exceeds the voltage at the MCV pin, both LED1 and LED2 outputs are held low regardless of other conditions. Both can be used to directly drive an LED. Charge Current Control The bq2004 controls charge current through the MOD output pin. The current control circuitry is designed to support implementation of a constant-current switching regulator or to gate an externally regulated current source. Pulse-Trickle Charge Pulse-trickle charging follows the fast charge and optional top-off charge phases to compensate for selfdischarge of the battery while it is idle in the charger. The configured pulse-trickle rate is also applied in the charge pending state to raise the voltage of an overdischarged battery up to the minimum required before fast charge can begin. When used in switch mode configuration, the nominal regulated current is: IREG = 0.225V/RSNS Charge current is monitored at the SNS input by the voltage drop across a sense resistor, RSNS, between the low side of the battery pack and ground. RSNS is sized to provide the desired fast charge current. In the pulse-trickle mode, MOD is active for 260µs of a period specified by the settings of TM1 and TM2. See Table 1. The resulting trickle-charge rate is C/64 when top-off is enabled and C/32 when top-off is disabled. Both pulse trickle and top-off may be disabled by tying TM1 and TM2 to VSS. If the voltage at the SNS pin is less than VSNSLO, the MOD output is switched high to pass charge current to the battery. Table 1. Fast-Charge Safety Time/Hold-Off/Top-Off Table PulseTrickle Rate PulseTrickle Period (Hz) Disabled Disabled Disabled 820 Disabled C/32 240 410 Disabled C/32 120 45 200 Disabled C/32 60 23 100 Disabled C/32 30 Float 180 820 C/16 C/64 120 Low High 90 410 C/8 C/64 60 Float High 45 200 C/4 C/64 30 High 23 100 C/2 C/64 15 Typical Typical Fast-Charge Safety PVD, -∆V Hold-Off Top-Off Time (seconds) Rate Time (minutes) Corresponding Fast-Charge Rate TM1 TM2 C/4 Low Low 360 137 C/2 Float Low 180 1C High Low 90 2C Low Float 4C Float Float C/2 High 1C 2C 4C High Note: Typical conditions = 25°C, VCC = 5.0V. 6 bq2004 When used to gate an externally regulated current source, the SNS pin is connected to VSS, and no sense resisitor is required. When the SNS voltage is greater than VSNSHI, the MOD output is switched low—shutting off charging current to the battery. VSNSLO = 0.04 ∗ VCC ± 25mV VSNSHI = 0.05 ∗ VCC ± 25mV Table 2. bq2004 LED Status Display Options Mode 1 DSEL = VSS Mode 2 DSEL = Floating Mode 3 DSEL = VCC Charge Status Battery absent Fast charge pending or discharge-before-charge in progress Fast charge in progress Charge complete, top-off, and/or trickle Charge Status Battery absent, fast charge in progress or complete Fast charge pending Discharge in progress Top-off in progress Charge Status Battery absent LED1 Low High Low High LED1 Low High Low High LED1 Low Fast charge pending or discharge-before-charge in progress Low Fast charge in progress Fast charge complete, top-off, and/or trickle Low High OSC LED1 LED2 DSEL TM1 TM2 TCO Timing Control TCO Check TS LTF Check Display Control VTS - VSNS DCMD DVEN VBAT - VSNS Charge Control State Machine A/D SNS EDV Check Discharge Control MOD Control PWR Control DIS MOD INH MCV Check BAT VCC VSS BD200401.eps Figure 3. Block Diagram 7 LED2 Low High High Low LED2 Low Low High High LED2 Low 1/8s high 1/8s low High Low bq2004 New Charge Cycle Started by Any One of: Rising Edge on DCMD VCC Rising to Valid Level Yes Battery Replacement (VCELL Falling through VMCV) DCMD Tied to Ground? Inhibit (INH) Released No VEDV < VCELL < VMCV Charge Pending VCELL < VEDV Battery Voltage? VCELL < VEDV VTEMP > VLTF or VTEMP < VHTF VCELL > VMCV VCELL > VMCV Pulse Trickle Charge Battery Temperature? VCELL > VMCV DischargeBefore-Charge VHTF < VTEMP < VLTF* Battery Absent VEDV < VCELL < VMCV and VHTF < VTEMP < VLTF* Fast Charge Pulse Trickle Charge VCELL > VMCV - V or T/ t or Pulse Trickle Charge VCELL < VMCV VTEMP < VTCO or Maximum Time Out Top-Off Selected? t > tMCV VCELL > VMCV VCELL > VMCV Top-Off Charge Yes VTEMP < VTCO or Maximum Time Out No *VSEL = High disables LTF threshold enforcement Charge Complete Pulse Trickle Charge SD2004.eps Figure 4. State Diagram 8 bq2004 Absolute Maximum Ratings Symbol Parameter Minimum Maximum Unit VCC VCC relative to VSS -0.3 +7.0 V VT DC voltage applied on any pin excluding VCC relative to VSS -0.3 +7.0 V TOPR Operating ambient temperature -20 +70 °C TSTG Storage temperature -55 +125 °C TSOLDER Soldering temperature - +260 °C TBIAS Temperature under bias -40 +85 °C Note: VSNSHI VSNSLO Commercial 10 sec max. Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Exposure to conditions beyond the operational limits for extended periods of time may affect device reliability. DC Thresholds Symbol Notes (TA = TOPR; VCC ± 10%) Parameter High threshold at SNS resulting in MOD = Low Low threshold at SNS resulting in MOD = High Rating Tolerance Unit 0.05 * VCC ± 0.025 V 0.04 * VCC ± 0.010 V Notes VTEMP ≥ VLTF inhibits/terminates charge VTEMP ≤ VHTF inhibits charge VCELL < VEDV inhibits fast charge VCELL > VMCV inhibits/ terminates charge VLTF Low-temperature fault 0.4 * VCC ± 0.030 V VHTF High-temperature fault (1/4 * VLTF) + (2/3 * VTCO) ± 0.030 V VEDV End-of-discharge voltage 0.4 * VCC ± 0.030 V VMCV Maximum cell voltage 0.8 * VCC ± 0.030 V VTHERM TS input change for∆T/∆t detection -16 ±4 mV VCC = 5V, TA = 25°C -12 ±4 mV VCC = 5V, TA = 25°C -6 ±2 mV VCC = 5V, TA = 25°C -∆V PVD BAT input change for -∆V detection BAT input change for PVD detection 9 bq2004 Recommended DC Operating Conditions (TA = TOPR) Symbol Condition Minimum Typical Maximum Unit Notes VCC Supply voltage 4.5 5.0 5.5 V VBAT Battery input 0 - VCC V VCELL BAT voltage potential 0 - VCC V VTS Thermistor input 0 - VCC V VTEMP TS voltage potential 0 - VCC V VTS - VSNS VTCO Temperature cutoff 0.2 * VCC - 0.4 * VCC V Valid ∆T/∆t range Logic input high 2.0 - - V DCMD, INH Logic input high VCC - 0.3 - - V TM1, TM2, DSEL, VSEL Logic input low - - 0.8 V DCMD, INH Logic input low - - 0.3 V TM1, TM2, DSEL, VSEL VBAT - VSNS VIH VIL VOH Logic output high VCC - 0.8 - - V DIS, MOD, LED1, LED2, IOH ≤ -10mA VOL Logic output low - - 0.8 V DIS, MOD, LED1, LED2, IOL ≤ 10mA ICC Supply current - 1 3 mA Outputs unloaded ISB Standby current - - 1 µA INH = VIL IOH DIS, LED1, LED2, MOD source -10 - - mA @VOH = VCC - 0.8V IOL DIS, LED1, LED2, MOD sink 10 - - mA @VOL = VSS + 0.8V Input leakage - - ±1 µA INH, BAT, V = VSS to VCC Input leakage 50 - 400 µA DCMD, V = VSS to VCC IL IIL Logic input low source - - 70 µA TM1, TM2, DSEL, VSEL, V = VSS to VSS + 0.3V IIH Logic input high source -70 - - µA TM1, TM2, DSEL, VSEL, V = VCC - 0.3V to VCC IIZ Tri-state -2 - 2 µA TM1, TM2, DSEL, and VSEL should be left disconnected (floating) for Z logic input state Note: All voltages relative to VSS except as noted. 10 bq2004 Impedance Symbol Parameter Minimum Typical Maximum Unit RBAT Battery input impedance 50 - - MΩ RTS TS input impedance 50 - - MΩ RTCO TCO input impedance 50 - - MΩ RSNS SNS input impedance 50 - - MΩ Timing Symbol (TA = 0 to +70°C; VCC ± 10%) Parameter Minimum Typical Maximum Unit tPW Pulse width for DCMD and INH pulse command 1 - - µs Pulse start for charge or discharge before charge dFCV Time base variation -16 - 16 % VCC = 4.75V to 5.25V fREG MOD output regulation frequency - - 300 kHz tMCV Maximum voltage termination time limit 1 - 2 s Note: Typical is at TA = 25°C, VCC = 5.0V. 11 Notes Time limit to distinguish battery removed from charge complete. bq2004 16-Pin DIP Narrow (PN) 16-Pin PN (0.300" DIP) Inches 12 Millimeters Dimension Min. Max. Min. Max. A 0.160 0.180 4.06 4.57 A1 0.015 0.040 0.38 1.02 B 0.015 0.022 0.38 0.56 B1 0.055 0.065 1.40 1.65 C 0.008 0.013 0.20 0.33 D 0.740 0.770 18.80 19.56 E 0.300 0.325 7.62 8.26 E1 0.230 0.280 5.84 7.11 e 0.300 0.370 7.62 9.40 G 0.090 0.110 2.29 2.79 L 0.115 0.150 2.92 3.81 S 0.020 0.040 0.51 1.02 bq2004 16-Pin SOIC Narrow (SN) 16-Pin SN (0.150" SOIC) Inches D e B E H A C A1 .004 L 13 Millimeters Dimension Min. Max. Min. Max. A 0.060 0.070 1.52 1.78 A1 0.004 0.010 0.10 0.25 B 0.013 0.020 0.33 0.51 C 0.007 0.010 0.18 0.25 D 0.385 0.400 9.78 10.16 E 0.150 0.160 3.81 4.06 e 0.045 0.055 1.14 1.40 H 0.225 0.245 5.72 6.22 L 0.015 0.035 0.38 0.89 bq2004 Data Sheet Revision History Change No. Page No. 1 10 Standby current ISB Was 5 µA max; is 1 µA max 2 9 VBSNSLO Rating Was: VSNSHI - (0.01 * VCC) Is: 0.04 * VCC 2 7 Correction in Peak Voltage Detect Termination section Was VCELL; is VBAT 2 3 Added block diagram Diagram insertion 2 7 Added VSEL/termination table Table insertion 2 8 Added values to Table 3 Top-off rate values 3 7 VSEL/Termination Low, High changed 4 All Revised and expanded format of this data sheet Clarification 5 9 Corrected VHTF rating Was: (1/3 ∗ VLTF) + (2/3 ∗ VTCO) Is: (1/4 ∗ VLTF) + (3/4 ∗ VTCO) 6 9 TOPR Deleted industrial temperature range Notes: Description Change 1 = Apr. 1994 B “Final” changes from Dec. 1993 A “Preliminary.” Change 2 = Sept. 1996 C changes from Apr. 1994 B. Change 3 = April 1997 C changes from Sept. 1996 C. Change 4 = Oct. 1997 D changes from April 1997 C. Change 5 = Jan. 1998 E changes from Oct. 1997 D. Change 6 = June 1999 F changes from Jan. 1998 E. 14 Nature of Change bq2004 Ordering Information bq2004 Package Option: PN = 16-pin narrow plastic DIP SN = 16-pin narrow SOIC Device: bq2004 Fast-Charge IC 15 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. 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