CD4029BM/CD4029BC Presettable Binary/Decade Up/Down Counter General Description The CD4029BM/CD4029BC is a presettable up/down counter which counts in either binary or decade mode depending on the voltage level applied at binary/decade input. When binary/decade is at logical ‘‘1’’, the counter counts in binary, otherwise it counts in decade. Similarly, the counter counts up when the up/down input is at logical ‘‘1’’ and vice versa. A logical ‘‘1’’ preset enable signal allows information at the ‘‘jam’’ inputs to preset the counter to any state asynchronously with the clock. The counter is advanced one count at the positive-going edge of the clock if the carry in and preset enable inputs are at logical ‘‘0’’. Advancement is inhibited when either or both of these two inputs is at logical ‘‘1’’. The carry out signal is normally at logical ‘‘1’’ state and goes to logical ‘‘0’’ state when the counter reaches its maximum count in the ‘‘up’’ mode or the minimum count in the ‘‘down’’ mode provided the carry input is at logical ‘‘0’’ state. All inputs are protected against static discharge by diode clamps to both VDD and VSS. Features Y Y Y Y Y Wide supply voltage range High noise immunity Low power TTL compatibility 3V to 15V 0.45 VDD (typ.) fan out of 2 driving 74L or 1 driving 74LS Parallel jam inputs Binary or BCD decade up/down counting Logic Diagram TL/F/5960 – 1 C1995 National Semiconductor Corporation TL/F/5960 RRD-B30M105/Printed in U. S. A. CD4029BM/CD4029BC Presettable Binary/Decade Up/Down Counter February 1988 Absolute Maximum Ratings Recommended Operating Conditions (Note 2) (Notes 1 and 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. b 0.5V to a 18 VDC DC Supply Voltage (VDD) DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) CD4029BM CD4029BC b 0.5V to VDD a 0.5 VDC Input Voltage (VIN) b 65§ C to a 150§ C Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line 700 mW Small Outline 500 mW Lead Temperature (TL) (Soldering, 10 seconds) 260§ C 3V to 15 VDC 0V to VDD VDC b 55§ C to a 125§ C b 40§ C to a 85§ C DC Electrical Characteristics CD4029BM (Note 2) Symbol Parameter b 55§ C Conditions Min Max a 25§ C Min IDD Quiescent Device Current VDD e 5V VDD e 10V VDD e 15V VOL Low Level Output Voltage lIOl k 1 mA VDD e 5V VDD e 10V VDD e 15V High Level Output Voltage lIOl k 1 mA VDD e 5V VDD e 10V VDD e 15V VIL Low Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1V or 9V VDD e 15V, VO e 1.5V or 13.5V VIH High Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1V or 9V VDD e 15V, VO e 1.5V or 13.5V 3.5 7.0 11.0 3.5 7.0 11.0 IOL Low Level Output Current (Note 3) VDD e 5V, VO e 0.4V VDD e 10V, VO e 0.5V VDD e 15V, VO e 1.5V 0.64 1.6 4.2 0.51 1.3 3.4 IOH High Level Output Current (Note 3) VDD e 5V, VO e 4.6V VDD e 10V, VO e 9.5V VDD e 15V, VO e 13.5V b 0.64 b 1.6 b 4.2 b 0.51 b 1.3 b 3.4 IIN Input Current VDD e 15V, VIN e 0V VDD e 15V, VIN e 15V VOH Typ 5 10 20 0.05 0.05 0.05 4.95 9.95 14.95 0 0 0 4.95 9.95 14.95 a 125§ C Min Max 5 10 20 5 150 300 600 mA mA mA 0.05 0.05 0.05 V V V 0.05 0.05 0.05 5 10 15 1.5 3.0 4.0 4.95 9.95 14.95 V V V 1.5 3.0 4.0 1.5 3.0 4.0 V V V 0.88 2.25 8.8 0.36 0.9 2.4 mA mA mA b 0.88 b 2.25 b 8.8 b 0.36 b 0.9 b 2.4 mA mA mA 10b5 0.1 V V V 3.5 7.0 11.0 b 10 b 5 b 0.1 b 0.1 Units Max b 1.0 0.1 1.0 mA mA DC Electrical Characteristics CD4029BC (Note 2) Symbol Parameter Conditions b 40§ C Min a 25§ C Max IDD Quiescent Device Current VDD e 5V VDD e 10V VDD e 15V 20 40 80 VOL Low Level Output Voltage lIOl k 1 mA VDD e 5V VDD e 10V VDD e 15V 0.05 0.05 0.05 High Level Output Voltage lIOl k 1 mA VDD e 5V VDD e 10V VDD e 15V VOH 4.95 9.95 14.95 Min Typ 0 0 0 4.95 9.95 14.95 5 10 15 a 85§ C Max Min Units Max 20 40 80 150 300 600 mA mA mA 0.05 0.05 0.05 0.05 0.05 0.05 V V V 4.95 9.95 14.95 V V V Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: VSS e 0V unless otherwise specified. Note 3: IOH and IOL are tested one output at a time. 2 DC Electrical Characteristics CD4029BC (Note 2) (Continued) Symbol Parameter b 40§ C Conditions Min Max a 25§ C Min Typ VIL Low Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1V or 9V VDD e 15V, VO e 1.5V or 13.5V 1.5 3.0 4.0 VIH High Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1V or 9V VDD e 15V, VO e 1.5V or 13.5V 3.5 7.0 11.0 3.5 7.0 11.0 IOL Low Level Output Current (Note 3) VDD e 5V, VO e 0.4V VDD e 10V, VO e 0.5V VDD e 15V, VO e 1.5V 0.52 1.3 3.6 0.44 1.1 3.0 IOH High Level Output Current (Note 3) VDD e 5V, VO e 4.6V VDD e 10V, VO e 9.5V VDD e 15V, VO e 13.5V b 0.52 b 1.3 b 3.6 b 0.44 b 1.1 b 3.0 IIN Input Current VDD e 15V, VIN e 0V VDD e 15V, VIN e 15V a 85§ C Max Min 1.5 3.0 4.0 Units Max 1.5 3.0 4.0 V V V 3.5 7.0 11.0 V V V 0.88 2.25 8.8 0.36 0.9 2.4 mA mA mA b 0.88 b 2.25 b 8.8 b 0.36 b 0.9 b 2.4 mA mA mA b 0.3 b 10 b 5 b 0.3 b 1.0 0.3 10b5 0.3 1.0 mA mA AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, RL e 200k, Input trCL e tfCL e 20 ns, unless otherwise specified Symbol Parameter Conditions Min Typ Max Units CLOCKED OPERATION tPHL or tPLH Propagation Delay Time to Q Outputs VDD e 5V VDD e 10V VDD e 15V 200 85 70 400 170 140 ns ns ns tPHL or tPLH Propagation Delay Time to Carry Output VDD e 5V VDD e 10V VDD e 15V 320 135 110 640 270 220 ns ns ns tPHL or tPLH Propagation Delay Time to Carry Output CL e 15 pF VDD e 5V VDD e 10V VDD e 15V 285 120 95 570 240 190 ns ns ns tTHL or tTLH Transition Time/Q or Carry Output VDD e 5V VDD e 10V VDD e 15V 100 50 40 200 100 80 ns ns ns tWH or tWL Minimum Clock Pulse Width VDD e 5V VDD e 10V VDD e 15V 160 70 55 320 135 110 ns ns ns trCL or tfCL Maximum Clock Rise and Fall Time VDD e 5V VDD e 10V VDD e 15V tSU Minimum Set-Up Time VDD e 5V VDD e 10V VDD e 15V fCL Maximum Clock Frequency VDD e 5V VDD e 10V VDD e 15V CIN Average Input Capacitance Any Input 5 CPD Power Dissipation Capacitance Per Package (Note 4) 65 15 10 5 ms ms ms 180 70 55 1.5 3.7 4.5 360 140 110 3.1 7.4 9 ns ns ns MHz MHz MHz 7.5 pF pF Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: VSS e 0V unless otherwise specified. Note 3: IOH and IOL are tested one output at a time. 3 AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, RL e 200 k, Input trCL e tfCL e 20 ns, unless otherwise specified (Continued) Symbol Parameter Conditions Min Typ Max Units PRESET ENABLE OPERATION tPHL or tPLH Propagation Delay Time to Q output VDD e 5V VDD e 10V VDD e 15V 285 115 95 570 230 195 ns ns ns tPHL or tPLH Propagation Delay Time to Carry Output VDD e 5V VDD e 10V VDD e 15V 400 165 135 800 330 260 ns ns ns tWH Minimum Preset Enable Pulse Width VDD e 5V VDD e 10V VDD e 15V 80 30 25 160 60 50 ns ns ns tREM Minimum Preset Enable Removal Time VDD e 5V VDD e 10V VDD e 15V 150 60 50 300 120 100 ns ns ns CARRY INPUT OPERATION tPHL or tPLH Propagation Delay Time to Carry Output VDD e 5V VDD e 10V VDD e 15V 265 110 90 530 220 180 ns ns ns tPHL, tPLH Propagation Delay Time to Carry Output CL e 15 pF VDD e 5V VDD e 10V VDD e 15V 200 85 70 400 170 140 ns ns ns *AC Parameters are guaranteed by DC correlated testing. Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: VSS e 0V unless otherwise specified. Note 3: IOH and IOL are tested one output at a time. Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see 54C/74C Family Characteristics application note, AN-90. Connection Diagram Dual-In-Line Package Order Number CD4029B TL/F/5960–2 Top View 4 Logic Waveforms Decade Mode TL/F/5960 – 3 Binary Mode TL/F/5960 – 4 5 Switching Time Waveforms TL/F/5960 – 5 Cascading Packages Parallel Clocking TL/F/5960 – 6 Ripple Clocking TL/F/5960 – 7 Carry out lines at the 2nd or later stages may have a negative-going spike due to differential internal delays. These spikes do not affect counter operation, but if the carry out is used to trigger external circuitry the carry out should be gated with the clock. 6 7 CD4029BM/CD4029BC Presettable Binary/Decade Up/Down Counter Physical Dimensions inches (millimeters) Order Number CD4029BMJ or CD4029BCJ NS Package Number J16A Order Number CD4029BMN or CD4029BCN NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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