ONSEMI CS4122XDWFR24

CS4122
Triple Air−Core Gauge
Driver with Serial Input Bus
The CS4122 converts digital data from a microprocessor to
complementary DC outputs and drives air−core meter movements for
vehicle instrument panels. It is optimized for one 360° gauge and two
112° gauges. The digital data controls the voltage applied to the
quadrature coils of the meters with a 0.35° resolution for the major
(360°) gauge and 0.44° resolution for the minor (112°) gauges. The
accuracy is ±0.75° for the major and ±1.00° for the minors. The
interface from the microcontroller is by a SPI compatible serial
connection using up to a 2.0 MHz shift clock rate.
The digital code is shifted into the appropriate DAC and
multiplexer. These two blocks provide a tangential conversion
function to change the digital data into the appropriate DC coil
voltage. The major gauge driver can position a pointer anywhere
within a 360° circle while the minor gauge drivers are limited to an arc
of 112.2°.
The output buffers are capable of 70 mA per coil and are protected
against output short circuit conditions. A thermal protection circuit
limits the junction temperature to approximately 160°C.
An open−drain fault output goes low when any of the outputs are
shorted or the device is in a thermal shutdown state. This ASIC is
designed on POWERSENSE 3.0.
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SO−24L
DWF SUFFIX
CASE 751E
24
1
MARKING
DIAGRAM
24
CS4122
AWLYYWW
1
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
Features
•
•
•
•
•
•
•
•
•
Serial Input Bus
2.0 MHz Operating Frequency
Independently Addressable Gauges
Tangential Drive Algorithm
70 mA Drive Circuits
0.75° Major Accuracy
Power−On−Reset
Protection Features
♦ Short Circuit
♦ Overtemperature
Internally Fused Leads in SO−24L Package
PIN CONNECTIONS
SCLK
CS
SIN−
SIN+
GND
GND
GND
GND
VBB/2
C1+
C1−
VCC
1
24
SO
SI
COS+
COS−
GND
GND
GND
GND
C2−
C2+
VBB
FAULT
ORDERING INFORMATION
Package
Shipping†
CS4122XDWF24
SO−24L
31 Units/Rail
CS4122XDWFR24
SO−24L
1000 Tape & Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
 Semiconductor Components Industries, LLC, 2004
May, 2004 − Rev. 8
1
Publication Order Number:
CS4122/D
CS4122
VCC
VBB
POR
SO
CS
Data
7
Decode/
Latch
10
SI
SCLK
VTOP
Serial to
Parallel
Shift
Register
(12 bits)
VVAR
7 Bit
DAC
SIN+
MUX
SIN−
VBOT
D7
COS+
D8 − D9
COS−
VTOP
8 Data
7
Decode/
Latch
2
7 Bit
DAC
VVAR
MUX
C1+
C1−
D7
Address
Decode
+ Diag
1/2 VBB
VTOP
Data
7
Decode/
Latch
8
VVAR
7 Bit
DAC
VBB/2
MUX
C2+
D7
C2−
FAULT
Fault
Latch
OE
OC
POR
Over
Temperature
Output
Amplifiers
GND
Figure 1. Block Diagram
MAXIMUM RATINGS (Voltages are With Respect to Device Substrate)
Value
Unit
−1.0 to 16.5
−1.0 to 6.0
V
V
−1.0 to 6.0
V
Steady State Output Current
±100
mA
Forced Injection Current (Inputs and Supply)
±10
mA
Operating Junction Temperature (TJ)
150
°C
Storage Temperature Range (TSTG)
−65 to 150
°C
JA (Thermal Resistance Junction−to−Ambient)
55
°C/W
JC (Thermal Resistance Junction−to−Case)
9
°C/W
230 peak
°C
Rating
Supply Voltage
VBB
VCC
Digital Inputs
Soldering Temperature:
Reflow: (SMD styles only) (Note 1)
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. 60 second maximum above 183°C.
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2
CS4122
ELECTRICAL CHARACTERISTICS (−40°C ≤ TA ≤ 105°C, 7.5 V ≤ VBB ≤ 14 V, 4.5 V ≤ VCC ≤ 5.5 V;
unless otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
VBB = 14 V, no coil loads,
RCOS, RSIN = 150 Major @ 45° (code = 08016),
Both Minors @ 0° (codes = 0016)
Major @ 0° (code = 00016),
Both Minors @ 56° (codes = 8016)
−
5.20
25
mA
−
310
340
mA
−
81
100
mA
VCC = 5.5 V
SCLK = 2.0 MHz
SCLK = 0 MHz, VBB = 0 V
−
−
1.0
0.9
2.0
1.5
mA
mA
Thermal Shutdown
Drive Outputs Off
−
160
−
°C
Power−on Reset
VCC Rising
VCC Falling
−
2.5
−
−
4.5
−
V
V
VCC − 0.8
−
−
V
Supply Voltages and Currents
Analog Supply Current
Logic Supply Current
Protection and Power−on Reset
Digital Inputs and Outputs
Output High Voltage
SO = IOUT(HIGH) = 0.8 mA
Output Low Voltage
SO = IOUT(LOW) = 1.5 mA
FAULT, IOUT(LOW) = 2.8 mA
−
−
−
−
0.4
0.8
V
V
FAULT Leakage Current
VFAULT = 5.0 V
−
−
25
A
Input High Voltage
CS, SCLK, SI
0.7 × VCC
−
−
V
Input Low Voltage
CS, SCLK, SI
−
−
0.3 × VCC
V
Input High Current
CS, SCLK, SI, VIN = 0.7 × VCC
−
−
1.0
A
Input Low Current
CS, SCLK, SI, VIN = 0.3 × VCC
−
−
1.0
A
SCLK Frequency
−
−
−
2.0
MHz
SCLK High Time
−
175
−
−
ns
SCLK Low Time
−
175
−
−
ns
SO Rise Time
0.75 V to VCC − 1.2 V; CL = 90 pF
−
−
100
ns
SO Fall Time
VCC − 1.2 V to 0.75 V; CL = 90 pF
−
−
100
ns
SO Delay Time
CL = 90 pF
−
−
150
ns
SI Setup Time
−
75
−
−
ns
SI Hold Time
−
75
−
−
ns
CS Setup Time
−
0
−
−
ns
CS Hold Time
−
75
−
−
ns
Analog Outputs
Output Function Accuracy
Major Accuracy
Minor Accuracy
−
−
−
−
±0.75
±1.00
°
°
Output Shutdown Current, Source
and Sink
VBB = Max
VBB = Min
70
43
−
−
−
−
mA
mA
Major Coil Drive Output Voltage
−
−
0.748 × VBB
−
V
Minor Coil Drive Output Voltage
−
−
0.744 × VBB
−
V
(0.5 × VBB) − 0.1
−
(0.5 × VBB) + 0.1
V
229
171
150
−
−
−
−
−
−
VBB/2
IDR(VBB/2) = ±50 mA
Minimum Load Resistance
TA = 105°C
TA = 25°C
TA = −40°C
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CS4122
PIN FUNCTION DESCRIPTION
PIN #
PIN SYMBOL
FUNCTION
1
SCLK
Serial clock for shifting in/out of data. Rising edge shifts data on SI into the shift register and the falling
edge changes the data on SO.
2
CS
When High, allows data at SI to be shifted into the internal shift register with the rising edge of SCLK.
The falling edge transfers the shift register contents into the DAC and multiplexer to update the output
buffers. The falling edge also re−enables the output drivers if they have been disabled by a fault.
3
SIN−
Negative output for SINE coil.
4
SIN+
Positive output for SINE coil.
5, 6, 7, 8,
17, 18, 19, 20
GND
Ground for VBB and VCC supplies; device substrate. In the power SOIC package they aid in removing
internally generated heat from the package and as such should be soldered to as large a PCB area as
possible.
9
VBB/2
1/2 VBB output for biasing the minor coils.
10
C1+
Positive output for the #1 minor coil.
11
C1−
Negative output for the #1 minor coil.
12
VCC
5.0 V logic supply. The internal registers and latches are reset by a POR generated by the rising edge of
the voltage on this lead.
13
FAULT
14
VBB
Analog supply. Nominally 12 V.
15
C2+
Positive output for the #2 minor coil.
16
C2−
Negative output for the #2 minor coil.
21
COS−
Negative output for COSINE coil.
22
COS+
Positive output for COSINE coil.
23
SI
Serial data input. Data present at the rising edge of the clock signal is shifted into the internal
shift register.
24
SO
Serial data output. Existing 12 bit data is shifted out when new data is shifted in. Allows cascading of
multiple devices on common serial port.
Open−drain fault flag. A logic low on this lead indicates that an output is shorted or the device is in
thermal shutdown.
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4
CS4122
APPLICATIONS INFORMATION
THEORY OF OPERATION
Quadrant I
The CS4122 is for interfacing between a microcontroller
or microprocessor and air−core meters commonly used in
automotive vehicles for speedometers, tachometers and
auxiliary gauges. These meters are built using 2 coils placed
at 90° orientation to each other. A magnetized disc floats in
the middle of the coils and responds to the magnetic field
generated by each coil. The disc has a shaft attached to it that
protrudes out of the assembly. A pointer indicator is attached
to this shaft and in conjunction with a separate printed scale
displays the vehicle’s speed, engine’s speed or other
information such as fuel quantity or battery voltage.
The disc (and pointer) respond to the vector sum of the
voltages applied to the coils. Ideally, this relationship
follows a sine/cosine equation. Since this is a transcendental
and non−linear function, devices of this type use an
approximation for this relationship. The CS4122 uses a
tangential algorithm as shown in Figure 2 for the major
(360°) gauge. Only one output varies in any 45° range.
Note: The actual slopes are segmented but are shown here
as straight lines for simplicity.
SIN) (VSIN)
(V(VCOS
) (VCOS)
Tan−1
For 0.176°to 44.824° :
VSIN Tan 0.748 VBB
VCOS 0.748 VBB
For 45.176°to 89.824° :
VSIN 0.748 VBB
VCOS Tan(90° ) 0.748 VBB
Quadrant II
SIN) (VSIN)
(V(VCOS
) (VCOS)
180° Tan−1
For 90.176°to 134.824° :
VSIN 0.748 VBB
VCOS Tan ( 90°) 0.748 VBB
For 135.176°to 179.824° :
Degrees of Rotation
0°
45°
90°
135°
180°
225°
270°
315°
VSIN Tan(180° ) 0.748 VBB
360°
VCOS 0.748 VBB
Max(128)
SIN+
Output
Quadrant III
Min(0)
Max(128)
SIN−
Output
Min(0)
For 180.176°to 224.824° :
VSIN Tan ( 180°) 0.748 VBB
Max(128)
COS+
Output
SIN) (VSIN)
(V(VCOS
) (VCOS)
180° Tan−1
VCOS 0.748 VBB
Min(0)
For 225.176°to 269.824° :
Max(128)
VSIN 0.748 VBB
COS−
Output
VCOS Tan (270° ) 0.748 VBB
Min(0)
000
001
010
011
100
101
110
111
000
MUX bits (D9−D7)
Figure 2. Major Gauge Outputs
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CS4122
Quadrant IV
Quadrant I, II
SIN) (VSIN)
(V(VCOS
) (VCOS)
V(VBBC) V(V(VC2)) 56.1° Tan−1
360° Tan−1
For 270.176°to 314.824° :
BB
VCOIL V(VBB2) Tan (56.1° )
VSIN 0.748 VBB
VCOS Tan( 270°) 0.748 VBB
56.1°
VBB/2
For 315.176° 359.824° :
VSIN Tan (360° ) 0.748 VBB
0°
(−56.1)
VCOS 0.748 VBB
I
VCOS+
360/0°
VC+
0.748 VBB
90°
VSIN+
0.748 VBB
III
0.744 VBB
0.744 VBB
VC−
To drive a gauge’s pointer to a particular angle, the
microcontroller sends a 12 bit digital word to the CS4122.
These 12 bits are divided as shown in Figure 6. However,
from a software programmer’s viewpoint, a 360° circle is
divided into 1024 equal parts of 0.35° each and a 112.2° arc
is divided into 256 parts of 0.44° each. Table 1 shows the
data associated with the 45° divisions of the 360° driver.
Table 2 shows the data for the center and end points of the
112.2° drivers. Setting the address to “11” disables all
outputs.
I
0.748 VBB
II
Figure 5. Minor Gauge Outputs
IV
270°
VSIN−
112.2°
II
0.748 VBB
180°
VCOS−
Figure 3. Major Gauge Response
MSB
The minor gauge coil outputs differ in that only one of the
coils in each movement is driven by the IC. The other is
driven directly by the analog supply voltage, specifically
one−half of this voltage. The common output assures that
this is true. By varying the voltage across the other coil to a
greater voltage, the pointer can be deflected more than 45°
to each side of the externally driven coil. This relationship
is shown in Figure 4.
Note: There are actually eight segments, but only the are
shown here for simplicity.
Degrees of Rotation
0°
14°
28°
42°
56°
70°
84°
98°
112°
Max(128)
LSB
Major
Gauge
(360°)
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Minor
Gauge
#1
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Minor
Gauge
#2
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
C+
Output
Gauge
D9 − D7
select
Address
= “00” which octant
Gauge
Address
= “01”
Gauge
Address
= “10”
Set to
“00”
Set to
“00”
Divides a 45° octant into
128 equal parts to achieve
a 0.35° resolution
Code 0 − 12710
Deflection angle 0 − 112.2°,
to achieve a 0.44° resolution
Code 0 − 25510
Deflection angle 0 − 112.2°,
to achieve a 0.44° resolution
Code 0 − 25510
Min(0)
All
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Gauges
All Outputs Disabled; D9 − D0 = “Don’t Care”
Disabled Gauge
Address
= “11”
Max(128)
C−
Output
Min(0)
00
1F
3F
5F
7F
9F
BF
DF
FF
Code16
Figure 6. Definition of Serial Word
Figure 4. Minor Gauge Outputs
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CS4122
Table 1. Nominal Output for Major Gauge (VBB = 14 V)
Input Code
(Decimal)
Ideal
Degrees
Nominal
Degrees
VSIN
(V)
VCOS
(V)
0
0
0.176
0.032
10.472
128
45
45.176
10.472
10.412
256
90
90.176
10.472
−0.032
384
135
135.176
10.412
−10.472
512
180
180.176
−0.032
−10.472
640
225
225.176
−10.472
−10.412
768
270
270.176
−10.472
0.032
896
315
315.176
−10.476
10.412
1023
359.65
359.826
−0.032
10.472
CS
CSSetup
SCLK
SI(Setup)
Scale
Degrees
Degrees
from Center
VCOIL
0
0
−56.1
10.417
127
55.88
−0.22
0.027
128
56.32
0.22
−0.027
255
112.2
56.1
−10.417
SI(Hold)
SI
SO(Rise, Fall)
10% − 90%
SO
SO(tpd)
Figure 7. Serial Data Timing Diagram
The DAC for the major gauge driver outputs 128 discrete
levels selected by bits D6 − D0. These bits are XOR’d with
D7 to invert them when choosing the 2nd half of each
quadrant (each odd octant). This reduces the number of
resistors and switches required. The MUX chooses which
signals to send to the output amplifiers based upon D9 − D7.
There are three choices for each amplifier: high, low or the
DAC output.
The DAC’s for the minor gauge drivers similarly output
128 discrete levels selected by bits D6 − D0. These bits are
also XOR’d with D7 to invert them when choosing the 2nd
half of the output range. The MUX chooses which signals to
send to the output amplifiers based upon D7. There are two
choices for each amplifier; high or the DAC output. Bits D8
and D9 are not used, but should be set to “00” to ensure that
the minor gauge outputs are enabled.
The output buffers are unity gain amplifiers. Each of the
eight outputs are designed to swing close to the supply rails
to maximize the voltage across the coils to produce
maximum torque. Additionally, this lowers the power
dissipation. The current for each output is also monitored. If
any of the major gauge outputs exceed the maximum value,
all of the major outputs are disabled. If any of the minor
gauge outputs exceed the maximum value, all of the minor
outputs are disabled. The falling edge of the CS re−enables
the outputs with the fault condition but they remain on only
if the overcurrent situation has been eliminated.
Table 2. Nominal Output for Minor Gauges (VBB = 14 V)
Input Code
(Decimal)
CSHold
The 12 bits are shifted into the device’s shift register MSB
first using a SPI compatible scheme. This method is shown
in Figures 6 and 7. The first 2 bits select the output driver for
which the data is intended. The CS must be high and remain
high for SCLK to be enabled. Data on SI is shifted in on the
rising edge of the synchronous clock signal. Data in the shift
register is shifted to SO on the falling edge of SCLK. This
arrangement allows the cascading of devices. SO is always
enabled. Data shifts through without affecting the outputs
until CS is brought low. At this time, the internal DAC is
updated and the outputs change accordingly.
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7
CS4122
APPLICATION DIAGRAMS
VOLTAGE
REGULATION*
360°
CS8156
VIN VOUT1 +12 V
+5.0 V
ENA VOUT2
VBAT
VIGN
20 k
COS+
SIN−
COS−
SIN+
IRQ
SPI
HOST CONTROLLER
VCC
VBB
CS4122
FAULT
C2+
CS
C2−
SI
VBB/2
SO
C1+
SCLK
GND
C1−
*ON Semiconductor offers a complete line of automotive voltage regulators.
Visit http://onsemi.com and search for the Automotive Analog Products Guide, SGD516/D.
For additional information, please contact your local Sales Representative.
Figure 8. Full Application
360°
COS+
SIN−
COS−
SIN+
VBB
VCC
FAULT
CS
C2+
CS4122
C2−
SI
VBB/2
SO
C1+
SCLK
GND
C1−
112°
Figure 9. Application with One Minor Gauge
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8
112°
112°
CS4122
PACKAGE DIMENSIONS
SO−24L
DWF SUFFIX
CASE 751E−04
ISSUE E
−A−
24
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
13
−B−
12X
P
0.010 (0.25)
1
M
B
M
12
24X
D
J
0.010 (0.25)
M
T A
S
B
S
DIM
A
B
C
D
F
G
J
K
M
P
R
F
R
X 45 C
−T−
SEATING
PLANE
M
22X
G
K
MILLIMETERS
MIN
MAX
15.25
15.54
7.40
7.60
2.35
2.65
0.35
0.49
0.41
0.90
1.27 BSC
0.23
0.32
0.13
0.29
0
8
10.05
10.55
0.25
0.75
PACKAGE THERMAL DATA
Parameter
SO−24L
Unit
RJC
Typical
9
°C/W
RJA
Typical
55
°C/W
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9
INCHES
MIN
MAX
0.601
0.612
0.292
0.299
0.093
0.104
0.014
0.019
0.016
0.035
0.050 BSC
0.009
0.013
0.005
0.011
0
8
0.395
0.415
0.010
0.029
CS4122
POWERSENSE is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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Email: [email protected]
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2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
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10
For additional information, please contact your
local Sales Representative.
CS4122/D