CXA3107N IF Amplifier for M-ary FSK Pagers For the availability of this product, please contact the sales office. Description The CXA3107N is a low current consumption FM IF amplifier which employs the newest bipolar process. It is suitable for M-ary FSK pagers. Features • Low current consumption: 570 µA (typ. at VCC=1.4 V) • Low voltage operation: VCC=1.1 to 4.0 V • Small package 20-pin SSOP • Needless of IF decoupling capacitor • Reference power supply for operational amplifier and comparator • Bit rate filter with variable cut-off • Misoperation prevention function for continuous data • RSSI function • IF input, Vcc standard 20 pin SSOP (Plastic) Absolute Maximum Ratings (Ta=25 °C) • Supply voltage VCC 7.0 • Operating temperature Topr –20 to +75 • Storage temperature Tstg –65 to +150 Operating Condition Supply voltage VCC 1.1 to 4.0 V °C °C V Applications • M-ary FSK pagers Function Plastic Structure Bipolar silicon monolithic IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E96303A8Z Block Diagram VCC 1 20 IF IN REG OUT —2— 2 GND LIM REGULATOR 19 3 18 TH CONT REG CONT LVA 4 FSK REF ALARM 17 NRZ OUT 5 DISK QUAD DET NRZ COMP 16 6 CHG CONT QUICK CHARGE 15 CHARGE 7 14 C1 BS FIL SW 8 C2 FILTER 13 9 12 C3 RSSI 10 LEVEL COMP 11 AUDIO LEVEL CXA3107N CXA3107N Pin Description Pin No. Symbol Pin voltage Equivalent circuit 20k 20k 1.5k 1 IF IN 1.4 V Description VCC 1.5k IF limiter amplifier input. 1 GND 2 GND — Ground. VCC 3 TH CONT — 3 25k GND Determines the level comparator threshold value. The threshold value can be adjusted by inserting the resistor between Pin 3 and VCC. Normally, short to VCC. VCC 4 FSK REF 0.2 V Connects the capacitor that determines the low cut-off frequency for the entire system. 72 4 GND VCC 22k 20k 5 DISK 1.4 V Connects the phase shifter of FM detector circuit. 5 20p GND 6 6 CHG OFF — 72k Sets off the quick charge circuit current. The charge current is off by setting Pin 15 low and Pin 6 high. 20k 100k GND —3— CXA3107N Pin No. Symbol Pin voltage Equivalent circuit Description VCC 7 8 9 C1 C2 C3 0.2 V Connects the capacitor that determines the LPF cut-off. 7 35k 8 9 50k GND VCC Level comparator and NRZ comparator inputs. The operational amplifier output is connected. 72 10 AUDIO 0.2 V 10 72 GND 72 11 11 16 17 LEVEL NRZ OUT LVA OUT — — — 16 17 GND Level comparator, NRZ comparator and LVA comparator outputs. They are open collectors. (Applied voltage range: –0.5 V to +7.0 V) VCC 7k 12 RSSI 0.1 V 7k RSSI circuit output. 12 70k GND 72 13 Switches the LPF cut-off. Cut-off is decreased by setting this pin high. (Applied voltage range: –0.5 V to +7.0 V) 20k 13 FIL SW — 140k GND —4— CXA3107N Pin No. Symbol Pin voltage Equivalent circuit Description 72 14 Controls the battery saving. Setting this pin low suspends the operation of IC. (Applied voltage range: –0.5 V to +7.0 V) 20k 14 B.S. — 140k GND 20k 15 15 CHARGE — 100k GND Controls the charge speed of the quick charge circuit. Set this pin high to execute the quick charge. (Applied voltage range: –0.5 V to +7.0 V) VCC 18 REG CONT — Output for internal constantvoltage source amplifier. Connects the base of PNP transistor. (Current capacity: 100 µA) 18 72 GND VCC 19 REG OUT 1.0 V Constant-voltage source output. Controlled to maintain 1.0 V. 78k 19 1k 22k GND 20 VCC Power supply. —5— CXA3107N Electrical Characteristics (VCC=1.4 V, Ta=25 °C, FS=455 kHz, FMOD=1.6 kHz, FDEV=4.8 kHz, AMMOD=30 %) Item Symbol Conditions Measurement circuit 1 V2=1.0 V Measurement circuit 1 V2=0 V Measurement circuit 2 30 k LPF Measurement circuit 4 Vin=0.3 V Measurement circuit 3 Vin=0.1 V Measurement circuit 3 Vin=0.1 to 0.3 V Min. Typ. Max. Unit 390 570 780 µA — 6 20 µA 25 — — dB — — 0.4 V — — 5.0 µA 5 10 20 mV Current consumption ICC Current consumption ICCS AM rejection ratio AMRR NRZ output saturation voltage VSATNRZ NRZ output leak current ILNRZ NRZ hysteresis width VTWNRZ VB output current IOUT Measurement circuit 5 100 — — µA VB output saturation current VSATVB Measurement circuit 5 — — 0.4 V REG OUT voltage VREG Output current 0.92 0.96 1.02 V LVA operating voltage VLVA 1.00 1.05 1.10 V LVA output leak current ILLVA — — 5.0 µA LVA output saturation voltage VSATLVA Measurement circuit 7 — — 0.4 V Detector output voltage VODET Measurement circuit 2 50 63 80 mVrms Logic input voltage high level VTHBSV — 0.9 — — V Logic input voltage low level VTLBSV — — — 0.35 V Limiting sensitivity VIN (LIM) — –83 — dBm –15 0 +15 % Detector output level ratio deviation to level comparator window width Level comparator output saturation voltage 0 µA Measurement circuit 6 V1=1.4 to 1.0 V Measurement circuit 6 1=1.0 V Measurement circuit 2, data filter fc=2.4 kHz VLCWR — VSATLC Measurement circuit 9 — — 0.4 V Level comparator output leak current ILLC Measurement circuit 8 — — 5.0 µA RSSI output offset VORSSI Measurement circuit 10 — 100 250 mV IF limiter input resistance RINLIM 1.2 1.5 1.8 kΩ — —6— —7— 2 1 19 2 20 1 1.4V 19 VCC 1.4V 20 A VCC V1 V1 3 18 3 18 16 1V 15 14 16 5 15 V 6 14 7 4 5 6 7 8 8 13 1V V2 Measurement circuit 4 17 50µ 4 13 V2 Measurement circuit 1 17 9 12 9 12 Vin 10 11 10 11 Electrical Characteristics Measurement Circuit 1 2 19 V3 0.5V 3 16 15 14 4 17 V 1µ 16 5 7 4 5 8 9 12 15 14 6 7 8 13 1V V2 9 12 1200p 1200p 1200p 8.2k 6 13 V2 Measurement circuit 2 17 0V Measurement circuit 5 3 18 18 100µ 2 19 1.4V 1 1.4V VCC 20 20 VCC V1 Vin 50Ω 0.01µ V1 10 11 V 10 11 1 20 VCC V1 1 20 VCC V1 3 18 2 19 17 3 A 4 16 A 15 V 14 16 V 5 15 6 14 7 4 5 6 7 8 13 1V V2 8 13 1V V2 Measurement circuit 6 17 100k 18 100k Measurement circuit 3 1.4V to 1.0V 2 19 1.4V 9 12 9 12 10 11 Vin 10 11 CXA3107N V1 2 1 —8— 19 2 20 1 1.4V 19 1.4V 20 VCC V1 3 18 3 16 15 14 17 4 16 5 15 6 14 7 4 5 6 7 8 13 0.1V 8 13 1V V2 Measurement circuit 7 17 1V V2 Measurement circuit 10 18 50µ V 9 12 V 9 10 11 100p 10 11 Vin 12 1 20 VCC V1 2 19 1.4V 3 18 16 15 14 4 5 6 7 Measurement circuit 8 17 0.2V 8 13 1V V2 9 12 10 11 Vin 100k A V 1 20 VCC V1 2 19 1.4V 3 18 16 15 14 4 5 6 7 Measurement circuit 9 17 0.1V 8 13 1V V2 9 12 10 11 Vin 50µ V CXA3107N GND C2 0.01µ 1 C4 P19 REG 19 GND 2 GND IF LIM GND 0.01µ 3 P17 LVA VB REG REG 18 GND P16 NRZ LVA NRZ COMP GND 4 17 5 16 15 6 QUAD DET CHARGE S4 CHG OFF CHARGE BS GND 7 14 FIL SW 8 FILTER 13 P12 RSSI RSSI GND 9 12 GND Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. B1 RF R1 R3 R2 10µ 78k 22k 10µ 20 R5 C6 0.01µ GND 10µ GND 100k R7 C5 0.01µ R6 DISK PNP 8.2k R4 S1 GND P202 C9 C1 C3 50 S3 1200p S2 1200p 100k 1µ C7 C8 100p 1200p 220 C10 C12 C11 VCC P201 100k R8 P11 LEVEL 10 AUDIO LEVEL COMP COMP OUT 11 AUDIO P10 —9— GND P203 Block Diagram and Application Circuit CXA3107N CXA3107N Application Note 1) Power Supply The CXA3107N, with built-in regulator, is designed to permit stable operation at wide range of supply voltage from 1.1 to 4.0 V. Decouple the wiring to VCC (Pin 20) as close to the pin as possible. 2) IF Limiter Amplifier The gain of this IF limiter amplifier is approximately 100 dB. Take notice of the following points in making connection to the IF limiter amplifier input pin (Pin 1). a) Wiring to the IF limiter amplifier input (Pin 1) should be as short as possible. b) As the IF limiter amplifier output appears at QUAD (Pin 5), wiring to the ceramic discriminator connected to QUAD should be as short as possible to reduce the interface with the mixer output and IF limiter amplifier input. 1 2 3 4 5 6 As short as possible Fig. 1 3) Quick Charge In order to hasten the rising time from when power is turned on, the CXA3107N features a quick charge circuit. Therefore, the quick charge circuit eliminates the need to insert a capacitor between the detector output and the LPF as is the case with conventional ICs. But a capacitor should be connected to Pin 4 to determine the average signal level during steady-state reception. The capacitance value connected to Pin 4 should be chosen such that the voltage does not vary much due to discharge during battery saving. Connect a signal for controlling the quick charge circuit to Pin 15. Setting this pin high enables the quick charge mode, and setting this pin low enables the steady-state reception mode. Quick charge is used when the power supply is turned on. The battery saving must be set high at the time. Connect Pin 15 to GND when quick charge is not being used. Timing Power supply (Pin 20) Quick charge (Pin 15) H Battery save (Pin 14) H L L active Fig. 2 —10— battery saving CXA3107N 4) Detector The detector is of quadrature type. To perform phase shift, connect a ceramic discriminator to Pin 5. The phase shifting capacitor for the quadrature detector is incorporated. The FM (FSK) signal demodulated with the detector will be output to AUDIO (Pin 10) through the internal LPF. The AUDIO output is the anti-phase output to NRZ OUT. The CDBM455C50 (MURATA MFG. CO., LTD) ceramic discriminator is recommended for the CXA3107N. For the 2-level system, the CDBM455C28 can also used. 4 5 6 8.2k VCC Ceramic discriminator CDBM455C50 Fig. 3 5) Filter Buffer, Level Comparator and NRZ Comparator The LPF circuit is built in this IC. The LPF output is connected internally to the NRZ comparator, level comparator and quick charge circuit. 16 10 11 L.C. LPF 0.2V DET 4 Fig. 4 Using the LPF, remove noise from the demodulated signal and input the signal to the above three circuits. The level comparator and the NRZ comparator shape waveform of this input signal and output it as a square wave. The comparator output stage is for open collector. Thus, if the CPU is of CMOS type and the supply voltage is different, a direct interface as illustrated in the figure below can be implemented. VCC 1.4V VCC 20 CMOS power supply (11) CMOS IC 16 Comparator output Fig. 5 6) REG CONT Controls the base bias of the external transistors. —11— CXA3107N 7) LVA OUT The pin goes high (open) when the supply voltage becomes low. Since the output is an open collector, it can be used to directly drive CMOS device. The setting voltage of the LVA is 1.05 V (typ.), and it possesses a hysteresis with respect to the supply voltage. The hysteresis width is 50 mV (typ.). 8) B.S. Operation of the CXA3107N can be halted by setting this pin low. This pin can be connected directly to CMOS device. The current consumption for battery saving is 20 µA or less (at 1.4 V). B.S. 14 Fig. 6 9) M-ary (M = 2- or 4-level) FSK Demodulation System Polarity discrimination output and MSB comparator output are used to demodulate the 4-level waveform shown below. [4-level FSK demodulating waveform] +4.8kHz +1.6kHz –1.6kHz 01 00 10 11 01 10 00 –4.8kHz [NRZ OUT] Polarity discrimination output (When the input frequency is higher than the local frequency) POS 0 0 1 1 0 1 0 (The polarity can be inverted by setting the local frequency higer than the input frequency.) NEG [L.C. OUT] MSB comparator output 1.6kHz 1 0 0 1 1 0 4.8kHz —12— 0 CXA3107N The 4-level FSK demodulating data is divided into NRZ OUT and L.C. OUT shown above. Here, NRZ OUT corresponds to a conventional NRZ comparator output. L.C. OUT is made comparing the demodulated waveform amplitude to the IC internal reference voltage levels. When the threshold value of L.C. OUT is not appropriate to the detector output, the resistance value on Pin 5 should be varied for the detector output level adjustment or the resistor should be inserted between Pin 3 and VCC for the level comparator threshold value adjustment. For the 2-level FSK demodulation, it corresponds to a conventional NRZ comparator output. 3 R VCC 10) Principle of Quick Charge Operation BUF in Fig. 7 is the detector buffer amplifier and AMP is the operational amplifier used to construct the LPF. COMP is the level comparator or the NRZ comparator. The CXA3107N has a feedback loop from the comparator input to the input circuit of the detector output buffer. This equalizes the average value of the comparator input voltage to the reference voltage, with the quick charge circuit of CHG being set in the feedback loop. Switching the current of the quick charge circuit enables reduction of the rise time. In this block, CHG is a comparator which compares input voltages and outputs a current based on this comparison. The current on CHG is switched between high and low at Pin 15. When the power is turned on, switch the current to high to increase the charge current at C in Fig. 7 and shorten the time constant. During steady-state reception mode, switch the current to low, lengthening the charge time constant and allowing for stable data retrieval. Also, controlling Pin 6 can make the current off. This is effective when the same data are received continuously. 10 LPF BUF 16 COMP CHG Reference voltage 4 C Fig. 7 11) S Curve Characteristics Even if the IF IN input signal frequency is deviated, the feedback is applied to the DETOUT operating point so as to match it to the comparator reference voltage by the quick charge operation shown in Fig. 7. Therefore, this feedback must be halted in order to evaluate the S curve characteristics. To execute the evaluation, measure the average voltage on Pin 10 first and input this voltage to Pin 4 from the external power supply. —13— CXA3107N 12) Control Pins The function controls are as shown below. PIN No. 13 6 14 Symbol FIL SW CHG OFF BS Data filter cut-off Pin 4 charge Battery saving Function control current control mode control Input high fc: Low Slow charge off IC operation∗ Input low fc: High∗ Slow charge operation∗ Sleep Note) Pin 6 control should be performed with Pin 15 low. When each function is not controlled externally, set it to the state with asterisk (∗). 15 CHARGE Pin 4 charge speed control Quick charge Slow charge∗ 13) LPF Constant The data filter cut-off (fc) is expressed with the following equation. fc ≈ 1 2πCR C: External capacitance R: IC internal resistance R is approximately 55 kΩ ± 20 % when Pin 13 is low. The table below shows the example of constant to data rate. Pin 13 filter switch Capacitance (pF) H L H L H L H L fc (Hz) — 430 950 1900 1200 2400 1200 2400 6800 1500 1200 1200 Data rate — 512 bps (2 levels) 1200 bps (2 levels) 2400 bps (2 levels) 1600 bps (2 levels) 3200 bps (2 levels) 3200 bps (2 levels) 6400 bps (2 levels) 14) Misoperation Prevention Function for Continuous Data The offset to the comparator threshold value of the detector output is canceled with the feedback loop indicated in the paragraph 10). This operation assumes that “0” and “1” are in equal numbers in the data. The offset is occurred when the “0” or “1” data are received continuously. In this case, setting Pin 6 high to make the charge current off prevents the offset occurrence. Without using this function, the stability for the same data continuously received depends on the capacitance value on Pin 4 shown in the paragraph 10). When this capacitance value is increased, the data is demodulated more stably; however, it takes more time for the IC to rise. If this function is not used, be sure to connect Pin 6 to GND. Reception signal Sync part Data H CHG OFF (Pin 6) L Fig. 8 —14— Sync part Data CXA3107N Example of Representative Characteristics Supply voltage vs. Current consumption 1000 5.93µA (VCC=1.4V) in BS mode Current consumption (µA) 900 800 700 600 500 400 1.0 2.0 3.0 4.0 Supply voltage (V) Audio respnse and RSSI output voltage characteristics S+N+D 0 1000 10 800 20 600 0dBm=66.5mVrms 30 400 IF 455kHz Dev. 4.8kHz AUDIO 1.6kHz 200 40 VCC=1.4V 25°C 50 0 60 S/N 70 –100 –90 10 –80 20 –70 30 –60 40 –50 50 –40 60 –30 70 –20 80 –10 (dBm) (dBµ) Input level (dBµ) Level comparator characteristics Comparator output voltage (V) 1.4 1.2 1.0 0.8 AA 160 0.6 0.4 0.2 162 263 48mV AA 264 52mV 0 150 200 250 300 Comparator input voltage (mV) —15— RSSI output voltage (mV) Audio response (dB ) RSSI CXA3107N NRZ comparator characteristics Comparator output voltage (V) 1.4 1.2 1.0 207 214 0.8 0.6 48mV 0.4 0.2 0 160 180 200 220 240 260 280 Comparator input voltage (mV) Variable cut-off characteristics of audio filter fCH=2.4kHz 0 fCL=1.2kHz Pin 13 voltage :L :H 25°C Response (dB) –10 –20 –30 –40 –50 –60 200 500 Detector output level (mvrms) Detector output level temperature characteristics 70 60 50 –20 0 25 50 75 Temperature (°C) —16— 1k 5k 10k Input frequency (Hz) CXA3107N Threshold level characteristics 100 Threshold level –214 (mV) : L→H : H→L 50 0 –20 0 25 –50 –100 —17— 50 75 Temperature (°C) CXA3107N Package Outline Unit : mm 20PIN SSOP (PLASTIC) + 0.2 1.25 – 0.1 ∗6.5 ± 0.1 0.1 11 20 1 6.4 ± 0.2 ∗4.4 ± 0.1 A 10 0.65 b (0.15) (0.22) 0.5 ± 0.2 0.1 ± 0.1 DETAIL B : SOLDER b=0.22 ± 0.03 + 0.03 0.15 – 0.01 + 0.1 b=0.22 – 0.05 + 0.05 0.15 – 0.02 0.13 M DETAIL B : PALLADIUM NOTE: Dimension “∗” does not include mold protrusion. 0° to 10° PACKAGE STRUCTURE DETAIL A PACKAGE MATERIAL EPOXY RESIN SONY CODE SSOP-20P-L01 LEAD TREATMENT SOLDER / PALLADIUM PLATING EIAJ CODE SSOP020-P-0044 LEAD MATERIAL 42/COPPER ALLOY PACKAGE MASS 0.1g JEDEC CODE NOTE : PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame). —18—