CXA3218N FM Demodulator for BS/CS Description The CXA3218N is the video signal demodulation IC for satellite broadcasting. This IC has most of the functions required for demodulation, and provides stable video detection in combination with the CXA3108Q (L-band down converter with PLL). Features • Built-in IF AGC • Excellent DG/DP characteristics • Keyed AFT input pin to support MUSE reception • 1st AGC control output pin • Single 5 V power supply operation Applications PAL/NTSC system BS tuners, etc. Structure Bipolar silicon monolithic IC 30P pin SSOP (Plastic) Absolute Maximum Ratings (Ta=25 °C) • Supply voltage VCC –0.3 to 7.0 V • Storage temperature Tstg –55 to +150 °C • Allowable power dissipation PD 1000 mW Operating Conditions • Supply voltage • Operating temperature VCC Topr 4.50 to 5.50 –35 to +85 V °C Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E98X25-TE CXA3218N IFAGC OPAOUT OPAINN OPAINP AGCCNT AGCLPF LPFP LPFN OSCB2 OSCE2 OSCE1 OSCB1 OSCGND VCODR1 VCODR2 Block Diagram and Pin Configuration (Top View) 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 AGC DET 1AGC MIX VCO 2AGC DCAMP OFF SET MTRX AGC AGCAMP DET AMP AFT IF IN1 IF IN2 GND OFFSET DETOUT 9 10 11 12 13 14 15 SH1 VCC 8 SH2 7 KEYEDIN 6 ANA 5 AFTUP 4 AFTDWN 3 GCONT 2 VREG 1 MTRXAGC REG —2— CXA3218N Pin Description Pin No. Symbol Typical pin voltage Equivalent circuit Description VCC 1 MTRXAGC 100 2.0 V to 3.5 V 40k AGC detection block MTRX-AGC analog output. 1 10k GND 2 VCC 3 IF IN1 5V Positive power supply. 10p IF IN2 5 GND 2.3V 5k 4 4 5k 3 10p AGC block IF input. 400 GND 0V Ground. VCC 6 OFFSET 2.0 V to 4.0 V 10k 150 AFT block offset adjustment. 6 GND VCC 200 7 DETOUT 2.45 V DETAMP block video output. 7 GND VCC 8 VREG 4.1 V Reference voltage output. Connect to GND with a 10 µF capacitor. 8 GND —3— CXA3218N Pin No. Symbol Typical pin voltage Equivalent circuit Description VCC 9 GCONT 1.5 V to 4.0 V 150 9 15k 2.7V 3k DETAMP block gain adjustment. GND 10 VCC AFTDWN 30k 4.9 V or 0.1 V 11 10 AFT block digital output. 11 30k AFTUP GND VCC 2k 12 ANA 2.4 V to 3.8 V 200 75k 200 12 47k 2.5V AFT block filter. Connect to GND with a 10 µF capacitor. GND VCC 13 KEYEDIN 150 0.3 V AFT block keyed input. 4k 13 30k GND VCC 14 SH2 2k 3.0 V to 3.5 V 15 2k AFT block sample-and-hold signal output. Connect to GND with a 0.1 µF capacitor. 200 14 15 SH1 GND —4— CXA3218N Pin No. Symbol 16 VCODR2 Typical pin voltage Equivalent circuit VCC 50 2.0 V to 3.0 V 17 Description 50 16 PLL detection output. 17 10k 10k VCODR1 GND 18 OSCGND 0V 19 OSCB1 1.4 V 20 OSCE1 0.7 V 21 OSCE2 0.7 V 22 OSCB2 1.4 V 23 LPFN Ground. VCC 22 VCO resonance circuit connect terminals. 19 21 20 3k 250 3k 20k 250 OSCGND VCC 260 260 23 4.5 V 24 PLL loop filter connect terminals. 24 LPFP GND VCC 25 25 AGCLPF 2.9 V to 3.0 V 30k AGC detection block filter. Connect to GND with a 0.01 µF capacitor. 150 GND VCC 26 AGCCNT 1.5 V to 3.5 V 150 26 AGC detection block gain adjustment. 45k GND —5— CXA3218N Pin No. Symbol 27 OPAINP Typical pin voltage Equivalent circuit Description VCC 100 100 1.5 V to 3.5 V 28 150 150 27 28 AGC detection block 1st AGC input. OPAINN GND VCC 29 OPAOUT 0.3 V or 3.5 V 100 AGC detection block 1st digital output. 29 5k GND VCC 30 IFAGC 2.0 V to 3.0 V 100 40k AGC detection block 2nd analog output. 30 10k GND —6— CXA3218N Electrical Characteristics DC Characteristics Item 1 Current consumption (Ta=25 °C, VCC=5 V, See the Electrical Characteristics Measurement Circuit.) Pin Symbol 2 ICC Conditions When no signal input Vin=–60 dBm, Min. Typ. Max. Unit 65 80 95 mA 3.0 3.5 3.7 0.1 0.3 1.0 2-1 AGC-1 High output voltage 29 VAGC1H 2-2 AGC-1 Low output voltage 29 VAGC1L 3-1 AGC-2 High output voltage 30 VAGC2H Vin=–10 dBm, Pin 26=3.0 V 2.6 2.9 3.2 3-2 AGC-2 Low output voltage 30 VAGC2L 1.5 2 2.4 1 VMTRH 3.0 3.5 3.7 1 VMTRL 1.5 2.3 2.7 16, 17 VVCD 400 MHz input 2.0 2.5 3.0 16, 17 IVCD Load resistance RL=1 kΩ 2.0 2.5 3 mA 8 VREG 3.9 4.15 4.4 V 14, 15 ISH 0 0.3 0.7 µA 4-1 4-2 5 6 AGC-MTRX High output voltage AGC-MTRX Low output voltage VCODR 1/2 output voltage VCODR 1/2 driver current capacitance 7 VREG output voltage 8 SH 1/2 leak current AC Characteristics (AGC) Item Pin Symbol IF input frequency 3, 4 fin 12 IF input level 3, 4 Vin 13 14 15 16 17 18 (input level) 1st AGC control sensitivity 1st AGC adjustment sensitivity 2nd AGC control sensitivity 2nd AGC adjustment sensitivity AGC-MTRX control sensitivity Vin=–10 dBm Pin 26=3.0 V, Pin 27=2.5 V Vin=–60 dBm, Pin 26=3.0 V Vin=–10 dBm, Pin 26=3.0 V, Pin 27=2.5 V Vin=–60 dBm, Pin 26=3.0 V, Pin 27=2.5 V KEYEDIN=0.5 V V (Ta=25 °C, VCC=5 V, See the Electrical Characteristics Measurement Circuit.) 11 1st AGC change point Pin 26=3.0 V, Pin 27=2.5 V Conditions One amplitude for balance input Min. Typ. Max. Unit — 400 — MHz –60 — –10 dBm 29 AGC1 Pin 26=2.5 V, Pin 27=2.5 V — –45 — 29 ∆ AGC Slope of variation — –0.8 — V/dB 29 AGC1/V — 42 — dB/V 30 ∆ AGC2 18 24 30 mV/dB 30 AGC2/V 3 11 18 dB/V 1 ∆ MTRX — 0.3 — V/dB Variation of change point/ Pin 27 DC variation Slope of variation Variation of change point/ Pin 26 DC variation Slope of variation —7— CXA3218N AGC Characteristics (PLL) Item 21 22 VCO oscillation frequency PLL capture range 24 DETOUT level 25-2 26 27 Pin VCO variation sensitivity 23 25-1 (Ta=25 °C, VCC=5 V, See the Electrical Characteristics Measurement Circuit.) DETOUT level variable range 1 DETOUT level variable range 2 GCONT adjustment sensitivity DETOUT frequency response (8 MHz) Conditions Symbol Min. Typ. Max. Unit MHz/V β ∗1 32 37 42 fosc ∗1 — 400 — — 40 — 0.60 0.68 0.76 Vp-p CAP Sum of positive/negative ∗1 polarities MHz 7 VOUT Dev.=17 MHzpp, Pin 9=2.7 V 7 VPdB VOUT=0 dB, Pin 9=+0.5 V 1 2 — dB 7 VMdB VOUT=0 dB, Pin 9=–0.5 V — –2 –1 dB 7 ∆ VOUT 2 4 6 dB/V 7 VOUTf –1 0 1 dB Output level/Pin 9 DC variation 8 MHz/1 MHz ∗1 Varies according to the external constant (coil, varicap). This characteristic is for NTSC, and it works at 480 MHz for PAL. AC Characteristics (Video) Item 31 IF → DET output DG (Ta=25 °C, VCC=5 V, See the Electrical Characteristics Measurement Circuit.) Pin Symbol 7 DGA Conditions Min. Typ. Max. Unit IF input ∗1 0 0.3 1.5 % DPA IF input ∗1 –2 0 2 deg 32 IF → DET output DP 7 33 fsc beat suppression level 7 IMA IF input 40 45 — dB 34 IF → DET output S/N 7 CSN IF input 55 60 — dB ∗1 Varies according to the external constant (coil, varicap). AC characteristics (AFT) Item 42 AFT offset adjustment sensitivity (Ta=25 °C, VCC=5 V, See the Electrical Characteristics Measurement Circuit.) Pin Symbol Conditions Min. Typ. Max. Unit 6 fAFT/V f0 variation/Pin 6 DC variation 5 8 12 MHz/V fAFT/D 60 180 360 kHz 43 AFT dead zone width 44 AFTUP/AFTDOWN Low 10, 11 AFTL 0 0.1 0.4 45 AFTUP/AFTDOWN High 10, 11 AFTH 4.7 4.9 VCC —8— V CXA3218N Description of Operation The CXA3218N consists of the following four function blocks. First, the signal flow is explained briefly, followed by the functions of each block. (1) AGC circuit (2) FM demodulation circuit (3) Detection signal amplification circuit (4) AFT circuit The 2nd IF differential signal input to IF IN1 and IF IN2 (Pins 3 and 4) passes through the AGC circuit to fix the signal level and is then input to the FM demodulation circuit. The FM demodulated signal by the PLL demodulation circuit is then input to the DETAMP circuit and AFT circuit. The AFT circuit detects the frequency error of the 2nd IF signal by the detection output voltage value, and outputs a command to the external frequency conversion circuits in order to correct the local frequency. 26 25 2nd AGC circuit 28 OPAINP OPAINN 10k 30 MTRXAGC 4 OPAOUT 3 Cc IFAGC 2nd IF signal input AGCLPF AGCCNT (1) AGC circuit The 2nd IF differential signal is input to IF IN1 and IF IN2 (Pins 3 and 4) to fix the signal level by the AGC circuit. A capacitor which determines the AGC loop time constant is connected to AGCLPF (Pin 25), and the adjustment voltage at the AGC (2nd AGC) output setting level is applied to AGCCNT (Pin 26). The 2nd AGC control voltage is output from IFAGC (Pin 30). The 1st AGC starting level adjustment voltage for the 1st IF is applied to OPAINP (Pin 27). The MTRXAGC (Pin 1) output is input through a 0.1 µF capacitor. The IFAGC (Pin 30) output is input to OPAINN (Pin 28) through a 10 kΩ resistor, and the 1st AGC control voltage is output from OPAOUT (Pin 29). At this time, the IFAGC (Pin 30) output is used at the linear portion against the input level. (See the Example of Representative Characteristics.) The add voltage of the negative characteristics of the OPAOUT (Pin 29) output 1st AGC control voltage and the IFAGC (Pin 30) output 2nd AGC control voltage is output from MTRXAGC (Pin 1). 29 1 0.1µF 27 1st AGC circuit AGCAMP BOTH-SIDE DETECTION (–) AMP COMP COMP ic Rc (–) AMP (+) AMP To FM demodulator —9— CXA3218N (2) FM demodulation circuit The FM demodulation circuit is a PLL demodulator which consists of an oscillator (OSC.), phase discriminator and DCAMP. The oscillator resonance circuit is connected to OSCB1 to OSCB2 (Pins 19 to 22) and the loop filter to LPFN (Pin 23) and LPFP (Pin 24). The DCAMP differential output comes from VCODR2 (Pin 16) and VCODR1 (Pin 17), and this output is used as the drive voltage for the varicap that comprises the oscillator. (3) Detection signal amplification circuit The signal which is detected by the FM demodulation circuit is amplified at DETAMP circuit and then output from DETOUT (Pin 7). The gain of this amplification circuit can be adjusted by the voltage applied to GCONT (Pin 9). (4) AFT circuit The AFT circuit detects the frequency error in the 2nd IF signal as a voltage displacement from the FM demodulation signal input to the AFT block, and outputs the two values of High (5 V) or Low (0 V) from AFTDWN (Pin 10) and AFTUP (Pin 11). High indicates the frequency change command (active-High). Furthermore, the High output from both pins indicates the dead zone. The LPF capacitor is connected to ANA (Pin 12) and the keyed pulse for the keyed AFT is input to KEYEDIN (Pin 13). The KEYEDIN (Pin 13) voltage should be 0 V during mean AFT value. The sample-and-hold capacitors are connected to SH2 (Pin 14) and SH1 (Pin 15). Apply the offset adjustment voltage to OFFSET (Pin 6) to cancel the effects of the DC offset in the IC. (5) Other A capacitor is connected to eliminate the regulator voltage noise to VREG (Pin 8), and use this output as the reference voltage for internal adjustment. —10— 0.1µ 1 5V 3 2 IF IN2 4 5 DETOUT 7 6 100k 9 8 100k 11 10 13 12 IFAGC MTRXAGC 10n 10µ CXA3218N 16 17 18 19 9p 20 21 22 23 24 25 26 27 28 29 9p 1k 30 20p VC OPAOUT VCC OPAINN IFI N1 OPAINP GND 1n 1n 0.01µ AGCCNT OFFSET AGCLPF VREG 10µ 100p LPFP DETOUT LPFN 10µ 100k 10k 15p OSCB2 GCONT 1n 1k OSCE2 1n AFTDWN OSCE1 AFTUP OSCB1 ANA —11— KEYEDIN OSCGND 14 SH2 5V VC L3 0.1µ VCODR1 15 SH1 100k 10µ 15p L2 15p L1 15p VC:HVU–358 1k VCODR2 L1 L2 L3 0.1µ Diameter Diameter Number of of wire of coil turns of wire 0.4 2.6 1.5T 0.4 2.6 1.5T 0.4 2.6 5.5T CXA3218N Electrical Characteristics Measurement Circuit 1 L1 L2 L3 1 5V –15V 15V 10µ 10µ 4 3 2 1n 1n 5 1.5k 470p 330 7 6 10µ 8 100k 22µ 1.5k 9 VREG 360k 100k GCONT CXA3218N 4.5M LPF 2SC2785 100k 11 10 12p 1M 22µ 15 1k 5p LH0032 12 6 23 43 22µ 5 11 10 VIDEO OUT 9.1k 14 13 12 16 17 18 19 9p 20 21 22 23 24 25 26 27 28 9p 1k 29 MTRXAGC IFAGC VCC OPAOUT IF IN1 OPAINN IF IN2 OPAINP GND 30 0.01µ AGCCNT OFFSET AGCLPF Diameter Diameter Number of of wire of coil turns of wire 0.4 2.6 1.5T 0.4 2.6 1.5T 0.4 2.6 5.5T 0.1µ 100p DETOUT LPFP 10n 1n 15p LPFN 10µ 10µ 20p 1k OSCB2 AFTDWN OSCE2 1n —12— 1n 100k 10k 15p OSCE1 AFTUP OSCB1 ANA OSCGND KEYEDIN 1n VC 0.1µ VCODR1 SH2 5V VC L3 1k VCODR2 SH1 100k 10µ 15p L2 15p L1 0.1µ VC:HVU–358 CXA3218N Electrical Characteristics Measurement Circuit 2 L1 L2 L3 Diameter Diameter Number of of wire of coil turns of wire 0.4 2.6 1.5T 0.4 2.6 1.5T 0.4 2.6 5.5T 5V IFIN 4 3 2 5 100k DETOUT DETOUT 7 6 10µ 9 VREG 8 11 10 AFTDWN AFTUP KEYEDIN 13 12 14 15 Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. MTRXAGC 0.1µ 1 GCONT CXA3218N 16 17 18 19 9p 20 21 22 23 24 25 26 27 28 9p 1k IFAGC 10n MTRXAGC OPAOUT VCC OPAINN IF IN1 OPAINP IF IN2 AGCCNT GND 29 0.01µ AGCLPF OFFSET 30 100p LPFP DETOUT LPFN 10µ 1n 15p OSCB2 1n 10µ 20p 1k OSCE2 AFTDWN 1n —13— 100k 100k 10k 15p OSCE1 AFTUP OSCB1 ANA OSCGND KEYEDIN 1n VC 0.1µ VCODR1 SH2 5V VC L3 1k VCODR2 SH1 100k 15p L2 15p L1 10µ OPAOUT 0.1µ VC:HVU–358 CXA3218N Application Circuit CXA3218N Example of Representative Characteristics AGCDET characteristics Pin 26 (AGCCNT) =2.5V Pin 27 (OPAINP) =2.5V 4 IFAGC characteristics 3.5 3.5 Pin 30 (IFAGC) output level (V) Pins 29, 30, 1 output level (V) Pin 1 MTRXAGC 3 Pin 30 IFAGC 2.5 2 1.5 1 Pin 29 OPAOUT 0.5 0 –70 –60 –50 –40 –30 –20 –10 3 Pin 26=2V Pin 26=3V 2 1.5 –70 0 –60 –50 Input level 400 MHz (dBm) 4 3 2 1 0 399 399.5 –10 0 ∗ fo=dead zone center frequency 405 400 395 Pin 11 AFTUP 400 400.5 390 401 2 2.5 Input frequency (MHz) 3.7 –20 Input level=–40dBm 410 Pin 10 AFTDWN Pin 10 AFTDWN –30 AFT offset adjustment sensitivity characteristics fo-Frequency (MHz) AFTDWN/AFTUP output level (V) Pin 11 AFTUP –40 Input level 400 MHz (dBm) AFT characteristics Pin 6 (OFFSET) =3V Pin 13 (KEYEDIN) =0V 5 Pin 26=2.5V 2.5 3 3.5 4 Pin 6 input voltage (V) SH pin voltage characteristics Pin 6 (OFFSET) =3V Pin 13 (KEYEDIN) =0V 4 ANA pin voltage characteristics Pin 6 (OFFSET) =3V Pin 13 (KEYEDIN) =0V 3.5 3.6 ANA output level (V) SH1/SH2 output level (V) 3.8 Pin 15 SH1 3.3 3.1 Pin 14 SH2 3.4 3.2 3 2.8 2.6 2.4 2.9 2.2 2.7 390 395 400 405 410 Input frequency (MHz) 2 398.5 399 399.5 400 400.5 Input frequency (MHz) —14— 401 401.5 CXA3218N PLL lock characteristics Input level=–40dBm 2.5 3.3 2 3.1 1.5 DETOUT level (dB) VCODR1 output level (V) 3.5 2.9 2.7 2.5 2.3 2.1 1.9 1 0.5 0 –0.5 –1 –2 –2.5 1.5 375 380 385 390 395 400 405 410 415 420 425 2.2 2.45 2.7 2.95 Input frequency (MHz) Pin 9 input voltage (V) DETOUT characteristics Supply current vs. Supply voltage Pin 9 (GCONT) =2.7V 2 1.5 95 1 90 0.5 0 –0.5 –1 –1.5 3.2 For no input 100 Supply current (mA) DETOUT level (dB) ∗ Output level is adjust for 0dB when Pin 9=2.7V –1.5 1.7 –2 GCONT adjustment sensitivity Input level=–40dBm Video signal 85 80 75 70 65 0 2 4 6 8 10 Output frequency (MHz) 60 4 4.5 5 Supply voltage (V) —15— 5.5 6 CXA3218N Package Outline Unit : mm 30PIN SSOP (PLASTIC) + 0.2 1.25 – 0.1 ∗9.7 ± 0.1 1 + 0.1 0.22 – 0.05 7.6 ± 0.2 16 ∗5.6 ± 0.1 30 0.10 A 15 + 0.05 0.15 – 0.02 0.65 0.13 M 0.5 ± 0.2 0.1 ± 0.1 0° to 10° NOTE: Dimension “∗” does not include mold protrusion. DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SONY CODE SSOP-30P-L01 LEAD TREATMENT SOLDER/PALLADIUM PLATING EIAJ CODE SSOP030-P-0056 LEAD MATERIAL 42/COPPER ALLOY PACKAGE MASS 0.1g JEDEC CODE NOTE : PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame). —16—