CXA3329ER Analog Signal Processor TX-IF IC for W-CDMA Cellular Phones Description The CXA3329ER is an analog signal processor TX-IF IC for the W-CDMA cellular phones. This IC contains voltage-controlled gain control amplifier and quadrature modulator. Preliminary 24 pin VQFN (Plastic) Features • Gain control amplifier with a linear and wide gain variable range • I-Q quadrature modulator • Power saving switch • Low voltage operation (2.7 to 3.3V) • Small package (24-pin VQFN) Applications Analog signal processor TX-IF IC for the W-CDMA cellular phones Structure Bipolar silicon monolithic IC Absolute Maximum Ratings • Supply voltage Vcc • Operating temperature Topr • Storage temperature Tstg –0.3 to +5.5 –55 to +125 –65 to +150 V °C °C Recommended Operating Conditions • Supply voltage Vcc 2.7 to 3.3 • Operating temperature Ta –25 to +85 V °C Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– PE00Y17-PS CXA3329ER PS 19 VCONT 20 NC NC MODVCC MODGND PVCC PGND Block Diagram 18 17 16 15 14 13 12 NC 11 GND4 GCA control 1/4 AGCVCC2 10 Local IN 21 Switch 1/2 8 NC OUT 24 7 Local SW 1 2 3 4 5 6 QX 23 Q OUTX IX NC I 9 AGCGND1 22 AGCVCC1 AGCGND2 –2– CXA3329ER Pin Description Pin No. Symbol Typical pin voltage [V] 1 AGCVCC1 2.85 2 AGCGND1 0 Equivalent circuit Description Positive power supply. Ground. MODVCC 150 3, 4 5, 6 I, IX Q, QX 3 5 I, Q inputs. Applies a bias voltage from the external source. 2k 1.425 150 4 6 MODGND PVCC 30k 7 7 Local SW Frequency division value selection. High: 1/4 frequency division Low: 1/2 frequency division Open: Low — PGND 8, 9 NC — No connection. PVCC 2k 10 10 Local IN 0.5k — 2k Local input. 50 GND4 PGND 11 GND4 0 Ground. 12 NC — No connection. 13 PGND 0 Ground. 14 PVCC 2.85 15 MODGND 16 MODVCC Positive power supply. 0 Ground. 2.85 Positive power supply. –3– CXA3329ER Pin No. Symbol 17, 18 NC Typical pin voltage [V] Description Equivalent circuit — No connection. AGCVCC2 Power saving mode switch input. High: Active mode Low: Power saving mode 40k 19 PS — 19 60k AGCGND2 AGCVCC2 8k 8k 20k 20 VCONT — 20 Gain control voltage input. 6k 6k AGCGND2 21 AGCVCC2 2.85 22 AGCGND2 0 Positive power supply. Ground. 23 24 AGCVCC1 25 25 890 23 24 OUTX OUT 890 — IF signal differential output. AGCGND1 –4– CXA3329ER Input Conditions for Each Pin Pin No. Item Conditions Symbol Min. Typ. Max. Unit 1.35 1.425 1.65 V — 0.4 1 Vp-p — 5 MHz 3, 4, 5, 6 I/Q bias voltage VBIQ 3, 4, 5, 6 I/Q input voltage VIQ 3, 4, 5, 6 I/Q band width BWIQ — 7 Local switch voltage-High VLSH 2.5 VCC V 7 Local switch voltage-Low VLSL 0 0.8 V 10 Local frequency fLO — 760 — MHz 10 Local input level LO –18 –15 –12 dBm 19 PS voltage-High VPSH 2.0 VCC V 19 PS voltage-Low VPSL 0 0.8 V 20 Control voltage range VCN 0 VCC V Differential input –5– CXA3329ER Electrical Characteristics Item Symbol Conditions Measurement Min. Typ. Max. point Unit DC Characteristics Current consumption 1 Imax VCONT = 2.85V A 24 Current consumption 2 Imin VCONT = 0V A 17 Power saving current Ips PS = low (in power saving mode) A — Output IP3 OIP3 Note1 B 8.5 Output power 1 PO1 VCONT = 2.3V, differential output, f = 380MHz B –19 –15 –11 Output power 2 PO2 VCONT = 0.3V, differential output, f = 380MHz B –83 –77 –73 Gain control range Gcr VCONT = 0.3 to 2.3V, f = 380MHz B 54 62 Output noise power 1 No1 VCONT = 1.8V, I/Q inputs are no signal. B — — –147 dBm/ Hz I, Q residual sideband product Img Suppression ratio of desired signal (f = 380 + 1) MHz and image signal (f = 380 – 1) MHz B — — –25 Carrier leak CL Ratio of desired signal (f = 380 + 1) MHz and local leak (f = 380) MHz B — — –18 Input I/Q phase error IQPE Input signal I/Q phase difference –90° when the output signal I/Q phase difference is 90°. B –3 0 3 deg Input I/Q gain error IQGE I/Q input signal level difference when the output signal I/Q levels are the same. B –2.5 0 2.5 dB — mA 5 µA AC Characteristics dBm dBm 70 dB dBc • Unless otherwise specified, the I/Q baseband input signals and local input signal use the conditions shown in the Electrical Characteristics Measurement Circuit and the control voltage and power saving pins are set to VCONT = 2.3V, PS = high. The local switching pin is left open (1/2 frequency division). • IF output impedance is 1kΩ. • Values measured with a Sony evaluation board. Note1) Set the control voltage so that the output power becomes –15dBm under the conditions shown in the Electrical Characteristics Measurement Circuit. Input the two tone signals of 570kHz, 200mVp-p and 630kHz, 200mVp-p to I-IX; and also input to Q-QX the two tone signals whose phases are deviated by 90 degrees from those signals. The ratio of the desired component and the 3rd order harmonic component of the outputs resulted from the above is measured, and the power level that is made by adding the half ratio to the desired component power level is labeled as the output IP3. See the figure on the next page. –6– CXA3329ER Output level S OIP3 = S + (S – IM3)/2 A IM3 f0 + 690kHz f0 + 630kHz f0 + 570kHz f0 + 510kHz Frequency –7– CXA3329ER Electrical Characteristics Measurement Circuit 1µ 1µ NC MODVCC 19 PS 1n 15 14 1n 13 PGND 16 PVCC 17 MODGND 18 NC Vcc Power save Active A NC 12 GND4 11 20 VCONT 1k 1n Local IN 10 21 AGCVCC2 1n fLO = 760MHz –15dBm Local signal input 1µ 22 AGCGND2 NC 9 23 OUTX NC 8 22n∗1 ∗2 QX 1 Q 22n∗1 IX 24 OUT I OUTPUT B 1/4 frequency division AGCGND1 1n AGCVCC1 1n 2 3 4 5 6 Local SW 1µ 7 1/2 frequency division 10k 1/2 × Vcc 10k 10k 1n 1µ 1µ 1µ 1µ cos (2πf) f = 1MHz 400mVp-p Gain = 1 sin (2πf) f = 1MHz 400mVp-p Gain = 1 Baseband signal input ∗1 Murata, Inc. LQN21A22NJ (K) 04 ∗2 TOKO, Inc. B5FL 616DS-1135 –8– 10k CXA3329ER Application Circuit Vcc NC MODVCC 19 PS 1n 15 14 1n 13 PGND 16 PVCC 17 1µ MODGND 18 NC Power save Active 1µ NC 12 GND4 11 20 VCONT 1k 1n Local IN 10 21 AGCVCC2 1n Local signal 1µ 22 AGCGND2 NC 9 23 OUTX NC 8 Local SW 7 1 QX ∗ Q 24 OUT IX ∗ I 1n AGCVCC1 1n AGCGND1 ∗ 2 3 4 5 6 1µ 1/4 frequency division 1/2 frequency division 10k 1/2 × Vcc 10k 10k 1n 1µ 1µ 1µ 1µ 10k Baseband signal ∗ Adjust these values so that the impedance matching with this IC is optimum. Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. –9– CXA3329ER Description of Operation 1. Outline of operation This IC performs the signal processing between the analog transmit baseband processor block and the analog transmit RF processor block of the cellular phone. The figure below shows the general circuit block diagram for the portable cellular phones using this IC. The input for this IC is connected to the baseband signal processor block; the output is connected to the analog RF processor block. CXA3328TN RF receive/ transmit processor Baseband signal processor CXA3329ER 2. IC Internal Signal Flow Two baseband-processed signals I, Q and the local signal are input to this IC as shown in the figure below. The local signal is 1/2-frequency divided, and that signal becomes the quadrature I/Q local signal. The baseband I/Q signals are input to the quadrature modulatar, and baseband processing to IF upconversion is performed with the quadrature local signals. The signal is input to the gain control amplifier, and output after the gain controlled to the necessary level. I/IX OUT/OUTX Q/QX –90˚ Local 1/2 div (1/4 div) – 10 – 0˚ CXA3329ER Notes on Operation 1. Baseband signal I/Q input Pins 3 to 6, where the baseband signal is input, do not have a determined voltage internally on the IC. Therefore, a bias voltage equivalent to 1/2VCC should be applied externally. 2. IF signal output The IF signal outputs, OUT/OUTX, are differential outputs. The output impedance should be 1kΩ including the external resistance with differential. Also, it is necessary to connect the inductor to eliminate the parasitic capacitance in the IC. 3. Notes on power supplies The CXA3329ER is designed to operate by a 2.85V stabilized power supply to allow use with the battery driven portable phones. Using the multiple voltage regulators throughout the phone is recommended to minimize the power supply noise in the CXA3329ER power supply unit. The recommended power supply range for the CXA3329ER is from 2.7V to 3.3V. Decouple the power supplies around the CXA3329ER using 1µF capacitor for each VCC pin. Locate this capacitor as close to the pins as possible to minimize the series inductance. Using an additional 1nF decoupling capacitor in parallel to the 1µF capacitor is recommended to further reduce the high frequency noise in the power supply input to the CXA3329ER. – 11 – CXA3329ER Design Materials (Design Guarantee) Electrical Characteristics Item Symbol (VCC = 2.7 to 3.8V, Ta = –25 to +85°C) Conditions Measurement Min. Typ. Max. point Unit DC Characteristics Current consumption 1 Imax VCONT = 2.85V A 24 Current consumption 2 Imin VCONT = 0V A 17 Power saving current Ips PS = low (in power saving mode) A — — 5 µA Output IP3 OIP3 Note1 (See page 6.) B 8.5 — — dBm Output power 1 PO1 VCONT = 2.3V, differential output, f = 380MHz B –19 –15 Output power 2 PO2 VCONT = 0.3V, differential output, f = 380MHz B –83 –77 –73 Gain control range Gcr VCONT = 0.3 to 2.3V, f = 380MHz B 54 62 70 dB Gain accuracy Gct Difference between the output powers where Ta = –25°C, 85°C and Ta = 27°C B –2 0 2 dB Gain flatness Gflat IF ± 2.5MHz B 0.25 dB Output noise power 1 No1 PO = –25dB, I/Q inputs are no signal. B — — –147 Output noise power 2 No2 PO = –65dBm, I/Q inputs are no signal. B — — –162 I, Q residual sideband product Img Suppression ratio of desired signal (f = 380 + 1) MHz and image signal (f = 380 – 1) MHz B — — –25 Carrier leak CL Ratio of desired signal (f = 380 + 1) MHz and local leak (f = 380) MHz B — — –18 Input I/Q phase error IQPE Input signal I/Q phase difference –90° when the output signal I/Q phase difference is 90°. B –3 0 3 deg Input I/Q gain error IQGE I/Q input signal level difference when output signal I/Q levels are the same. B –2.5 0 2.5 dB B — — 3 % B — — 10 µs mA AC Characteristics Error vector magnitude EVM Response time Tr Until output rise of 90% after the power is turned ON. –11 dBm –0.25 0 dBm/ Hz dBc • Unless otherwise specified, the I/Q baseband input signals and local input signal use the conditions shown in the Electrical Characteristics Measurement Circuit and the control voltage and power saving pins are set to VCONT = 2.3V, PS = high. The local switching pin is left open (1/2 frequency division). • IF output impedance is 1kΩ. • Values measured with a Sony evaluation board. – 12 – CXA3329ER Design Materials (Design Guarantee) Item Symbol Conditions Measurement Min. Typ. Max. point Unit Input Impedance I/Q input resistance RIQ Single 3, 4, 5, 6 60 85 — kΩ I/Q input capacitance CIQ Single 3, 4, 5, 6 — — 10 pF VCONT pin input resistance RVC 20 10 — — kΩ Local IN input resistance RL 10 62.5 Ω – 13 – 37.5 50 CXA3329ER Package Outline Unit: mm 24PIN VQFN(PLASTIC) 0.9 ± 0.1 4.0 0.6 ± 0.1 3.6 18 A 19 0.05 0.7 C 13 12 S B 9) .3 (0 78 4. PIN 1 INDEX 24 ˚ 45 6 S x4 .1 5) 1.0 0.1 S A-B C (0 0.4 C 1 0. 6 7 x4 0.2 ± 0.01 0.03 ± 0.03 (∗1) (Stand Off) 0.225 ± 0.03 0.1 S A-B C 0.05 M S A-B C Solder Plating 0.13 ± 0.025 + 0.09 0.14 – 0.03 TERMINAL SECTION PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN LEAD TREATMENT SOLDER PLATING EIAJ CODE LEAD MATERIAL COPPER ALLOY JEDEC CODE PACKAGE MASS 0.04g SONY CODE VQFN-24P-03 – 14 – Sony Corporation