ComLink™ Series CY2LL843 High-drive Two-Channel LVDS Repeater/Mux Features • • • • • ANSI TIA/EIA-644-1995-compliant Designed for data rates to > 700 Mbs = (350 MHz) Single 2 × 2 with high-drive output drivers Low -voltage differential signaling with output voltages of ± 350 mV into 50-ohm load version (Bus LVDS) Single 3.3V supply Accepts ± 350-mV differential inputs Output Drivers are high-impedance when disabled or when VDD ≤1.5V 16-pin SOIC/TSSOP packages Industrial version available The Cypress CY2LL843 are configured as a single two-channel repeater/Mux. The LVDS standard provides a minimum differential output voltage of 247 mV into a 50-ohm load and receipt of as little as 100 mV signals with up to 1V of DC offset between transmitter and receiver. The Cypress CY2LL843 doubles the output drive current to achieve BusLVDS signaling levels with a faster rise/fall times into 50-ohm load. A doubly terminated BusLVDS line enables multipoint configurations. Description Designed for both point to point based-band multi-point data transmission over controlled impedance lines. The Cypress CY2LL843 are differential line drivers and receivers that utilize Low Voltage Signaling or LVDS, to Block Diagram Pin Configuration VDD 1DE 1A 1Y 1Z 1B 2A 2Y 2Z 2B 1B 1A GND 2DE S0 S0 S1 1DE S1 2A 2B GND 1 2 3 4 5 6 7 8 CY2LL843 • • • • achieve signaling rates of 700Mbs. The receiver outputs can be switched to either or both drivers through the multiplexer control signals S0/S1. This provides flexibility in application for either a splitter or router configuration with a single device. 16 15 14 13 12 11 10 9 VDD VDD 1Y 1Z 2DE 2Z 2Y GND 16 pin SOIC/TSSOP Cypress Semiconductor Corporation Document #: 38-07066 Rev. OBS • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised December 02, 2004 ComLink™ Series CY2LL843 Pin Description Pin Number Pin Name 1,2 1B, 1A 3 S0 4 1DE 5 S1 6,7 2A, 2B 8,9 GND 10,11 2Y, 2Z 12 2DE 14,13 IY, 1Z 15,16 VDD Pin Description Differential Input Channel 1 Function Select 0 Data Enable Channel 1 Function Select 1 Differential Input Channel 2 Ground Differential Output Channel 2 Data Enable Channel 2 Differential Output Channel 1 Supply Voltage Table 1. Mux Function Table Output[[1]] Input Function S0 S1 1Y/1Z 2Y/2Z 0 0 1A/1B 1A/1B 1 0 2A/2B 2A/2B Splitter B 0 1 1A/1B 2A/2B Pass-thru Router 1 1 2A/2B 1A/1B Cross Point Router Splitter A Table 2. Absolute Maximum Rating Over Operating Free-Air Temperature[[2]] Supply Voltage Range, VDD(1) –0.5V to 4V Voltage Range (DE,S0,S1) –0.5V to 6.0V Input Voltage Range, VIN (A or B) –0.5V to VDD + 0.5V ESD (All pins) Class 3, A: 2KV, B: 500V Storage Temperature Range –65°C to 150°C Table 3. Recommended Operating Conditions[3] Parameter Description VDD Supply Voltage VIH High Level Input Voltage (S0,S1,1DE,2DE) (S0,S1,1DE,2DE) VIL Low Level Input Voltage VID Magnitude of Differential Input Voltage VIC Common Mode Input Voltage TA Operating Free Air Temperature ( see Figure 11,Figure 12, Figure 13) Min. Typ. Max. Unit 3 3.3 3.6 V 2 0.8 0.1 0.6 VID/2 2.4 – (VID/2) VDD – 0.8 –40 85 °C Notes: 1. See Figure 1. 2. Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This is intended to be a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 3. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required Document #: 38-07066 Rev. OBS Page 2 of 13 ComLink™ Series CY2LL843 Table 4. Receiver Electrical Characteristics Over Recommended Operating Conditions Parameter VITH+ Description Test Conditions Positive-going Differential Input Voltage Threshold Min. Typ. VCM = 1.2V VITH- Negative-going Differential Input Voltage Threshold VCM = 1.2V –100 II Input Current ( A Inputs) VI = 0V –0.5 II Input Current (B Inputs) II (Off) Power Off Current (A or B Inputs) Unit 100 mV mV VI = 2.4V VI = 0.8V Max. 0.5 VI = 2.4V –10 uA –10 uA 10 uA 10 uA 0.1 10 uA Min. Typ. Max. Unit 247 340 VDD = 0V Table 5. Receiver Electrical Characteristics Over Recommended Operating Conditions Parameter Description VOD Differential Output Voltage Swing ~VOD Change in differential Output Voltage Swing between logic states VOC(SS) Steady State Common-mode output voltage ~VOC(SS) Change in Steady State Common-mode output between logic states VOC(PP) Peak to Peak Common-mode output voltage ICC Supply Current Test Conditions RL = 50 Ohm See Figure 11, Figures [15]–[19] 454 mV -50 50 mV 1.125 1.375 V 50 mV 150 mV No load f = 100 MHz 30 mA RL = 50 ohm, F = 100 MHz 35 mA 25 mA See Figure 12 -50 3 Both Channels Disabled IH High Level Input Current S0,S1,DE VIH = 5V 20 S0,S1,DE VIL = 0.8V 5 uA IIL Low Level Input Current IOS Short Circuit Current VOY or V0Z = 0V IOZ High Impedance Output Current VOD = 60mV 0.1 1 VO= 0V or VDD 0.1 1 Cin Input Capacitance 1A, 1B, 2A, 2B 3 pF Control Input Capacitance S0, S1, 1DE, 2DE 8 pF uA 20 VOD = 0V mA 20 uA Table 6. Differential Receiver to Driver Switching Characteristics Over Recommended Operating Conditions [[5]] Parameter Description Test Conditions Min. Typ.[[4]] Max. Unit TPLH Differential Propagation delay, Low to High CL = 10 pF (see Figure 14) 4 6 nS TPHL Differential Propagation delay, High to Low 4 6 nS Tsk(p) Pulse Skew ( TPHL–TPLH) 0.2 Tr Transition Low to High 800 1500 pS 800 1500 pS Tf Transition High to Low Notes: 4. All typical values are measured at 25°C with a 3.3V supply. 5. These parameters are measured over supply voltage and temperature ranges recommended for the device. Document #: 38-07066 Rev. OBS nS Page 3 of 13 ComLink™ Series CY2LL843 Table 6. Differential Receiver to Driver Switching Characteristics Over Recommended Operating Conditions (continued)[[5]] TPHZ Propagation delay, High level to High impedance output TPLZ Propagation delay, Low level to High impedance output TPZH (see Figure 14) 4 10 nS 4.3 10 nS Propagation delay, high impedance to High level output 3 10 nS TPZL Propagation delay, high impedance to Low level output 2 10 nS TPHL_skR1_Dx Channel to Channel skew-receiver 1 to Any mux related drivers 95 pS TPLH_skR1_Dx Channel to Channel skew-receiver 1 to Any mux related drivers 95 pS TPPHL_skR2_Dx Channel to Channel skew-receiver 2 to Any mux related drivers 95 pS TPLH_skR2_Dx Channel to Channel skew-receiver 2 to Any mux related drivers 95 pS DJ Deterministic Jitter (100MHz, 25°C, 95 pS (see Figure 7) PRBS-Differential VID =0.4V, S0, S1 = 0) Table 7. High Frequency Parametrics Parameter Fmax Description Test Conditions Maximum frequency VDD = 3.3V Min. 50% duty cycle tW(50–50) Standard Load Circuit. S0/S1 1Y/1Z Cross Point Router 2Y/2Z 1A/1B 1Y/1Z S0/S1 Unit 400 MHz S0/S1 2A/2B 2A/2B Max. Splitter O ptions Router O ptions 1A/1B Typ. Pass Thru Router 2Y/2Z 1A/1B 1Y/1Z Splitter A 2A/2B 2Y/2Z 1A/1B 1Y/1Z Splitter B 2A/2B 2Y/2Z S0/S1 Figure 1. Two-channel Cross Point Switch/Mux Document #: 38-07066 Rev. OBS Page 4 of 13 ComLink™ Series CY2LL843 Dynamic IDD CY2LL843C VID=0.4, VIC=1.2V S0, S1=01 Temp = 25°C 45.00 45.00 43.00 43.00 41.00 41.00 39.00 39.00 37.00 37.00 Idd (mA) Idd (mA) Dynamic IDD CY2LL843C VID=0.4, VIC=1.2V S0, S1=00 Temp = 25°C 35.00 33.00 31.00 Vdd=3.60V 29.00 Vdd=3.30V 27.00 Vdd=3.00V 35.00 33.00 31.00 Vdd=3.60V 29.00 Vdd=3.30V 27.00 Vdd=3.00V 25.00 25.00 50 100 150 200 250 300 350 50 400 100 150 200 250 300 350 400 Fin (MHz) Fin (MHz) Figure 2. Dynamic IDD vs. Frequency 25 C Dynamic IDD CY2LL843C VID=0.4, VIC=1.2V S0, S1=00 Temp=85°C Dynamic IDD CY2LL843C VID=0.4, VIC=1.2V S0, S1=01 Temp=85°C 50.00 45.00 43.00 41.00 45.00 37.00 Idd (mA) Idd (mA) 39.00 35.00 33.00 31.00 35.00 Vdd=3.60V 29.00 Vdd=3.30V 27.00 Vdd=3.00V 25.00 50 40.00 Vdd=3.60V 30.00 Vdd=3.30V Vdd=3.00V 100 150 200 250 300 350 400 25.00 50 100 150 Fin (MHz) 200 250 300 350 400 Fin (MHz) Figure 3. Dynamic IDD vs. Frequency 85 C Document #: 38-07066 Rev. OBS Page 5 of 13 ComLink™ Series CY2LL843 V DD=3.30V , Te m p = 25 C VDD=3.30V, Temp = 85 C 0.400 Vod (V) Vod (V) 0.500 0.300 0.200 0.100 20 120 220 0.500 0.300 0.100 20 320 120 Fr e q (M Hz) 1Y 1Z 220 320 Fre q (MHz) 2Y 1Y 2Z 1Z 2Y 2Z 1.280 1.270 1.260 1.250 20 120 220 320 VOC(ss) [VOC(pp) <0.50V] VOC(ss) [ VOC(pp) <0.050V ] Figure 4. VOD vs. Frequency 1.280 1.270 1.260 1.250 20 120 Freq (MHz) 1Y/1Z 220 320 Freq (MHz) 1Y/1Z 2Y/2Z 2Y/2Z Figure 5. VOC(ss) vs. Frequency VDD-3.30V, Temp = 25 C 60.0 60.0 40.0 40.0 PW (ns) PW (ns) VDD =3.30V, Temp = 25 C 20.0 0.0 20.0 0.0 0 100 200 300 400 20 120 Freq (MHz) 1Y 1Z 2Y 220 320 Freq (MHz) 2Z 1Y 1Z 2Y 2Z Figure 6. Pulse width vs. Frequency Document #: 38-07066 Rev. OBS Page 6 of 13 ComLink™ Series CY2LL843 Dj Deterministic Jitter (P-P) VDD= 3.30V, Temp = 25 C 200 150 100 50 0 20 120 220 320 Freq (MHz) 1Y/1Z 2Y/2Z Figure 7. Deterministic Jitter (p-p) vs. Frequency V DD=3.30V , Te m p = 25 C VDD=3.30V, Temp = 85 C 0.400 Vod (V) Vod (V) 0.500 0.300 0.200 0.100 20 120 220 320 0.500 0.300 0.100 20 120 Fre q (M Hz) 1Y 1Z 220 320 Fre q (MHz) 2Y 2Z 1Y 1Z 2Y 2Z Figure 8. TPLH vs. VIC 3.3V, 50 MHz Document #: 38-07066 Rev. OBS Page 7 of 13 ComLink™ Series CY2LL843 Temp = 25°C 6.000 TPHL 5.500 5.000 VID 0.400 4.500 4.000 3.500 0 0.5 1 1.5 2 2.5 VIC Figure 9. TPHL vs. VIC 3.3V, 50 MHz Temp=85°C 100.00 80.00 TPLH-TPHL (ps) 60.00 40.00 20.00 0.00 -20.00 50 100 150 200 250 300 350 400 -40.00 -60.00 -80.00 -100.00 Freq. (MHz) Figure 10. TPLH-TPHL vs. VIC 3.3V Document #: 38-07066 Rev. OBS Page 8 of 13 ComLink™ Series CY2LL843 A Pulse B Generator P ulse G enerator Y R D A R B D Y Z RL & RC RL Z DE 10 pF DE 10 pF CL = 10pF 10 pF VIA 1 VI(A) 1.4V VI(B) 1.0V 0.0V 1.4 V 0 V D if f e r e n t ia l 1 .2 V C M 1.0 V VIB 1.4 V V0Y 0 V D iff e r e n t ia l 1 .2 V C M V0Z 1.0 V TPHL TPLH tF tR 80% Figure 11. Test Circuit and Voltage Definitions for the Differential Output Signal[[6],[7],[8]] A Pulse Generator B Y R D RL Z 0 V D if f e r e n t ia l 20% V0Y - V0Z CL = 10pF 10 pF V I(A) 1.4V V I(B) 1.0V tF Figure 13. Differential Receiver to Driver Propagation Delay and Driver Transition Time[[6],[10],[11]] 1.0 V or 1.2V DE tR 1.2V A B Y R D 1.2V Z DE CL =10 pF 2.0V Voc (pp) V DD DE Voc (ss) V0Y or V0Z V0Y or V0Z Figure 12. Test Circuit and Voltage Definitions for the Driver Common-Mode Output Voltage[[6],[7],[8],[9]] 1.4V 0.8V 1.4V T PZH T PZH 1.25V 1.2V 1.2V T PLZ 1.15V 1.0V Figure 14. Test Circuit & Voltage Definitions for the Driver Common-Mode Output Voltage[[6],[10]] Notes: 6. All input pulses are supplied by a frequency generator with the following characteristics: tR and tF £ 1 nS; pulse rep. rate = 50 MppS; pulse width = 10 ± 0.2 nS. 7. RL = 50 Ohm. 8. CL includes instrumentation and fixture capacitance within 6 mm of the DUT. 9. VOC measurement requires equipment with a 3 dB bandwidth of at least 300 MHz. 10. RL = 50 Ohm ±1%. 11. Point to Point: RL = 50 Ohm ±1% CL 3 pF. Document #: 38-07066 Rev. OBS Page 9 of 13 ComLink™ Series CY2LL843 Application Engineering Table 8. Technical Notes on STD Drive (LL842, A and D) vs. High Drive (LL843, B and C)[[12]] Z O =50 A RL=100 ohm Pulse Generator Z O =50 CL = 10pF 2 locations Figure 15. Termination Scheme for 100-Ohm External Termination ZO=50 100 ohm R e c e iv e r c h ip w ith 1 0 0 O h m o n c h ip te rm in a tio n CL CL Figure 16. Termination Scheme for 100-Ohm Self-termination Interface Chip Typical Characteristics (@VDD = 3.3V/TA = 25°C) C D Unit VOX 1.2 1.2 1.2 1.2 V DC Offset 1.0 1.0 1.0 1.0 V VOD Min. 0.25 0.5 0.25 0.125 V VOD Max 0.45 0.9 0.45 0.225 V T/Rise 1.4 1.4 0.6 0.6 ns T/Fall 1.4 1.4 0.6 0.6 ns Standard Drive Current drive of 1i +/i ZO=50 B +/i A D 100 ohm 50 ohm Hi Drive Current drive of 2i +/2i +/2i B 25 ohm C 100 ohm 50 ohm 25 ohm Figure 19. Comparison Standard Drive ‘842 vs. High Drive ‘843 Note: 12. See Figure 19. CY2LL843 Current (ma) 5 0 -5 Voh - Ioh -10 -15 -20 0 1 2 3 4 Voltage Figure 17. VOH vs. IOH CY2LL843 Current (ma) 8 6 4 Vol - Iol 2 0 -2 0 1 2 3 4 Voltage Figure 18. Low-level Output vs. Current Document #: 38-07066 Rev. OBS Page 10 of 13 ComLink™ Series CY2LL843 Ordering Information Part Number Package Type Product Flow CY2LL843SI 16-pin SOIC Industrial, –40°C to 85°C CY2LL843SIT 16-pin SOIC–Tape and Reel Industrial, –40° to 85°C CY2LL843ZI 16-Pin TSSOP Industrial, –40° to 85°C CY2LL843ZIT 16-pin TSSOP–Tape and Reel Industrial, –40°C to 85°C CY2LL843SC 16-pin SOIC Commercial, 0°C to 70°C CY2LL843SCT 16-pin SOIC–Tape and Reel Commercial, 0°C to 70°C CY2LL843ZC 16-pin TSSOP Commercial, 0°C to 70°C CY2LL843ZCT 16-pin TSSOP–Tape and Reel Commercial, 0°C to 70°C Package Drawings and Dimensions 16-Lead (150-Mil) Molded SOIC S16 51-85068-A Document #: 38-07066 Rev. OBS Page 11 of 13 ComLink™ Series CY2LL843 Package Drawings and Dimensions (continued) 16-pin Thin Shrunk Small Outline Package (4.40 MM Body) Z16 51-85091 All product and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-07066 Rev. OBS Page 12 of 13 © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. ComLink™ Series CY2LL843 Document Title: CY2LL843 High-drive Two-Channel LVDS Repeater/Mux Document Number: 38-07066 REV. ECN No. Issue Date Orig. of Change Description of Change ** 116745 08/01/02 CTK New Data sheet *A 122751 12/14/02 RBI Add power up requirements to operating conditions information OBS 294832 See ECN RGL To Obsolete the DS Document #: 38-07066 Rev. OBS Page 13 of 13