Revised March 2000 DM74AS574 Octal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs General Description Features These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased HIGH-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. ■ Switching specifications at 50 pF The eight flip-flops of the DM74AS574 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the logic states that were set up at the D inputs. ■ Switching specifications guaranteed over full temperature and VCC range ■ Advanced oxide-isolated, ion-implanted Schottky TTL process ■ Functionally equivalent with DM74S374 ■ Improved AC performance over DM74S374 at approximately half the power ■ 3-STATE buffer-type outputs drive bus lines directly ■ Bus structured pinout A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the internal operation of the flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are OFF. The pinout is arranged to ease printed circuit board layout. All data inputs are on one side of the package while all the outputs are on the other side. Ordering Code: Order Number Package Number DM74AS574WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Description DM74AS574N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 2000 Fairchild Semiconductor Corporation DS006314 www.fairchildsemi.com DM74AS574 Octal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs October 1986 DM74AS574 Function Table Output Logic Diagram Clock D L ↑ H L ↑ L L L L X Q0 H X X Z Control Output Q H L = LOW State H = HIGH State X = Don’t Care ↑ = Positive Edge Transition Z = High Impedance State Q0 = Previous Condition of Q www.fairchildsemi.com 2 DM74AS574 Absolute Maximum Ratings(Note 1) Supply Voltage 7V Input Voltage 7V Voltage Applied to Disabled Output 5.5V 0°C to +70°C Operating Free Air Temperature Range Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. −65°C to +150°C Storage Temperature Range Typical θJA N Package 52.0°C/W M Package 70.0°C/W Recommended Operating Conditions Symbol Parameter Min Nom Max 4.5 5 5.5 Units VCC Supply Voltage VIH HIGH Level Input Voltage V VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −15 mA IOL LOW Level Output Current fCLK Clock Frequency tWCLK Width of Clock Pulse 2 V 0 HIGH 4 LOW 6 tSU Data Setup Time (Note 2) 4↑ tH Data Hold Time (Note 2) 2↑ TA Free Air Operating Temperature 0 48 mA 80 MHz ns ns ns °C 70 Note 2: The (↑) arrow indicates the positive edge of the clock is used for reference. Electrical Characteristics over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C. Symbol Parameter Conditions VIK Input Clamp Voltage VCC = 4.5V, II = −18 mA VOH HIGH Level VCC = 4.5V, VIL = VIL Max, Output Voltage IOH = Max Min 2.4 IOH = −2 mA, VCC = 4.5V to 5.5V VOL LOW Level VCC = 4.5V, VIH = 2V, Output Voltage IOL = Max Typ Max Units −1.2 V 3.2 V VCC − 2 0.35 0.5 V 0.1 mA II Input Current @ Max Input Voltage VCC = 5.5V, VIH = 7V IIH HIGH Level Input Current VCC = 5.5V, VIH = 2.7V 20 µA IIL LOW Level Input Current VCC = 5.5V, VIL = 0.4V −0.5 mA IO (Note 3) Output Drive Current VCC = 5.5V, VO = 2.25V −112 mA IOZH OFF-State Output Current, VCC = 5.5V, VIH = 2V, HIGH Level Voltage Applied VO = 2.7V 50 µA −50 µA IOZL ICC −30 OFF-State Output Current, VCC = 5.5V, VIH = 2V, LOW Level Voltage Applied VO = 0.4V Supply Current VCC = 5.5V Outputs HIGH 73 116 Outputs Open Outputs LOW 85 134 Outputs Disabled 84 134 mA Note 3: The output conditions have been chosen to produce a current that closely approximates one half of the true short circuit output current, I OS. 3 www.fairchildsemi.com DM74AS574 Switching Characteristics over recommended operating free air temperature range Symbol Parameter Conditions fMAX Maximum Clock Frequency VCC = 4.5V to 5.5V tPLH Propagation Delay Time RL = 500Ω LOW-to-HIGH Level Output CL = 50 pF tPHL From Propagation Delay Time Output Enable Time to HIGH Level Output tPZL Output Enable Time to LOW Level Output tPHZ Output Disable Time from HIGH Level Output tPLZ Output Disable Time from LOW Level Output www.fairchildsemi.com Min Max 80 HIGH-to-LOW Level Output tPZH To 4 Units MHz Clock Any Q 3 8 ns Clock Any Q 4 9 ns Output Control Any Q 2 6 ns Output Control Any Q 3 10 ns Output Control Any Q 2 6 ns Output Control Any Q 2 6 ns DM74AS574 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com DM74AS574 Octal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6