Revised February 2000 DM74ALS273 Octal D-Type Edge-Triggered Flip-Flop with Clear General Description Features These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. ■ Switching specifications at 50 pF Information at the D inputs meeting the setup requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the HIGH or LOW level, the D input signal has no effect at the output. ■ Buffer-type outputs and improved AC offer significant advantage over DM74LS273. ■ Switching specifications guaranteed over full temperature and VCC range ■ Advanced oxide-isolated, ion-implanted Schottky TTL process ■ Functionally DM74LS273. and pin-for-pin compatible with Ordering Code: Order Number Package Number DM74ALS273WM M20B DM74ALS273SJ DM74ALS273MSA DM74ALS273N M20D Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 2000 Fairchild Semiconductor Corporation DS006216 www.fairchildsemi.com DM74ALS273 Octal D-Type Edge-Triggered Flip-Flop with Clear April 1984 DM74ALS273 Function Table Logic Diagram (Each Flip-Flop) Inputs Output Clear Clock D L X X Q L H ↑ H H H ↑ L L H L X Q0 L = LOW State H = HIGH State X = Don’t Care ↑ = Positive Edge Transition Q0 = Previous Condition of Q www.fairchildsemi.com 2 Supply Voltage 7V Input Voltage 7V 0°C to +70°C Operating Free Air Temperature Range Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. −65°C to +150°C Storage Temperature Range Typical θJA N Package 60.0°C/W M Package 79.0°C/W Recommended Operating Conditions Symbol Parameter Min Nom Max Units 4.5 5 5.5 V VCC Supply Voltage VIH HIGH Level Input Voltage VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −2.6 mA IOL LOW Level Output Current fCLK Clock Frequency tW(CLK) Width of Clock Pulse tW Width of Clear Pulse tSU Data Setup Time (Note 2) 2 V 0 24 mA 35 MHz HIGH 14 ns LOW 14 ns 10 ns LOW 10↑ Clear Inactive ns 15↑ tH Data Hold Time 0↑ TA Free Air Operating Temperature 0 ns °C 70 Note 2: The (↑) arrow indicates the positive edge of the Clock is used for reference. Electrical Characteristics over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C. Symbol Parameter Conditions Min VIK Input Clamp Voltage VCC = 4.5V, II = −18 mA VOH HIGH Level VCC = 4.5V IOH = −2.6 mA 2.4 Output Voltage VCC = 4.5V to 5.5V IOH = −400 µA VCC − 2 VOL LOW Level Output Voltage VCC = 4.5V Typ Max Units −1.5 V 3.3 V V IOL = 12 mA 0.25 0.4 IOL = 24 mA 0.35 0.5 V 0.1 mA V II Input Current @ Maximum Input Voltage VCC = 5.5V, VIH = 7V IIH HIGH Level Input Current VCC = 5.5V, VIH = 2.7V 20 µA IIL LOW Level Input Current VCC = 5.5V, VIL = 0.4V −0.2 mA IO Output Drive Current VCC = 5.5V VO = 2.25V −112 mA ICC Supply Current VCC = 5.5V Outputs HIGH 11 20 mA Outputs OPEN Outputs LOW 19 29 mA Min Max Units −30 Switching Characteristics over recommended operating free air temperature range. Symbol Parameter Conditions fMAX Maximum Clock Frequency VCC = 4.5V to 5.5V tPHL Propagation Delay Time RL = 500Ω HIGH-to-LOW Level Output CL = 50 pF tPLH To 35 Propagation Delay Time LOW-to-HIGH Level Output tPHL From Propagation Delay Time HIGH-to-LOW Level Output 3 MHz Clear Any Q 4 18 ns Clock Any Q 2 12 ns Clock Any Q 3 15 ns www.fairchildsemi.com DM74ALS273 Absolute Maximum Ratings(Note 1) DM74ALS273 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B www.fairchildsemi.com 4 DM74ALS273 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com DM74ALS273 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide Package Number MSA20 www.fairchildsemi.com 6 DM74ALS273 Octal D-Type Edge-Triggered Flip-Flop with Clear Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com