DM74LS161A/DM74LS163A Synchronous 4-Bit Binary Counters General Description These synchronous, presettable counters feature an internal carry look-ahead for application in high-speed counting designs. The LS161A and LS163A are 4-bit binary counters. The carry output is decoded by means of a NOR gate, thus preventing spikes during the normal counting mode of operation. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable inputs and internal gating. This mode of operation eliminates the output counting spikes which are normally associated with asynchronous (ripple clock) counters. A buffered clock input triggers the four flip-flops on the rising (positive-going) edge of the clock input waveform. These counters are fully programmable; that is, the outputs may be preset to either level. As presetting is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable input. The clear function for the LS161A is asynchronous; and a low level at the clear input sets all four of the flip-flop outputs low, regardless of the levels of clock, load, or enable inputs. The clear function for the LS163A is synchronous; and a low level at the clear inputs sets all four of the flip-flop outputs low after the next clock pulse, regardless of the levels of the enable inputs. This synchronous clear allows the count length to be modified easily, as decoding the maximum count desired can be accomplished with one external NAND gate. The gate output is connected to the clear input to synchronously clear the counter to all low outputs. The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are two count-enable inputs and a ripple carry output. Both count-enable inputs (P and T) must be high to count, and input T is fed forward to enable the ripple carry output. The ripple carry output thus enabled will produce a high-level output pulse with a duration approximately equal to the high-level portion of the QA output. This high-level overflow ripple carry pulse can be used to enable successive cascaded stages. High-to-low level transitions at the enable P or T inputs may occur, regardless of the logic level of the clock. These counters feature a fully independent clock circuit. Changes made to control inputs (enable P or T or load) that will modify the operating mode have no effect until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) will be dictated solely by the conditions meeting the stable set-up and hold times. Features n n n n n n n n n Synchronously programmable Internal look-ahead for fast counting Carry output for n-bit cascading Synchronous counting Load control line Diode-clamped inputs Typical propagation time, clock to Q output 14 ns Typical clock frequency 32 MHz Typical power dissipation 93 mW Connection Diagram Dual-In-Line Package DS006397-1 Order Numbers 54LS161ADMQB, 54LS161AFMQB, 54LS161ALMQB, 54LS163ADMQB, 54LS163AFMQB, 54LS163ALMQB, DM54LS161AJ, DM54LS161AW, DM54LS163AJ, DM54LS163AW, DM74LS161AM, DM74LS161AN, DM74LS163AM or DM74LS163AN See Package Number E20A, J16A, M16A, N16E or W16A © 1998 Fairchild Semiconductor Corporation DS006397 www.fairchildsemi.com DM74LS161A/DM74LS163A Synchronous 4-Bit Binary Counters March 1998 Absolute Maximum Ratings (Note 1) Supply Voltage Input Voltage Operating Free Air Temperature Range DM54LS and 54LS DM74LS Storage Temperature Range 7V 7V −55˚C to +125˚C 0˚C to +70˚C −65˚C to +150˚C Recommended Operating Conditions Symbol Parameter DM54LS161A DM74LS161A Units Min Nom Max Min Nom Max 4.5 5 5.5 4.75 5 5.25 V VCC Supply Voltage VIH High Level Input Voltage VIL Low Level Input Voltage 0.7 0.8 V IOH High Level Output Current −0.4 −0.4 mA IOL Low Level Output Current 4 8 mA fCLK Clock Frequency (Note 2) 25 MHz 20 MHz tW tSU tH tREL TA 2 2 0 25 V 0 Clock Frequency (Note 3) 0 Pulse Width Clock 20 6 20 20 0 6 (Note 2) Clear 20 9 20 9 Pulse Width Clock 25 25 (Note 3) Clear 25 25 Setup Time Data 20 8 20 8 (Note 2) Enable P 25 17 25 17 Load 25 15 25 15 Setup Time Data 20 20 (Note 3) Enable P 30 30 Load 30 30 Hold Time Data 0 −3 0 −3 (Note 2) Others 0 −3 0 −3 Hold Time Data 5 5 (Note 3) Others 5 5 Clear Release Time (Note 2) 20 20 Clear Release Time (Note 3) 25 25 Free Air Operating Temperature −55 125 ns ns ns ns ns ns ns ns 0 70 ˚C Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the “Electrical Characteristics” table are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: CL = 15 pF, RL = 2 kΩ, TA = 25˚C and VCC = 5.5V. Note 3: CL = 50 pF, RL = 2 kΩ, TA = 25˚C and VCC = 5.5V. ’LS161 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units (Note 4) VI Input Clamp Voltage VOH High Level Output Voltage VOL Low Level Output Voltage www.fairchildsemi.com VCC = Min, II = −18 mA VCC = Min, IOH = Max VIL = Max, VIH = Min VCC = Min, IOL = Max VIL = Max, VIH = Min IOL = 4 mA, VCC = Min 2 −1.5 DM54 2.5 DM74 2.7 3.4 V V 3.4 DM54 0.25 DM74 0.35 0.4 0.5 DM74 0.25 0.4 V ’LS161 Electrical Characteristics (Continued) over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units (Note 4) Input Current @ Max II Input Voltage IIH High Level Input Current VCC = Max VI = 7V VCC = Max VI = 2.7V Enable T 0.2 Clock 0.2 Load 0.2 Others 0.1 Enable T 40 Clock 40 Load 40 Others IIL Low Level Input Current VCC = Max VI = 0.4V ICCH −0.8 Clock −0.8 Load −0.8 VCC = Max DM54 −20 −100 Output Current (Note 5) VCC = Max DM74 −20 −100 Supply Current with ICCL Supply Current with (Note 6) VCC = Max Outputs Low (Note 7) mA −0.4 Short Circuit Outputs High µA 20 Enable T Others IOS mA mA 18 31 mA 19 32 mA Note 4: All typicals are at VCC = 5V, TA = 25˚C. Note 5: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 6: ICCH is measured with the load high, then again with the load low, with all other inputs high and all outputs open. Note 7: ICCL is measured with the clock input high, then again with the clock input low, with all other inputs low and all outputs open. ’LS161 Switching Characteristics at VCC = 5V and TA = 25˚C RL = 2 kΩ From (Input) Symbol Parameter CL = 15 pF To (Output) Min fMAX Maximum Clock Frequency tPLH Propagation Delay Time Low to High Level Output tPHL Propagation Delay Time High to Low Level Output tPLH Propagation Delay Time Low to High Level Output tPHL Propagation Delay Time High to Low Level Output tPLH Propagation Delay Time Low to High Level Output tPHL Propagation Delay Time High to Low Level Output tPLH tPHL tPHL 25 Clock to Units Max 20 MHz 25 30 ns Clock to 30 38 ns 22 27 ns 27 38 ns 24 30 ns 27 38 ns 14 27 ns 15 27 ns 28 45 ns Ripple Carry Clock to Any Q (Load High) Clock to Any Q (Load High) Clock to Any Q (Load Low) Clock to Any Q (Load Low) Enable T to Low to High Level Output Ripple Carry Propagation Delay Time Enable T to High to Low Level Output Ripple Carry High to Low Level Output CL = 50 pF Min Ripple Carry Propagation Delay Time Propagation Delay Time Max Clear to Any Q 3 www.fairchildsemi.com Recommended Operating Conditions Symbol Parameter DM54LS163A DM74LS163A Units Min Nom Max Min Nom Max 4.5 5 5.5 4.75 5 5.25 V VCC Supply Voltage VIH High Level Input Voltage VIL Low Level Input Voltage 0.7 0.8 V IOH High Level Output Current −0.4 −0.4 mA IOL Low Level Output Current 4 8 mA fCLK Clock Frequency (Note 8) 25 MHz 20 MHz tW tSU tH tREL TA 2 2 0 25 V 0 Clock Frequency (Note 9) 0 Pulse Width Clock 20 6 20 20 0 6 (Note 8) Clear 20 9 20 9 Pulse Width Clock 25 25 (Note 9) Clear 25 25 Setup Time Data 20 8 20 8 (Note 8) Enable P 25 17 25 17 Load 25 15 25 15 Setup Time Data 20 20 (Note 9) Enable P 30 30 Load 30 30 Hold Time Data 0 −3 0 −3 (Note 8) Others 0 −3 0 −3 Hold Time Data 5 5 (Note 9) Others 5 5 Clear Release Time (Note 8) 20 20 Clear Release Time (Note 9) 25 25 Free Air Operating Temperature −55 125 ns ns ns ns ns ns ns ns 0 70 ˚C Note 8: CL = 15 pF, RL = 2 kΩ, TA = 25˚C and VCC = 5V. Note 9: CL = 50 pF, RL = 2 kΩ, TA = 25˚C and VCC = 5V. ’LS163 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units (Note 10) VI Input Clamp Voltage VOH High Level Output Voltage VOL Low Level Output Voltage II Input Current @ Max Input Voltage IIH High Level Input Current www.fairchildsemi.com VCC = Min, II = −18 mA VCC = Min, IOH = Max VIL = Max, VIH = Min −1.5 DM54 2.5 DM74 2.7 3.4 3.4 VCC = Min, IOL = Max VIL = Max, VIH = Min IOL = 4 mA, VCC = Min VCC = Max VI = 7V Enable T 0.2 Clock, Clear 0.2 Load 0.2 Others 0.1 VCC = Max VI = 2.7V 4 V V DM54 0.25 DM74 0.35 0.4 0.5 DM74 0.25 0.4 Enable T 40 Load 40 Clock, Clear 40 Others 20 V mA µA ’LS163 Electrical Characteristics (Continued) over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units (Note 10) IIL Low Level Input Current VCC = Max VI = 0.4V Enable T −0.8 Clock, Clear −0.8 Load −0.8 Others IOS ICCH ICCL −0.4 Short Circuit VCC = Max DM54 −20 −100 Output Current (Note 11) VCC = Max DM74 −20 −100 Supply Current with Outputs High Supply Current with (Note 12) VCC = Max Outputs Low (Note 13) mA mA 18 31 mA 18 32 mA Note 10: All typicals are at VCC = 5V, TA = 25˚C. Note 11: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 12: ICCH is measured with the load high, then again with the load low, with all other inputs high and all outputs open. Note 13: ICCL is measured with the clock input high, then again with the clock input low, with all other inputs low and all outputs open. ’LS163 Switching Characteristics at VCC = 5V and TA = 25˚C RL = 2 kΩ From (Input) Symbol Parameter CL = 15 pF To (Output) Min fMAX Maximum Clock Frequency tPLH Propagation Delay Time Low to High Level Output tPHL Propagation Delay Time High to Low Level Output tPLH Propagation Delay Time Low to High Level Output tPHL Propagation Delay Time High to Low Level Output tPLH Propagation Delay Time Low to High Level Output tPHL Propagation Delay Time High to Low Level Output tPLH tPHL tPHL 25 Clock to Units Max 20 MHz 25 30 ns Clock to 30 38 ns 22 27 ns 27 38 ns 24 30 ns 27 38 ns 14 27 ns 15 27 ns 28 45 ns Ripple Carry Clock to Any Q (Load High) Clock to Any Q (Load High) Clock to Any Q (Load Low) Clock to Any Q (Load Low) Enable T to Low to High Level Output Ripple Carry Propagation Delay Time Enable T to High to Low Level Output Ripple Carry High to Low Level Output CL = 50 pF Min Ripple Carry Propagation Delay Time Propagation Delay Time Max Clear to Any Q (Note 14) Note 14: The propagation delay clear to output is measured from the clock input transition. 5 www.fairchildsemi.com Logic Diagram LS163A DS006397-2 The LS161A is similar, however, the clear buffer is connected directly to the flip flops. www.fairchildsemi.com 6 Parameter Measurement Information Switching Time Waveforms DS006397-3 Note 15: The input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, ZOUT ≈ 50Ω, tr ≤ 10 ns, tf ≤ 10 ns. Vary PRR to measure fMAX. Note 16: Outputs QD and carry are tested at tn+16 where tn is the bit time when all outputs are low. Note 17: VREF = 1.5V. Switching Time Waveforms DS006397-4 Note 18: The input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, ZOUT ≈ 50Ω, tr ≤ 6 ns, tf ≤ 6 ns. Vary PRR to measure fMAX. Note 19: Enable P and enable T setup times are measured at tn+0. Note 20: VREF = 1.3V. 7 www.fairchildsemi.com Timing Diagram LS161A, LS163A Synchronous Binary Counters Typical Clear, Preset, Count and Inhibit Sequences DS006397-5 Sequence: (1) Clear outputs to zero (2) Preset to binary twelve (3) Count to thirteen, fourteen, fifteen, zero, one, and two (4) Inhibit www.fairchildsemi.com 8 9 Physical Dimensions inches (millimeters) unless otherwise noted Ceramic Leadless Chip Carrier Package (E) Order Numbers 54LS161ALMQB or 54LS163ALMQB Package Number E20A 16-Lead Ceramic Dual-In-Line Package (J) Order Numbers 54LS161ADMQB, 54LS163ADMQB, DM54LS161AJ or DM54LS163AJ Package Number J16A www.fairchildsemi.com 10 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Molded Package (M) Order Number DM74LS161AM or DM74LS163AM Package Number M16A 16-Lead Molded Dual-In-Line Package (N) Order Numbers DM74LS161AN, DM74LS163AN Package Number N16E 11 www.fairchildsemi.com DM74LS161A/DM74LS163A Synchronous 4-Bit Binary Counters Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Ceramic Flat Package (W) Order Numbers 54LS161AFMQB, 54LS163AFMQB, DM54LS161AN or DM54LS163AW Package Number W16A LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and (c) whose device or system, or to affect its safety or effectiveness. failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. Fairchild Semiconductor Corporation Americas Customer Response Center Tel: 1-888-522-5372 www.fairchildsemi.com Fairchild Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 8 141-35-0 English Tel: +44 (0) 1 793-85-68-56 Italy Tel: +39 (0) 2 57 5631 Fairchild Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. 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