DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis General Description Features The DS25BR120 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity. The DS25BR120 features four levels of pre-emphasis (PE) for use as an optimized driver device. Other LVDS devices with similar IO characteristics include the following products. The DS25BR110 features four levels of equalization for use as an optimized receiver device, while the DS25BR100 features both pre-emphasis and equalization for use as an optimized repeater device. The DS25BR150 is a buffer/repeater with the lowest power consumption and does not feature transmit pre-emphasis nor receive equalization. Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count and further minimize board space. ■ DC - 3.125 Gbps low jitter, high noise immunity, low power operation ■ Four levels of transmit pre-emphasis drive lossy backplanes and cables ■ On-chip 100Ω input and output termination minimizes insertion and return losses, reduces component count and minimizes board space ■ 7 kV ESD on LVDS I/O pins protects adjoining components ■ Small 3 mm x 3 mm 8-LLP space saving package Applications ■ Clock and data buffering ■ Metallic cable driving ■ FR-4 driving Typical Application 30005410 © 2007 National Semiconductor Corporation 300054 www.national.com DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis November 6, 2007 DS25BR120 Block Diagram 30005402 Pin Diagram 30005405 Pin Descriptions Pin Name Pin Name Pin Type Pin Description PE1 1 Input Pre-emphasis select pin. IN+ 2 Input Non-inverting LVDS input pin. IN- 3 Input Inverting LVDS input pin. PE0 4 Input Pre-emphasis select pin. NC 5 NA "NO CONNECT" pin. OUT- 6 Output Inverting LVDS output pin. OUT+ 7 Output Non-inverting LVDS Output pin. VCC 8 Power Power supply pin. GND DAP Power Ground pad (DAP - die attach pad) Pre-Emphasis Truth Table PE1 PE0 Pre-emphasis Level 0 0 Off 0 1 Low (Approx. 3 dB at 1.56 GHz) 1 0 Medium (Approx. 6 dB at 1.56 GHz) 1 1 High (Approx. 9 dB at 1.56 GHz) Ordering Codes and Configurations NSID Function DS25BR100TSD Buffer/Repeater DS25BR110TSD Receiver Off / Low / Medium / High NA DS25BR120TSD Driver NA Off / Low / Medium / High DS25BR150TSD Buffer/Repeater NA NA www.national.com 2 Available Equalization Levels Available Pre-emphasis Levels Low / Medium Off / Medium If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) −0.3V to +4V LVCMOS Input Voltage (PE0, PE1) −0.3V to (VCC + 0.3V) LVDS Input Voltage (IN+, IN−) −0.3V to +4V LVDS Differential Input Voltage ((IN+) - (IN−)) 0V to 1.0V LVDS Output Voltage (OUT+, OUT−) −0.3V to (VCC + 0.3V) LVDS Differential Output Voltage ((OUT+) - (OUT−)) 0V to 1.0V LVDS Output Short Circuit Current 5 ms Duration Junction Temperature +150°C Storage Temperature Range −65°C to +150°C Lead Temperature Range Soldering (4 sec.) +260°C Maximum Package Power Dissipation at 25°C SDA Package 2.08W Derate SDA Package 16.7 mW/°C above +25°C θJA +60.0°C/W θJC ESD Susceptibility HBM (Note 1) +12.3°C/W ≥7 kV ≥250V ≥1250V MM (Note 2) CDM(Note 3) Note 1: Human Body Model, applicable std. JESD22-A114C Note 2: Machine Model, applicable std. JESD22-A115-A Note 3: Field Induced Charge Device Model, applicable std. JESD22-C101-C Recommended Operating Conditions Supply Voltage (VCC) Receiver Differential Input Voltage (VID) Operating Free Air Temperature (TA) Min 3.0 0 Typ 3.3 Max 3.6 1.0 Units V V −40 +25 +85 °C Electrical Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 5, 6, 7) Symbol Parameter Conditions Min Typ Max Units LVCMOS INPUT DC SPECIFICATIONS (PE0, PE1) VIH High Level Input Voltage 2.0 VCC V VIL Low Level Input Voltage GND 0.8 V IIH High Level Input Current VIN = 3.6V VCC = 3.6V 0 ±10 μA IIL Low Level Input Current VIN = GND VCC = 3.6V 0 ±10 μA VCL Input Clamp Voltage ICL = −18 mA, VCC = 0V -0.9 −1.5 V 350 450 mV 35 mV 1.375 V 35 mV LVDS OUTPUT DC SPECIFICATIONS (OUT+, OUT-) VOD Differential Output Voltage 250 ΔVOD Change in Magnitude of VOD for Complimentary Output States VOS Offset Voltage ΔVOS Change in Magnitude of VOS for Complimentary Output States RL = 100Ω IOS Output Short Circuit Current (Note 8) OUT to GND PE0 = PE1 = 0 -35 -55 mA OUT to VCC PE0 = PE1 = 0 7 55 mA RL = 100Ω -35 1.05 1.2 -35 COUT Output Capacitance Any LVDS Output Pin to GND 1.2 pF ROUT Output Termination Resistor Between OUT+ and OUT- 100 Ω 3 www.national.com DS25BR120 Package Thermal Resistance Absolute Maximum Ratings (Note 4) DS25BR120 Symbol Parameter Conditions Min Typ Max Units 1 V 0 +100 mV LVDS INPUT DC SPECIFICATIONS (IN+, IN-) VID Input Differential Voltage VTH Differential Input High Threshold 0 VTL Differential Input Low Threshold VCMR Common Mode Voltage Range VID = 100 mV IIN Input Current VIN = 3.6V or 0V VCC = 3.6V or 0V ±1 CIN Input Capacitance Any LVDS Input Pin to GND 1.7 pF RIN Input Termination Resistor Between IN+ and IN- 100 Ω PE0 = 0, PE1 = 0 35 VCM = +0.05V or VCC-0.05V −100 0 0.05 mV VCC 0.05 V ±10 μA SUPPLY CURRENT ICC Supply Current 43 mA Note 4: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. Note 5: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed. Note 6: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except VOD and ΔVOD. Note 7: Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed. Note 8: Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. www.national.com 4 (Note 11) Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 9, 10) Symbol Parameter Conditions Min Typ Max Units 350 465 ps 350 465 ps LVDS OUTPUT AC SPECIFICATIONS (OUT+, OUT-) tPHLD Differential Propagation Delay High to Low tPLHD Differential Propagation Delay Low to High tSKD1 Pulse Skew |tPLHD − tPHLD| (Note 12) 45 100 ps tSKD2 Part to Part Skew (Note 13) 45 150 ps tLHT Rise Time 80 150 ps tHLT Fall Time 80 150 ps RL = 100Ω RL = 100Ω JITTER PERFORMANCE WITH PE = OFF tRJ1A tRJ2A tDJ1A tDJ2A tTJ1A tTJ2A Random Jitter (RMS Value) No Test Channels (Note 14) VID = 350 mV VCM = 1.2V Clock (RZ) PE0 = 0, PE1 = 0 2.5 Gbps 0.5 1 ps 3.125 Gbps 0.5 1 ps Deterministic Jitter (Peak to Peak) No Test Channels (Note 15) VID = 350 mV VCM = 1.2V K28.5 (NRZ) PE0 = 0, PE1 = 0 2.5 Gbps 9 31 ps 3.125 Gbps 16 40 ps Total Jitter (Peak to Peak) No Test Channels (Note 16) VID = 350 mV VCM = 1.2V PRBS-23 (NRZ) PE0 = 0, PE1 = 0 2.5 Gbps 0.05 0.13 UIP-P 3.125 Gbps 0.09 0.16 UIP-P 5 www.national.com DS25BR120 AC Electrical Characteristics DS25BR120 Symbol Parameter Conditions Min Typ Max Units JITTER PERFORMANCE WITH PE = LOW (Figures 5 and 6) tRJ1B tRJ2B tDJ1B tDJ2B tTJ1B tTJ2B Random Jitter (RMS Value) Test Channel A (Note 14) VID = 350 mV VCM = 1.2V Clock (RZ) PE0 = 1, PE1 = 0 2.5 Gbps 0.5 1.3 ps 3.125 Gbps 0.5 1.3 ps Deterministic Jitter (Peak to Peak) Test Channel A (Note 15) VID = 350 mV VCM = 1.2V K28.5 (NRZ) PE0 = 1, PE1 = 0 2.5 Gbps 17 31 ps 3.125 Gbps 18 40 ps Total Jitter (Peak to Peak) Test Channel A (Note 16) VID = 350 mV VCM = 1.2V PRBS-23 (NRZ) PE0 = 1, PE1 = 0 2.5 Gbps 0.09 0.14 UIP-P 3.125 Gbps 0.12 0.19 UIP-P JITTER PERFORMANCE WITH PE = MEDIUM (Figures 5 and 6) tRJ1C tRJ2C tDJ1C tDJ2C tTJ1C tTJ2C Random Jitter (RMS Value) Test Channel B (Note 14) VID = 350 mV VCM = 1.2V Clock (RZ) PE0 = 0, PE1 = 1 2.5 Gbps 0.5 1.2 ps 3.125 Gbps 0.5 1.2 ps Deterministic Jitter (Peak to Peak) Test Channel B (Note 15) VID = 350 mV VCM = 1.2V K28.5 (NRZ) PE0 = 0, PE1 = 1 2.5 Gbps 21 44 ps 3.125 Gbps 27 48 ps Total Jitter (Peak to Peak) Test Channel B (Note 16) VID = 350 mV VCM = 1.2V PRBS-23 (NRZ) PE0 = 0, PE1 = 1 2.5 Gbps 0.09 0.16 UIP-P 3.125 Gbps 0.13 0.23 UIP-P JITTER PERFORMANCE WITH PE = HIGH (Figures 5 and 6) tRJ1D tRJ2D tDJ1D tDJ2D tTJ1D tTJ2D Random Jitter (RMS Value) Test Channel C (Note 14) VID = 350 mV VCM = 1.2V Clock (RZ) PE0 = 1, PE1 = 1 2.5 Gbps 0.5 1.2 ps 3.125 Gbps 0.5 1.2 ps Deterministic Jitter (Peak to Peak) Test Channel C (Note 15) VID = 350 mV VCM = 1.2V K28.5 (NRZ) PE0 = 1, PE1 = 1 2.5 Gbps 30 65 ps 3.125 Gbps 30 58 ps Total Jitter (Peak to Peak) Test Channel C (Note 16) VID = 350 mV VCM = 1.2V PRBS-23 (NRZ) PE0 = 1, PE1 = 1 2.5 Gbps 0.09 0.20 UIP-P 3.125 Gbps 0.13 0.22 UIP-P Note 9: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed. Note 10: Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed. Note 11: Specification is guaranteed by characterization and is not tested in production. Note 12: tSKD1, |tPLHD − tPHLD|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. Note 13: tSKD2, Part to Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This specification applies to devices at the same VCC and within 5°C of each other within the operating temperature range. Note 14: Measured on a clock edge with a histogram and an acummulation of 1500 histogram hits. Input stimulus jitter is subtracted geometrically. Note 15: Tested with a combination of the 1100000101 (K28.5+ character) and 0011111010 (K28.5- character) patterns. Input stimulus jitter is subtracted algebraically. Note 16: Measured on an eye diagram with a histogram and an acummulation of 3500 histogram hits. Input stimulus jitter is subtracted. www.national.com 6 DS25BR120 DC Test Circuits 30005420 FIGURE 1. Differential Driver DC Test Circuit AC Test Circuits and Timing Diagrams 30005421 FIGURE 2. Differential Driver AC Test Circuit 30005422 FIGURE 3. Propagation Delay Timing Diagram 30005423 FIGURE 4. LVDS Output Transition Times 7 www.national.com DS25BR120 Pre-Emphasis Test Circuits 30005427 FIGURE 5. Pre-emphasis Performance Test Circuit 30005428 FIGURE 6. Test Channel Description Test Channel Loss Characteristics The test channel was fabricated with Polyclad PCL-FR-370-Laminate/PCL-FRP-370 Prepreg materials (Dielectric constant of 3.7 and Loss Tangent of 0.02). The edge coupled differential striplines have the following geometries: Trace Width (W) = 5 mils, Gap (S) = 5 mils, Height (B) = 16 mils. Test Channel Length (inches) 500 MHz 750 MHz 1000 MHz Insertion Loss (dB) 1250 MHz 1500 MHz 1560 MHz A 10 -1.2 -1.7 -2.0 -2.4 -2.7 -2.8 B 20 -2.6 -3.5 -4.1 -4.8 -5.5 -5.6 C 30 -4.3 -5.7 -7.0 -8.2 -9.4 -9.7 D 15 -1.6 -2.2 -2.7 -3.2 -3.7 -3.8 E 30 -3.4 -4.5 -5.6 -6.6 -7.7 -7.9 F 60 -7.8 -10.3 -12.4 -14.5 -16.6 -17.0 www.national.com 8 INPUT INTERFACING The DS25BR120 accepts differential signals and allows simple AC or DC coupling. With a wide common mode range, the DS25BR120 can be DC-coupled with all common differential drivers (i.e. LVPECL, LVDS, CML). The following three figures illustrate typical DC-coupled interface to common differential drivers. Note that the DS25BR120 inputs are internally terminated with a 100Ω resistor. 30005411 Typical LVDS Driver DC-Coupled Interface to DS25BR120 Input 30005412 Typical CML Driver DC-Coupled Interface to DS25BR120 Input 30005413 Typical LVPECL Driver DC-Coupled Interface to DS25BR120 Input 9 www.national.com DS25BR120 Device Operation DS25BR120 OUTPUT INTERFACING The DS25BR120 outputs signals compliant to the LVDS standard. It can be DC-coupled to most common differential receivers. The following figure illustrates typical DC-coupled interface to common differential receivers and assumes that the receivers have high impedance inputs. While most differential receivers have a common mode input range that can accomodate LVDS compliant signals, it is recommended to check respective receiver's data sheet prior to implementing the suggested interface implementation. 30005414 Typical DS25BR120 Output DC-Coupled Interface to an LVDS, CML or LVPECL Receiver www.national.com 10 DS25BR120 Typical Performance 30005435 30005434 Maximum Data Rate as a Function of CAT7 (Siemon Tera) Length Maximum Data Rate as a Function of CAT5e (Belden 1700A) Length 30005437 30005436 Maximum Data Rate as a Function of CAT5e (Belden 1700A) Length DS25BR120 Used as a Driver DS25BR110 Used as a Receiver Maximum Data Rate as a Function of CAT5e (Belden 1700A) Length DS25BR120 Used as a Driver DS25BR110 Used as a Receiver 30005438 Power Supply Current as a Function of Frequency 11 www.national.com DS25BR120 30005430 30005431 A 2.5 Gbps NRZ PRBS-7 After 40" Differential FR-4 Stripline V:125 mV / DIV, H:75 ps / DIV An Equalized (with PE) 2.5 Gbps NRZ PRBS-7 After 40" Differential FR-4 Stripline V:125 mV / DIV, H:75 ps / DIV 30005432 30005433 A 3.125 Gbps NRZ PRBS-7 After 40" Differential FR-4 Stripline V:125 mV / DIV, H:50 ps / DIV www.national.com An Equalized (with PE) 3.125 Gbps NRZ PRBS-7 After 40" Differential FR-4 Stripline V:125 mV / DIV, H:50 ps / DIV 12 DS25BR120 Physical Dimensions inches (millimeters) unless otherwise noted Order Number DS25BR120TSD NS Package Number SDA08A (See AN-1187 for PCB Design and Assembly Recommendations) 13 www.national.com DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Design Support Amplifiers www.national.com/amplifiers WEBENCH www.national.com/webench Audio www.national.com/audio Analog University www.national.com/AU Clock Conditioners www.national.com/timing App Notes www.national.com/appnotes Data Converters www.national.com/adc Distributors www.national.com/contacts Displays www.national.com/displays Green Compliance www.national.com/quality/green Ethernet www.national.com/ethernet Packaging www.national.com/packaging Interface www.national.com/interface Quality and Reliability www.national.com/quality LVDS www.national.com/lvds Reference Designs www.national.com/refdesigns Power Management www.national.com/power Feedback www.national.com/feedback Switching Regulators www.national.com/switchers LDOs www.national.com/ldo LED Lighting www.national.com/led PowerWise www.national.com/powerwise Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors Wireless (PLL/VCO) www.national.com/wireless THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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