FAIRCHILD FSQ0270RNA_11

FSQ0170RNA, FSQ0270RNA
Green Mode Fairchild Power Switch (FPS™)
Features
Description
 Internal Avalanche Rugged 700V SenseFET
The FSQ0170RNA, and FSQ0270RNA, consists of an
integrated current mode Pulse Width Modulator (PWM)
and an avalanche-rugged 700V Sense FET. It is
specifically designed for high-performance off-line
Switch Mode Power Supplies (SMPS) with minimal
external components. The integrated PWM controller
features include: a fixed-frequency generating oscillator,
Under-Voltage Lockout (UVLO) protection, Leading
Edge Blanking (LEB), an optimized gate turn-on/ turn-off
driver, Thermal Shutdown (TSD) protection, and
temperature compensated precision current sources for
loop compensation and fault protection circuitry.
 Consumes only 0.8W at 230 VAC & 0.5W Load with
Burst-Mode Operation
 Precision Fixed Operating Frequency, 100kHz
 Internal Start-up Circuit and Built-in Soft-Start
 Pulse-by-Pulse Current Limiting and Auto-Restart
Mode
 Over-Voltage Protection (OVP), Overload Protection
(OLP), Internal Thermal Shutdown Function (TSD)
 Under-Voltage Lockout (UVLO)
 Low Operating Current (3mA)
 Adjustable Peak Current Limit
Applications
 Auxiliary Power Supply for PC and Server
 SMPS for VCR, SVR, STB, DVD & DVCD Player,
Printer, Facsimile & Scanner
 Adapter for Camcorder
Compared to a discrete MOSFET and controller or RCC
switching converter solution, the FSQ0170RNA, and
FSQ0270RNA reduces total component count, design
size, and weight while increasing efficiency, productivity,
and system reliability. These devices provide a basic
platform that is well suited for the design of cost-effective
flyback converters, as in PC auxiliary power supplies.
Related Application Notes
8-DIP
 AN-4134: Design Guidelines for Off-line Forward
Converters Using Fairchild Power Switch (FPS™)
 AN-4137: Design Guidelines for Off-line Flyback
Converters Using Fairchild Power Switch (FPS™)
 AN-4141: Troubleshooting and Design Tips for
Fairchild Power Switch (FPS™) Flyback Applications
 AN-4147: Design Guidelines for RCD Snubber of
Flyback
 AN-4148: Audible Noise Reduction Techniques for
FPS™ Applications
Ordering Information
Product Number
Package
Marking Code
BVDSS
fOSC
RDS(ON) (MAX.)
FSQ0170RNA
8DIP
Q0170RA
700V
100kHz
11
FSQ0270RNA
8DIP
Q0270RA
700V
100kHz
7.2
FPSTM is a trademark of Fairchild Semiconductor Corporation.
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
www.fairchildsemi.com
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
October 2011
AC
IN
DC
OUT
Vstr
IPK
Drain
PWM
VCC
FB
GND
FSQ0x70RNA Rev. 1.01
Figure 1. Typical Flyback Application
Output Power Table(1)
230VAC 15%(2)
Product
Adapter
(3)
85–265VAC
Open Frame
(4)
Adapter
(3)
Open Frame(4)
FSQ0170RNA
14W
20W
9W
13W
FSQ0270RNA
17W
24W
11W
16W
Notes:
1. The maximum output power can be limited by junction temperature.
2. 230 VAC or 100/115 VAC with doubler.
3. Typical continuous power in a non-ventilated enclosed adapter with sufficient drain pattern as a heat sink, at 50C
ambient.
4. Maximum practical continuous power in an open-frame design with sufficient drain pattern as a heat sink, at 50C
ambient.
Internal Block Diagram
VCC
Vstr
2
5
Drain
6,7,8
ICH
8V/12V
VCC good
VCC
Internal
Bias
Vref
VBURL/VBURH
VCC
OSC
IDELAY
IFB
Normal
FB 3
2.5R
PWM
R
IPK 4
S
Q
R
Q
Gate
Driver
Burst
LEB
VSD
VCC
1
S
Q
R
Q
GND
Vovp
VCC good
TSD
Soft-Start
FSQ0x70RNA Rev. 1.00
Figure 2. Internal Block Diagram
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
www.fairchildsemi.com
2
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
Application Diagram
GND
VCC
D
D
8-DIP
FB
D
IPK
Vstr
FSQ0x70RNA Rev. 1.00
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin #
Name
Description
1
GND
Ground. SenseFET source terminal on primary side and internal control
ground.
VCC
Power Supply. Positive supply voltage input. Although connected to an auxiliary transformer winding, current is supplied from pin 5 (Vstr) via an internal
switch during start-up, see Figure 2. It is not until VCC reaches the UVLO upper
threshold (12V) that the internal start-up switch opens and device power is
supplied via the auxiliary transformer winding.
FB
Feedback. The feedback voltage pin is the non-inverting input to the PWM
comparator. It has a 0.9mA current source connected internally while a capacitor and opto-coupler are typically connected externally. A feedback voltage of
6V triggers overload protection (OLP). There is a time delay while charging external capacitor CFB from 3V to 6V using an internal 5µA current source. This
time delay prevents false triggering under transient conditions, but still allows
the protection mechanism to operate under true overload conditions.
IPK
Peak Current Limit. This pin adjusts the peak current limit of the SenseFET.
The 0.9mA feedback current source is diverted to the parallel combination of
an internal 2.8k resistor and any external resistor to GND on this pin. This
determines the peak current limit. If this pin is tied to VCC or left floating, the
typical peak current limit is 0.8A (FSQ0170RNA), 0.9A (FSQ0270RNA).
5
Vstr
Start-up. This pin connects to the rectified AC line voltage source. At start-up,
the internal switch supplies internal bias and charges an external storage capacitor placed between the VCC pin and ground. Once the VCC reaches 12V,
the internal switch is opened.
6
Drain
SenseFET drain. High-voltage power SenseFET drain connection.
7
Drain
SenseFET drain. High-voltage power SenseFET drain connection.
8
Drain
SenseFET drain. High-voltage power SenseFET drain connection.
2
3
4
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
www.fairchildsemi.com
3
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
Pin Configuration
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In
addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only
Symbol
VDRAIN
VSTR
Characteristic
Value
Unit
Drain Pin Voltage
700
V
Vstr Pin Voltage
700
V
IDM
Drain Current Pulsed(5)
EAS
Single Pulsed Avalanche Energy(6)
VCC
Supply Voltage
VFB
Feedback Voltage Range
PD
Total Power Dissipation
TJ
Operating Junction Temperature
TA
TSTG
FSQ0170RNA
4
FSQ0270RNA
8
FSQ0170RNA
50
FSQ0270RNA
140
A
mJ
20
V
-0.3 to VCC
V
1.5
W
Internally limited
C
Operating Ambient Temperature
-25 to +85
C
Storage Temperature
-55 to +150
C
Notes:
5. Non-repetitive rating: Pulse width is limited by maximum junction temperature.
6. L = 51mH, starting TJ = 25C.
Thermal Impedance
TA = 25C, unless otherwise specified. All items are tested with the standards JESD 51-2 and 51-10 (DIP).
Symbol
Parameter
JA
Junction-to-Ambient Thermal
JC
Junction-to-Case Thermal Resistance(8)
JT
Junction-to-Top Thermal
Resistance(7)
Resistance(9)
Value
Unit
80
C/W
20
C/W
35
C/W
Notes:
7. Free standing with no heatsink; without copper clad.
(Measurement Condition - Just before junction temperature TJ enters into OTP.)
8. Measured on the DRAIN pin close to plastic interface.
9. Measured on the PKG top surface.
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
www.fairchildsemi.com
4
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
Absolute Maximum Ratings
TA = 25C unless otherwise specified.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Unit
(10)
SenseFET Section
IDSS
RDS(ON)
Zero-Gate-Voltage Drain Current
Drain-Source
On-State
Resistance(11)
CISS
Input Capacitance
COSS
Output Capacitance
CRSS
Reverse Transfer
Capacitance
td(on)
Turn-On Delay Time
tr
td(off)
tf
VDS = 700V, VGS = 0V
50
VDS = 560V, VGS = 0V,
TC = 125C
200
FSQ0170RNA
FSQ0270RNA
6.0
7.2
FSQ0270RNA
550
25
VGS = 0V, VDS = 25V,
f = 1MHz
10
FSQ0270RNA
17
FSQ0170RNA
12
FSQ0270RNA
20
FSQ0170RNA
4
FSQ0170RNA
15
VDS = 350V, ID = 1.0A
ns
30
FSQ0270RNA
55
FSQ0170RNA
10
FSQ0270RNA
25

pF
38
FSQ0170RNA
FSQ0270RNA
Fall Time
11
250
FSQ0270RNA
Turn-Off Delay Time
8.8
FSQ0170RNA
FSQ0170RNA
Rise Time
VGS = 10V, ID = 0.5A
A
Control Section
fOSC
Switching Frequency
92
100
108
KHz
±5
±10
%
55
60
65
%
0
0
0
%
VFB = GND
11
12
13
VFB = GND
7
8
9
VFB = GND
0.7
0.9
1.1
fOSC
Switching Frequency Variation(10)
-25C TA 85C
DMAX
Maximum Duty Cycle
Measured at 0.1 x VDS
DMIN
Minimum Duty Cycle
VSTART
VSTOP
IFB
tS/S
UVLO Threshold Voltage
Feedback Source Current
(10)
Internal Soft-Start Time
VFB = 4V
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
10
V
mA
ms
www.fairchildsemi.com
5
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
Electrical Characteristics
TA = 25C unless otherwise specified.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Unit
0.5
0.6
0.7
V
Burst-Mode Section
VBURH
VBURL
TJ 25C
Burst-Mode Voltage
VBUR(HYS)
0.3
0.4
0.5
V
100
200
300
mV
Protection Section
FSQ0170RNA
di/dt = 170mA/µs
0.70
0.80
0.90
FSQ0270RNA
di/dt = 200mA/µs
0.79
0.90
1.01
ILIM
Peak Current Limit
tCLD
Current Limit Delay Time(10)
(10)
500
ns
C
TSD
Thermal Shutdown Temperature
125
140
VSD
Shutdown Feedback Voltage
5.5
6.0
VOVP
Over-Voltage Protection
IDELAY
Shutdown Delay Current
tLEB
VFB = 4V
Leading Edge Blanking Time(10)
A
18
19
3.5
5.0
6.5
V
6.5
A
V
200
ns
Total Device Section
IOP
Operating Supply Current
(Control Part Only)
VCC = 14V
ICH
Startup Charging Current
VCC = 0V,
RSTR<100k (12)
Vstr Supply Voltage
VCC = 0V
VSTR
1
3
5
mA
0.70
0.85
1.00
mA
24
V
Notes:
10. These parameters, although guaranteed, are not 100% tested in production.
11. Pulse test: Pulse width ≤ 300µs, duty ≤ 2%.
12. RSTR is connected between the rectified AC line voltage source and VSTR pin.
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
www.fairchildsemi.com
6
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
Electrical Characteristics (Continued)
1.2
1.2
1.0
1.0
Normalized
Normalized
These characteristic graphs are normalized at TA= 25°C.
0.8
0.6
0.4
0.2
0.0
-25
0.8
0.6
0.4
0.2
0
25
50
75
100
125
0.0
-25
150
0
Temperature [°C]
1.0
1.0
Normalized
Normalized
1.2
0.8
0.6
0.4
0.2
100
125
150
0.8
0.6
0.4
0.2
0
25
50
75
100
125
0.0
-25
150
0
Temperature [°C]
25
50
75
100
125
150
Temperature [°C]
Figure 6. Maximum Duty Cycle (DMAX) vs. TA
Figure 7. Operating Supply Current (IOP) vs. TA
1.2
1.2
1.0
1.0
Normalized
Normalized
75
Figure 5. Over-Voltage Protection (VOVP) vs. TA
1.2
0.8
0.6
0.4
0.8
0.6
0.4
0.2
0.2
0.0
-25
50
Temperature [°C]
Figure 4. Operating Frequency (fOSC) vs. TA
0.0
-25
25
0
25
50
75
100
125
0.0
-25
150
Figure 8. Start Threshold Voltage (VSTART) vs. TA
25
50
75
100
125
150
Figure 9. Stop Threshold Voltage (VSTOP) vs. TA
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
0
Temperature [°C]
Temperature [°C]
www.fairchildsemi.com
7
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
Typical Performance Characteristics (Control Part)
1.2
1.2
1.0
1.0
Normalized
Normalized
These characteristic graphs are normalized at TA= 25°C.
0.8
0.6
0.4
0.2
0.0
-25
0.8
0.6
0.4
0.2
0
25
50
75
100
125
0.0
-25
150
Temperature [°C]
0
25
50
75
100
125
150
Temperature [°C]
Figure 10. Feedback Source Current (IFB) vs. TA
Figure 11. Startup Charging Current (ICH) vs. TA
1.2
Normalized
1.0
0.8
0.6
0.4
0.2
0.0
-25
0
25
50
75
100
125
150
Temperature [°C]
Figure 12. Peak Current Limit (ILIM) vs. TA
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
www.fairchildsemi.com
8
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
Typical Performance Characteristics (Continued)
4. Protection Circuits: The FPS has several protective
functions, such as Overload Protection (OLP), OverVoltage Protection (OVP), Under-Voltage Lockout
(UVLO), and Thermal Shutdown (TSD). Because these
protection circuits are fully integrated in the IC without
external components, reliability is improved without
increasing cost. Once a fault condition occurs, switching
is terminated and the SenseFET remains off. This
causes VCC to fall. When VCC reaches the UVLO stop
voltage, VSTOP (typically 8V), the protection is reset and
the internal high-voltage current source charges the VCC
capacitor via the Vstr pin. When VCC reaches the UVLO
start voltage, VSTART (typically 12V), the FPS resumes
its normal operation. In this manner, the auto-restart can
alternately enable and disable the switching of the power
SenseFET until the fault condition is eliminated.
1. Startup: In previous generations of Fairchild Power
Switches (FPS™), the Vstr pin required an external
resistor to the DC input voltage line. In this generation,
the startup resistor is replaced by an internal highvoltage current source and a switch that shuts off 10ms
after the supply voltage, VCC, goes above 12V. The
source turns back on if VCC drops below 8V.
VIN,dc
ISTR
Vstr
Vcc<8V
UVLO on
Vcc
J-FET
ICH
10ms after
Vcc≥12V
UVLO off
4.1 Overload Protection (OLP): Overload is defined as
the load current exceeding a pre-set level due to an
unexpected event. In this situation, the protection circuit
should be activated to protect the SMPS. However, even
when the SMPS is operating normally, the OLP circuit
can be activated during the load transition. To avoid this
undesired operation, the OLP circuit is designed to be
activated after a specified time to determine whether it is
a transient situation or a true overload situation. In
conjunction with the IPK current limit pin (if used), the
current mode feedback path limits the current in the
SenseFET when the maximum PWM duty cycle is
attained. If the output consumes more than this
maximum power, the output voltage (VO) decreases
below nominal voltage. This reduces the current through
the opto-coupler LED, which also reduces the optocoupler transistor current, thus increasing the feedback
voltage (VFB). If VFB exceeds 3V, the feedback input
diode is blocked and the 5µA current source (IDELAY)
starts to slowly charge CFB up to VCC. In this condition,
VFB increases until it reaches 6V, when the switching
operation is terminated, as shown in Figure 15. The
shutdown delay time is the time required to charge CFB
from 3V to 6V with 5µA current source.
FSQ0x70RNA Rev. 1.00
Figure 13. High-Voltage Current Source
2. Feedback Control: The 700V FPS series employs
current-mode control, as shown in Figure 14. An optocoupler (such as the H11A817A) and shunt regulator
(such as the KA431) are typically used to implement the
feedback network. Comparing the feedback voltage with
the voltage across the Rsense resistor of SenseFET, plus
an offset voltage, makes it possible to control the
switching duty cycle. When the shunt regulator reference
pin voltage exceeds the internal reference voltage of
2.5V, the opto-coupler LED current increases, the
feedback voltage VFB is pulled down and thereby
reduces the duty cycle. This typically happens when the
input voltage increases or the output load decreases.
VCC
VCC
5A
900A
FB
VO
3
CFB
OSC
+
D1
VFB
D2
2.5R
VFB,in
Gate
driver
R
431
VFB
FSQ0x70RNA Rev.00
Overload Protection
OLP
FSQ0x70RNA Rev. 1.00
6V
VSD
Figure 14. Pulse Width Modulation Circuit
3V
3. Leading Edge Blanking (LEB): When the internal
SenseFET is turned on, the primary-side capacitance
and secondary-side rectifier diode reverse recovery
typically cause a high-current spike through the
SenseFET. Excessive voltage across the Rsense resistor
leads to incorrect feedback operation in the currentmode PWM control. To counter this effect, the FPS
employs a Leading Edge Blanking (LEB) circuit. This
circuit inhibits the PWM comparator for a short time
(tLEB) after the Sense FET is turned on.
t12= CFB×(V(t2)-V(t1)) / IDELAY
t1
t12  CFB
t2
t
IDELAY  5  A, V ( t1 )  3V , V ( t 2 )  6V
Figure 15. Overload Protection (OLP)
4.2 Thermal Shutdown (TSD): The SenseFET and the
control IC are integrated, making it easier for the control
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
V ( t 2 )  V (t1 )
;
IDELAY
www.fairchildsemi.com
9
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
Functional Description
At this point, switching stops and the output voltage
starts to drop at a rate dependent on the standby current
load. This causes the feedback voltage to rise. Once it
passes VBURH, switching resumes. The feedback
voltage then falls and the process is repeated. Burstmode operation alternately enables and disables
switching of the SenseFET and reduces switching loss in
standby mode.
4.3 Over-Voltage Protection (OVP): In the event of a
malfunction in the secondary-side feedback circuit, or an
open feedback loop caused by a soldering defect, the
current through the opto-coupler transistor becomes
almost zero (see Figure 14). VFB climbs up in a similar
manner to the overload situation, forcing the preset
maximum current to be supplied to the SMPS until the
overload protection is activated. Because excess energy
is provided to the output, the output voltage may exceed
the rated voltage before the overload protection is
activated, resulting in the breakdown of the devices in
the secondary side. To prevent this situation, an OverVoltage Protection (OVP) circuit is employed. In general,
VCC is proportional to the output voltage and the FPS
uses VCC instead of directly monitoring the output
voltage. If VCC exceeds 19V, the OVP circuit is activated,
resulting in termination of the switching operation. To
avoid undesired activation of OVP during normal
operation, VCC should be designed to be below 19V.
Burst Operation
Burst Operation
Normal
Operation
VFB
VBURH
VBURL
Current
Waveform
Switching
OFF
FSQ0x70RNA Rev.00
Switching OFF
Figure 17. Burst Operation Function
7. Adjusting Peak Current Limit: As shown in Figure
18, a combined 2.8k internal resistance is connected to
the non-inverting lead on the PWM comparator. An
external resistance of Rx on the current limit pin forms a
parallel resistance with the 2.8k when the internal
diodes are biased by the main current source of 900µA.
5. Soft-Start: The FPS has an internal soft-start circuit
that slowly increases the SenseFET current after startup, as shown in Figure 16. The typical soft-start time is
10ms, where progressive increments of the SenseFET
current are allowed during the start-up phase. The pulse
width to the power switching device is progressively
increased to establish the correct working conditions for
transformers, inductors, and capacitors. The voltage on
the output capacitors is progressively increased to
smoothly establish the required output voltage. This also
helps prevent transformer saturation and reduces the
stress on the secondary diode during startup.
V CC
V CC
5A
IDELAY
V FB
900 A
IFB
2kΩ
PWM
Comparator
3
0.8kΩ
#6,7,8
5V
IPK
4
DRAIN
SenseFET
Current
Sense
Rx
FSQ0x70RNA Rev. 1.00
#1
Figure 18. Peak Current Limit Adjustment
GND
ILIM
Rsense
For example, FSQ0270RNA has a typical SenseFET
peak current limit (ILIM) of 0.9A. ILIM can be adjusted to
0.6A by inserting Rx between the IPK pin and the ground.
The value of the Rx can be estimated by the following
equations:
FSQ0x70RNA Rev. 1.00
Figure 16. Soft-Start Function
0.9A: 0.6A = 2.8k : Xk,
6. Burst Operation: To minimize power dissipation in
standby mode, the FPS enters burst-mode operation.
Feedback voltage decreases as the load decreases, as
shown in Figure 17, and the device automatically enters
burst-mode when the feedback voltage drops below
VBURH (typically 600mV). Switching continues until the
feedback voltage drops below VBURL (typically 400mV).
X = Rx || 2.8k
where X represents the resistance of the parallel network.
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
www.fairchildsemi.com
10
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
IC to detect the temperature of the SenseFET. When the
temperature exceeds approximately 140C, thermal
shutdown is activated.
Methods of Reducing Audible Noise
Switching-mode power converters have electronic and
magnetic components, which generate audible noise
when the operating frequency is in the range of
20~20,000Hz. Even though they operate above 20KHz,
they can make noise, depending on the load condition.
The following sections discuss methods to reduce noise.
Glue or Varnish
The most common method of reducing noise involves
using glue or varnish to tighten magnetic components.
The motion of core, bobbin, and coil and the chattering
or magnetostriction of core can cause the transformer to
produce audible noise. The use of rigid glue and varnish
helps reduce the transformer noise. Glue or varnish can
also can crack the core because sudden changes in the
ambient temperature cause the core and the glue to
expand or shrink in a different ratio.
Figure 19. Equal Loudness Curves
Ceramic Capacitor
Using a film capacitor instead of a ceramic capacitor as a
snubber capacitor is another noise reduction solution.
Some dielectric materials show a piezoelectric effect,
depending on the electric field intensity. Hence, a
snubber capacitor becomes one of the most significant
sources of audible noise. Another possibility is to use a
Zener clamp circuit instead of an RCD snubber for
higher efficiency as well as lower audible noise.
Adjusting Sound Frequency
Moving the fundamental frequency of noise out of the
2~4kHz range is the third method. Generally, humans
are more sensitive to noise in the range of 2~4kHz.
When the fundamental frequency of noise is located in
this range, the noise sounds louder although the noise
intensity level is identical (see Figure 19).
Figure 20. Typical Feedback Network of FPS
Other Reference Materials
AN-4134: Design Guidelines for Off-line Forward
Converters Using Fairchild Power Switch (FPS™)
When the FPS acts in burst mode and the burst
operation is suspected to be a source of noise, this
method may be helpful. If the frequency of burst mode
operation lies in the range of 2~4kHz, adjusting the
feedback loop can shift the burst operation frequency. To
reduce the burst operation frequency, increase a
feedback gain capacitor (CF), opto-coupler supply
resistor (RD); and feedback capacitor (CB), and decrease
a feedback gain resistor (RF), as shown in Figure 20.
AN-4137: Design Guidelines for Off-line Flyback
Converters Using Fairchild Power Switch (FPS™)
AN-4140: Transformer Design Consideration for Off-line
Flyback Converters using Fairchild Power Switch (FPS™)
AN-4141: Troubleshooting and Design Tips for Fairchild
Power Switch (FPS™) Flyback Applications
AN-4147: Design Guidelines for RCD Snubber of
Flyback
AN-4148: Audible Noise Reduction Techniques for
FPS™ Applications
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
www.fairchildsemi.com
11
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
Application Information
Application
Output power
Input Voltage
Output Voltage (Max. Current)
PC Auxiliary Power Supply
(Using FSQ0270RNA)
15W
Universal input
(85-265 VAC)
5V (3A)
Features
 High efficiency (> 78% at 115 VAC and 230 VAC input)
 Low standby mode power consumption (< 0.8W at 230 VAC input and 0.5W load)
 Enhanced system reliability through various protection functions
 Internal soft-start (10ms)
 Line UVLO function can be achieved using external component
Key Design Notes
 The delay time for overload protection is designed to be about 30ms with C8 of 47nF. If faster/slower triggering of
OLP is required, C8 can be changed to a smaller/larger value (e.g. 100nF for about 60ms).
 ZP1, DL1, RL1, RL2, RL3, RL4, RL5, RL7, QL1, QL2, and CL9 build a Line Under-Voltage Lockout block (UVLO).
The Zener voltage of ZP1 determines the input voltage that makes FPS turn on. RL5 and DL1 provide a reference
voltage from VCC. If the input voltage divided by RL1, RL2, and RL4 is lower than the Zener voltage of DL1, QL1 and
QL2 turn on and pull down VFB to ground.
 An evaluation board and corresponding test report can be provided.
1. Schematic
C1
2.2nF
AC250V
L1
330H
R6
CON1
2.4 1W
1
2
3
Input
D2
D3
1N4007 1N4007
C10
1nF
250V
ZP1
1N4762
R2
4.7k
C2
22F
400V
D4
ZDS1
P6KE180A
R8
open
D5
C3
22F
400V
L3
0
QL1
KSP2907A
RL5
30k
8 7 6 5
U3
FSQ0270RNA
J3
open
ZR1
1 2 3 4
4
CL9
10F
50V
RL7
40k
R4
100
1
C4
1000F
16V
C9
1000F
16V
5
R5
1.25k
1%
U1A
FOD817A
2
3
U2
TL431A
2
Output
J4
0
C6
47nF
1
2
R9
10k
C5
470F
10V
R11
1.2k
1%
C7
47F
25V
R12
open
J2
0
RL3
1k
R3
560
9, 10
R14
30
D6
R10
1N4007 2
CON2
1
D1
SB540
4
80
RL4
120k
L2
1H
GND Drain
VCC Drain
FB Drain
Vstr
IPK
DL1
1N5233B
3
CS1
1.5nF
J1
FB
RL1 1M
RL2
1M
T1
EE2229
1
6,7
DS1
1N4007
1N4007 1N4007
RS1
9
3
ZD1
1N4745
ZD2 C8
open 47nF
U1B
QL2
KSP2222A FOD817A
FSQ0x70RNA Rev. 1.12
R13
open
Figure 21. Demo Circuit
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
www.fairchildsemi.com
12
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
Typical Application Circuit
EE2229
1
Np/2
9, 10
2
Np/2 3
Na
6, 7 N
5V
4
5
FSQ0x70RNA Rev. 1.00
Figure 22. Transformer Schematic Diagram
3. Winding Specification
Np/2
Pin (S F)
Wire
Turns
Winding Method
3 2
0.31
72
Solenoid winding
0.252
22
Solenoid winding
0.652
8
Solenoid winding
0.31
72
Solenoid winding
Insulation: Polyester Tape t = 0.025mm, 1 Layers
4 5
Na
Insulation: Polyester Tape t = 0.025mm, 2 Layers
6, 7 9, 10
N5V
Insulation: Polyester Tape t = 0.025mm, 2 Layers
2 1
Np/2
Insulation: Polyester Tape t = 0.025mm, 2 Layers
4. Electrical Characteristics
Pin
Specification
Remark
Inductance
1–3
1.20mH ± 5%
100kHz, 1V
Leakage
1–3
< 30µH Max
Short all other pins
5. Core & Bobbin
 Core: EE2229 (Material: PL-7, Ae = 35.7 mm2)
 Bobbin: BE2229
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
www.fairchildsemi.com
13
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
2. Transformer
Part Number
Value
Quantity
Description (Manufacturer)
C6, C8
47nF
2
Ceramic Capacitor
C1
2.2nF (1KV)
1
AC Ceramic Capacitor(X1 & Y1)
C10
1nF (200V)
1
Mylar Capacitor
CS1
1.5nF (50V)
1
Ceramic Capacitor
C2, C3
22µF (400V)
2
Low Impedance Electrolytic Capacitor KMX series
C4, C9
1000µF (16V)
2
Low ESR Electrolytic Capacitor NXC series
C5
470µF (10V)
1
Low ESR Electrolytic Capacitor NXC series
C7
47µF (25V)
1
General Electrolytic Capacitor
CL9
10µF (50V)
1
General Electrolytic Capacitor
L1
330µH
1
Inductor
L2
1µH
1
Inductor
R6
2.4 (1W)
1
Fusible Resistor
J1, J2, J4, L3
0
4
Jumper
R2
4.7k
1
Resistor
R3
560
1
Resistor
R4
100
1
Resistor
R5
1.25k
1
Resistor
R11
1.2k
1
Resistor
R9
10k
1
Resistor
R10
2
1
Resistor
R14
30
1
Resistor
RL3
1k
1
Resistor
RL1, RL2
1M
2
Resistor
RL4
120k
1
Resistor
RL5
30k
1
Resistor
RL7
40k
1
Resistor
RS1
9
1
Resistor
ZR1
80
1
Resistor
U1
FOD817A
1
IC (Fairchild Semiconductor)
U2
TL431
1
IC (Fairchild Semiconductor)
U3
FSQ0270RNA
1
IC (Fairchild Semiconductor)
QL1
2N2907
1
IC (Fairchild Semiconductor)
QL2
2N2222
1
IC (Fairchild Semiconductor)
D2, D3, D4, D5, D6, DS1
1N4007
6
Diode (Fairchild Semiconductor)
D1
SB540
1
Schottky Diode (Fairchild Semiconductor)
ZD1
1N4745
1
Zener Diode (Fairchild Semiconductor)
DL1
1N5233
1
Zener Diode (Fairchild Semiconductor)
ZP1
82V (1W)
1
Zener Diode (Fairchild Semiconductor)
ZDS1
P6KE180A
1
TVS (Fairchild Semiconductor)
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
www.fairchildsemi.com
14
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
6. Demo Circuit Part List
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
7. Layout
Figure 23. Top Image of PCB
Figure 24. Bottom Image of PCB
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
www.fairchildsemi.com
15
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
Package Dimensions
[
.400 10.15
.373 9.46
A
]
.036 [0.9 TYP]
(.092) [Ø2.337]
(.032) [R0.813]
PIN #1
.250±.005 [6.35±0.13]
PIN #1
B
TOP VIEW
OPTION 1
TOP VIEW
OPTION 2
[ ]
.070 1.78
.045 1.14
.310±.010 [7.87±0.25]
.130±.005 [3.3±0.13]
.210 MAX
[5.33]
7° TYP
7° TYP
C
.015 MIN
[0.38]
.140 3.55
.125 3.17
[ ]
.021 0.53
.015 0.37
.001[.025]
C
.300
[7.62]
[ ]
.100
[2.54]
.430 MAX
[10.92]
.060 MAX
[1.52]
NOTES:
A. CONFORMS TO JEDEC REGISTRATION MS-001,
VARIATIONS BA
B. CONTROLING DIMENSIONS ARE IN INCHES
REFERENCE DIMENSIONS ARE IN MILLIMETERS
C. DOES NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED
.010 INCHES OR 0.25MM.
D. DOES NOT INCLUDE DAMBAR PROTRUSIONS.
DAMBAR PROTRUSIONS SHALL NOT EXCEED
.010 INCHES OR 0.25MM.
E. DIMENSIONING AND TOLERANCING
PER ASME Y14.5M-1994.
[
+0.127
.010+.005
-.000 0.254-0.000
]
N08EREVG
Figure 25. 8-Lead Dual In-Line Package (DIP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in
any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor
representative to verify or obtain the most recent revision. Package specifications do not expand the terms of
Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
www.fairchildsemi.com
16
FSQ0170RNA, FSQ0270RNA — Green Mode Fairchild Power Switch (FPS™)
© 2006 Fairchild Semiconductor Corporation
FSQ0170RNA, FSQ0270RNA Rev. 1.0.5
www.fairchildsemi.com
17