INTERSIL FSS913A0D3

FSS913A0D, FSS913A0R
Data Sheet
10A, -100V, 0.280 Ohm, Radiation
Hardened, SEGR Resistant, P-Channel
Power MOSFETs
The Discrete Products Operation of Intersil has developed a
series of Radiation Hardened MOSFETs specifically
designed for commercial and military space applications.
Enhanced Power MOSFET immunity to Single Event Effects
(SEE), Single Event Gate Rupture (SEGR) in particular, is
combined with 100K RADS of total dose hardness to provide
devices which are ideally suited to harsh space
environments. The dose rate and neutron tolerance
necessary for military applications have not been sacrificed.
The Intersil portfolio of SEGR resistant radiation hardened
MOSFETs includes N-Channel and P-Channel devices in a
variety of voltage, current and on-resistance ratings.
Numerous packaging options are also available.
This MOSFET is an enhancement-mode silicon-gate power
field-effect transistor of the vertical DMOS (VDMOS)
structure. It is specially designed and processed to be
radiation tolerant. The MOSFET is well suited for
applications exposed to radiation environments such as
switching regulation, switching converters, motor drives,
relay drivers and drivers for high-power bipolar switching
transistors requiring high speed and low gate drive power.
This type can be operated directly from integrated circuits.
June 1999
File Number
4451.3
Features
• 10A, -100V, rDS(ON) = 0.280Ω
• Total Dose
- Meets Pre-RAD Specifications to 100K RAD (Si)
• Single Event
- Safe Operating Area Curve for Single Event Effects
- SEE Immunity for LET of 36MeV/mg/cm2 with VDS up
to 80% of Rated Breakdown and VGS of 10V Off-Bias
• Dose Rate
- Typically Survives 3E9 RAD (Si)/s at 80% BVDSS
- Typically Survives 2E12 if Current Limited to IDM
• Photo Current
- 1.5nA Per-RAD(Si)/s Typically
• Neutron
- Maintain Pre-RAD Specifications for 3E13 Neutrons/cm2
- Usable to 3E14 Neutrons/cm2
Symbol
D
G
Reliability screening is available as either commercial, TXV
equivalent of MIL-S-19500, or Space equivalent of
MIL-S-19500. Contact Intersil for any desired deviations
from the data sheet.
Ordering Information
RAD LEVEL
SCREENING LEVEL
Package
PART NUMBER/BRAND
10K
Commercial
FSS913A0D1
10K
TXV
FSS913A0D3
100K
Commercial
FSS913A0R1
100K
TXV
FSS913A0R3
100K
Space
FSS913A0R4
Formerly available as type TA17796.
4-1
S
TO-257AA
S
D
G
CAUTION: Beryllia Warning per MIL-S-19500
refer to package specifications.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
FSS913A0D, FSS913A0R
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS
Drain to Gate Voltage (RGS = 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current
TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS
Maximum Power Dissipation
TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulsed Avalanche Current, L = 100µH, (See Test Figure) . . . . . . . . . . . . . . . . . . . . . . . . . . IAS
Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS
Pulsed Source Current (Body Diode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
(Distance >0.063in (1.6mm) from Case, 10s Max)
FSS913A0D, FSS913A0R
-100
-100
UNITS
V
V
10
6
30
±20
A
A
A
V
56
22
0.45
30
10
30
-55 to 150
300
W
W
W/ oC
A
A
A
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
Drain to Source Breakdown Voltage
Gate Threshold Voltage
BVDSS
VGS(TH)
TEST CONDITIONS
ID = 1mA, VGS = 0V
VGS = VDS ,
ID = 1mA
Zero Gate Voltage Drain Current
IDSS
VDS = -80V,
VGS = 0V
Gate to Source Leakage Current
IGSS
VGS = ±20V
Drain to Source On-State Voltage
VDS(ON)
Drain to Source On Resistance
Turn-On Delay Time
rDS(ON)12
td(ON)
Rise Time
tr
Turn-Off Delay Time
td(OFF)
Fall Time
TC = -55oC
TC = 25oC
TC = 125oC
TC = 25oC
TC = 125oC
TC = 25oC
TC = 125oC
VGS = -12V, ID = 10A
ID = 6A,
VGS = -12V
TC = 25oC
TC = 125oC
VDD = -50V, ID = 10A,
RL = 5.0Ω, VGS = -12V,
RGS = 7.5Ω
tf
Total Gate Charge
Qg(TOT)
VGS = 0V to -20V
Gate Charge at 12V
Qg(12)
VGS = 0V to -12V
Threshold Gate Charge
Qg(TH)
VGS = 0V to -2V
Gate Charge Source
VDD = -50V,
ID = 10A
Qgs
Gate Charge Drain
Qgd
Plateau Voltage
V(PLATEAU)
MIN
TYP
MAX
UNITS
-100
-
-
V
-
-
-7.0
V
-2.0
-
-6.0
V
-1.0
-
-
V
-
-
25
µA
-
-
250
µA
-
-
100
nA
-
-
200
nA
-
-
-3.36
V
-
0.190
0.280
Ω
-
-
0.500
Ω
-
-
20
ns
-
-
55
ns
-
-
45
ns
-
-
35
ns
-
-
60
nC
-
36
40
nC
-
-
2.5
nC
-
6.6
7.4
nC
-
17
19
nC
ID = 10A, VDS = -15V
-
-7
-
V
VDS = -25V, VGS = 0V, f = 1MHz
Input Capacitance
CISS
-
940
-
pF
Output Capacitance
COSS
-
320
-
pF
Reverse Transfer Capacitance
CRSS
-
100
-
pF
Thermal Resistance Junction to Case
RθJC
RθJA
-
-
2.2
oC/W
-
-
60
oC/W
Thermal Resistance Junction to Ambient
4-2
FSS913A0D, FSS913A0R
Source to Drain Diode Specifications
PARAMETER
SYMBOL
Forward Voltage
TEST CONDITIONS
VSD
Reverse Recovery Time
ISD = 10A
trr
TYP
MAX
-0.6
-
-1.8
V
-
-
160
ns
ISD = 10A, dISD/dt = 100A/µs
Electrical Specifications up to 100K RAD
UNITS
TC = 25oC, Unless Otherwise Specified
PARAMETER
Drain to Source Breakdown Volts
MIN
MIN
MAX
UNITS
(Note 3)
SYMBOL
BVDSS
VGS = 0, ID = 1mA
TEST CONDITIONS
-100
-
V
VGS(TH)
VGS = VDS, ID = 1mA
-2.0
-6.0
V
IGSS
VGS = ±20V, VDS = 0V
-
100
nA
Gate to Source Threshold Volts
(Note 3)
Gate to Body Leakage
(Notes 2, 3)
Zero Gate Leakage
(Note 3)
IDSS
VGS = 0, VDS = -80V
-
25
µA
Drain to Source On-State Volts
(Notes 1, 3)
VDS(ON)
VGS = -12V, ID = 10A
-
-3.36
V
Drain to Source On Resistance
(Notes 1, 3)
rDS(ON)12
VGS = -12V, ID = 6A
-
0.280
Ω
NOTES:
1. Pulse test, 300µs Max.
2. Absolute value.
3. Insitu Gamma bias must be sampled for both VGS = -12V, VDS = 0V and VGS = 0V, VDS = 80% BVDSS .
Single Event Effects (SEB, SEGR) (Note 4)
ENVIRONMENT (NOTE 5)
TYPICAL LET
(MeV/mg/cm)
TYPICAL
RANGE (µ)
APPLIED
VGS BIAS
(V)
(NOTE 6)
MAXIMUM
VDS BIAS (V)
TEST
SYMBOL
ION
SPECIES
Single Event Effects Safe Operating Area
SEESOA
Ni
26
43
20
-100
Br
37
36
10
-100
Br
37
36
15
-80
Br
37
36
20
-50
NOTES:
4. Testing conducted at Brookhaven National Labs; sponsored by Naval Surface Warfare Center (NSWC), Crane, IN.
5. Fluence = 1E5 ions/cm2 (typical), T = 25oC.
6. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR).
Typical Performance Curves
Unless Otherwise Specified
1E-3
LET = 26MeV/mg/cm2, RANGE = 43µ
LET = 37MeV/mg/cm2, RANGE = 36µ
-120
LIMITING INDUCTANCE (HENRY)
FLUENCE = 1E5 IONS/cm2 (TYPICAL)
-100
VDS (V)
-80
-60
-40
-20
TEMP = 25oC
0
0
5
10
15
20
25
VGS (V)
FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA
4-3
1E-4
ILM = 10A
30A
1E-5
100A
300A
1E-6
1E-7
-10
-30
-100
-300
DRAIN SUPPLY (V)
FIGURE 2. DRAIN INDUCTANCE REQUIRED TO LIMIT
GAMMA DOT CURRENT TO IAS
-1000
FSS913A0D, FSS913A0R
Typical Performance Curves
Unless Otherwise Specified
(Continued)
100
12
TC = 25oC
ID , DRAIN CURRENT (A)
ID , DRAIN (A)
10
8
6
4
100µs
10
1ms
10ms
1
100ms
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
2
0.1
0
-50
0
50
100
150
-1
TC , CASE TEMPERATURE (oC)
-10
-100
-300
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
2.5
PULSE DURATION = 250ms, VGS = -12V, ID = 6A
NORMALIZED rDS(ON)
2.0
QG
-12V
QGS
QGD
VG
1.5
1.0
0.5
0.0
-80
CHARGE
-40
0
40
80
120
160
TJ , JUNCTION TEMPERATURE (oC)
NORMALIZED THERMAL RESPONSE (ZθJC)
FIGURE 5. BASIC GATE CHARGE WAVEFORM
FIGURE 6. NORMALIZED rDS(ON) vs JUNCTION TEMPERATURE
101
100
0.5
0.2
10-1
0.1
0.05
0.02
0.01
SINGLE PULSE
10-2
PDM
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
10-3 -5
10
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (s)
FIGURE 7. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE
4-4
100
t1
t2
101
FSS913A0D, FSS913A0R
Typical Performance Curves
Unless Otherwise Specified
(Continued)
IAS , AVALANCHE CURRENT (A)
40
STARTING TJ = 25oC
10
STARTING TJ = 150oC
IF R = 0
tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD)
IF R ≠ 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
1
0.01
0.1
1
tAV, TIME IN AVALANCHE (ms)
10
FIGURE 8. UNCLAMPED INDUCTIVE SWITCHING
Test Circuits and Waveforms
ELECTRONIC SWITCH OPENS
WHEN IAS IS REACHED
VDS
L
BVDSS
+
CURRENT I
TRANSFORMER AS
tP
-
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDS
IAS
VDD
+
50Ω
-
tP
VDD
50V-150V
DUT
50Ω
VGS ≤ 20V
tAV
FIGURE 9. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 10. UNCLAMPED ENERGY WAVEFORMS
tON
VDD
tOFF
td(ON)
td(OFF)
tr
RL
VDS
tf
90%
90%
VDS
0V
10%
DUT
10%
90%
VGS = -12V
RGS
50%
VGS
50%
PULSE WIDTH
10%
FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT
4-5
FIGURE 12. RESISTIVE SWITCHING WAVEFORMS
FSS913A0D, FSS913A0R
Screening Information
Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table).
Delta Tests and Limits (JANTXV Equivalent, JANS Equivalent) TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MAX
UNITS
Gate to Source Leakage Current
IGSS
VGS = ±20V
±20 (Note 7)
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 80% Rated Value
±25 (Note 7)
µA
Drain to Source On Resistance
rDS(ON)
TC = 25oC at Rated ID
±20% (Note 8)
Ω
Gate Threshold Voltage
VGS(TH)
ID = 1.0mA
±20% (Note 8)
V
NOTES:
7. Or 100% of Initial Reading (whichever is greater).
8. Of Initial Reading.
Screening Information
TEST
JANTXV EQUIVALENT
JANS EQUIVALENT
Gate Stress
VGS = -30V, t = 250µs
VGS = -30V, t = 250µs
Pind
Optional
Required
Pre Burn-In Tests (Note 9)
MIL-S-19500 Group A,
Subgroup 2 (All Static Tests at 25oC)
MIL-S-19500 Group A,
Subgroup 2 (All Static Tests at 25oC)
Steady State Gate
Bias (Gate Stress)
MIL-STD-750, Method 1042, Condition B
VGS = 80% of Rated Value,
TA = 150oC, Time = 48 hours
MIL-STD-750, Method 1042, Condition B
VGS = 80% of Rated Value,
TA = 150oC, Time = 48 hours
Interim Electrical Tests (Note 9)
All Delta Parameters Listed in the Delta Tests
and Limits Table
All Delta Parameters Listed in the Delta Tests
and Limits Table
Steady State Reverse
Bias (Drain Stress)
MIL-STD-750, Method 1042, Condition A
VDS = 80% of Rated Value,
TA = 150oC, Time = 160 hours
MIL-STD-750, Method 1042, Condition A
VDS = 80% of Rated Value,
TA = 150oC, Time = 240 hours
PDA
10%
5%
Final Electrical Tests (Note 9)
MIL-S-19500, Group A, Subgroup 2
MIL-S-19500, Group A,
Subgroups 2 and 3
NOTE:
9. Test limits are identical pre and post burn-in.
Additional Screening Tests
PARAMETER
SYMBOL
Safe Operating Area
SOA
Unclamped Inductive Switching
IAS
TEST CONDITIONS
MAX
UNITS
VDS = -80V, t = 10ms
1.9
A
VGS(PEAK) = -15V, L = 0.1mH
30
A
Thermal Response
∆VSD
tH = 100ms; VH = -25V; IH = 1A
85
mV
Thermal Impedance
∆VSD
tH = 500ms; VH = -25V; IH = 1A
125
mV
4-6
FSS913A0D, FSS913A0R
Rad Hard Data Packages - Intersil Power Transistors
TXV Equivalent
Class S - Equivalents
1. RAD HARD TXV EQUIVALENT - STANDARD DATA
PACKAGE
1. RAD HARD “S” EQUIVALENT - STANDARD DATA
PACKAGE
A. Certificate of Compliance
A. Certificate of Compliance
B. Assembly Flow Chart
B. Serialization Records
C. Preconditioning - Attributes Data Sheet
C. Assembly Flow Chart
D. Group A
- Attributes Data Sheet
D. SEM Photos and Report
E. Group B
- Attributes Data Sheet
E. Preconditioning - Attributes Data Sheet
- Hi-Rel Lot Traveler
- HTRB - Hi Temp Gate Stress Post
Reverse Bias Data and Delta Data
- HTRB - Hi Temp Drain Stress Post
Reverse Bias Delta Data
F. Group C
- Attributes Data Sheet
G. Group D
- Attributes Data Sheet
2. RAD HARD TXV EQUIVALENT - OPTIONAL DATA
PACKAGE
F. Group A
- Attributes Data Sheet
A. Certificate of Compliance
G. Group B
- Attributes Data Sheet
B. Assembly Flow Chart
H. Group C
- Attributes Data Sheet
I. Group D
- Attributes Data Sheet
C. Preconditioning - Attributes Data Sheet
- Precondition Lot Traveler
- Pre and Post Burn-In Read and Record
Data
D. Group A
- Attributes Data Sheet
- Group A Lot Traveler
E. Group B
- Attributes Data Sheet
- Group B Lot Traveler
- Pre and Post Read and Record Data for
Intermittent Operating Life (Subgroup B3)
- Bond Strength Data (Subgroup B3)
- Pre and Post High Temperature Operating
Life Read and Record Data (Subgroup B6)
F. Group C
G. Group D
- Attributes Data Sheet
- Group C Lot Traveler
- Pre and Post Read and Record Data for
Intermittent Operating Life (Subgroup C6)
- Bond Strength Data (Subgroup C6)
- Attributes Data Sheet
- Group D Lot Traveler
- Pre and Post RAD Read and Record Data
2. RAD HARD MAX. “S” EQUIVALENT - OPTIONAL
DATA PACKAGE
A. Certificate of Compliance
B. Serialization Records
C. Assembly Flow Chart
D. SEM Photos and Report
E. Preconditioning - Attributes Data Sheet
- Hi-Rel Lot Traveler
- HTRB - Hi Temp Gate Stress Post
Reverse Bias Data and Delta Data
- HTRB - Hi Temp Drain Stress Post
Reverse Bias Delta Data
- X-Ray and X-Ray Report
F. Group A
- Attributes Data Sheet
- Hi-Rel Lot Traveler
- Subgroups A2, A3, A4, A5 and A7 Data
G. Group B
- Attributes Data Sheet
- Hi-Rel Lot Traveler
- Subgroups B1, B3, B4, B5 and B6 Data
H. Group C
- Attributes Data Sheet
- Hi-Rel Lot Traveler
- Subgroups C1, C2, C3 and C6 Data
I. Group D
4-7
- Attributes Data Sheet
- Hi-Rel Lot Traveler
- Pre and Post Radiation Data
FSS913A0D, FSS913A0R
TO-257AA
3 LEAD JEDEC TO-257AA HERMETIC METAL PACKAGE
A
ØP
E
INCHES
A1
Q
H1
D
0.065 R TYP.
L1
Øb1
L
Øb
1
2
3
J1
e
e1
SYMBOL
MIN
MILLIMETERS
MAX
MIN
MAX
NOTES
A
0.190
0.200
4.83
5.08
-
A1
0.035
0.045
0.89
1.14
-
Øb
0.025
0.035
0.64
0.88
2, 3
Øb1
0.060
0.090
1.53
2.28
-
D
0.645
0.665
16.39
16.89
-
E
0.410
0.420
10.42
10.66
-
e
0.100 TYP
2.54 TYP
4
e1
0.200 BSC
5.08 BSC
4
H1
0.230
0.250
5.85
6.35
-
J1
0.110
0.130
2.80
3.30
4
15.24
L
0.600
0.650
16.51
-
L1
-
0.035
-
0.88
-
ØP
0.140
0.150
3.56
3.81
-
Q
0.113
0.133
2.88
3.37
-
NOTES:
1. These dimensions are within allowable dimensions of Rev. B of
JEDEC TO-257AA dated 9-88.
2. Add typically 0.002 inches (0.05mm) for solder coating.
3. Lead dimension (without solder).
4. Position of lead to be measured 0.150 inches (3.81mm) from bottom
of dimension D.
5. Die to base BeO isolated, terminals to case ceramic isolated.
6. Controlling dimension: Inch.
7. Revision 1 dated 1-93.
WARNING!
BERYLLIA WARNING PER MIL-S-19500
Packages containing beryllium oxide (BeO) shall not be ground, machined, sandblasted, or subject to any mechanical operation
which will produce dust containing any beryllium compound. Packages containing any beryllium compound shall not be
subjected to any chemical process (etching, etc.) which will produce fumes containing beryllium or its’ compounds.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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4-8
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