Genesys Logic, Inc. GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller Version-11/13 Datasheet Revision 1.03 Oct. 16, 2007 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller Copyright: Copyright © 2007 Genesys Logic Incorporated. All rights reserved. No part of the materials may be reproduced in any form or by any means without prior written consent of Genesys Logic, Inc. Disclaimer: ALL MATERIALS ARE PROVIDED “AS IS” WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NO LICENSE OR RIGHT IS GRANTED UNDER ANY PATENT OR TRADEMARK OF GENESYS LOGIC INC.. GENESYS LOGIC HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS IN REGARD TO MATERIALS, INCLUDING ALL WARRANTIES, IMPLIED OR EXPRESS, OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF INTELLECTUAL PROPERTY, INCLUDING, WITHOUT LIMITATION, THE X-D PICTURE CARDTM LICENSE. IN NO EVENT SHALL GENESYS LOGIC BE LIABLE FOR ANY DAMAGES INCLUDING, WITHOUT LIMITATION, DAMAGES RESULTING FROM LOSS OF INFORMATION OR PROFITS. PLEASE BE ADVISED THAT THE MATERIALS MAY CONTAIN ERRORS OR OMMISIONS. GENESYS LOGIC MAY MAKE CHANGES TO THE MATERIALS OR TO THE PRODUCTS DESCRIBED THEREIN AT ANY TIME WITHOUT NOTICE. Trademarks: is a registered trademark of Genesys Logic, Inc. All trademarks are the properties of their respective owners. Office: Genesys Logic, Inc. 12F, No. 205, Sec. 3, Beishin Rd., Shindian City, Taipei, Taiwan Tel: (886-2) 8913-1888 Fax: (886-2) 6629-6168 http://www.genesyslogic.com ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 2 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller Revision History Revision Date Description 1.00 09/27/2006 First formal release 1.01 03/22/2007 1. Pin List, Ch3.2, p.10 2. Pin Out, Ch3.3, p.11 3. Absolute Maximum Ratings, Ch6.1, p16 4. DC Characteristics, Ch6.3, p.16 1.02 04/30/2007 Remove over current protection support 1.03 10/16/2007 Modify: 1. SD Interface Timing, , Ch6.5.7, p.29, 30 2. SD_WP description, Table3.2, p.12 ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 3 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller TABLE OF CONTENTS CHAPTER 1 GENERAL DESCRIPTION................................................... 7 CHAPTER 2 FEATURES .............................................................................. 8 CHAPTER 3 PIN ASSIGNMENT................................................................. 9 3.1 PINOUT ....................................................................................................... 9 3.2 PIN LIST.................................................................................................... 10 3.3 PIN DESCRIPTIONS ................................................................................... 11 CHAPTER 4 BLOCK DIAGRAM.............................................................. 14 CHAPTER 5 FUNCTIONAL DESCRIPTION ......................................... 15 CHAPTER 6 ELECTRICAL CHARACTERISTICS............................... 16 6.1 ABSOLUTE MAXIMUM RATINGS .............................................................. 16 6.2 OPERATING CONDITIONS......................................................................... 16 6.3 DC CHARACTERISTICS ............................................................................ 16 6.4 PMOS CHARACTERISTICS ...................................................................... 17 6.5 AC CHARACTERISTICS ............................................................................ 18 6.5.1 UTMI Transceiver .......................................................................... 18 6.5.2 External Flash ................................................................................. 18 6.5.3 SmartMedia ..................................................................................... 20 6.5.4 xD...................................................................................................... 25 6.5.5 Memory Stick .................................................................................. 26 6.5.6 Memory Stick PRO......................................................................... 27 6.5.7 Secure Digital / MultiMedia Card................................................. 29 6.5.8 CompactFlash Card........................................................................ 31 6.5.9 EEPROM 93C46 Timing................................................................ 32 CHAPTER 7 PACKAGE DIMENSION..................................................... 33 CHAPTER 8 ORDERING INFORMATION ............................................ 34 ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 4 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller LIST OF FIGURES FIGURE 3.1 - 128 PIN LQFP PINOUT DIAGRAM ................................................................. 9 FIGURE 4.1 - BLOCK DIAGRAM ......................................................................................... 14 FIGURE 6.1 - EMBEDDED PMOS SWITCH ARCHITECTURE .............................................. 17 FIGURE 6.2 – V-I CURVE OF PMOS SWITCH @ 25 °C ..................................................... 17 FIGURE 6.3 - TIMING DIAGRAM OF EXTERNAL FLASH .................................................... 18 FIGURE 6.4 - TIMING DIAGRAM OF SMARTMEDIA ........................................................... 23 FIGURE 6.5 - TIMING DIAGRAM OF MEMORYSTICK ........................................................ 26 FIGURE 6.6 - TIMING DIAGRAM OF MEMORYSTICK PRO ............................................... 27 FIGURE 6.7 - TIMING DIAGRAM OF SECURE DIGITAL / MULTIMEDIA CARD.................. 29 FIGURE 6.8 - TIMING DIAGRAM OF COMPACTFLASH ...................................................... 31 FIGURE 6.9 - TIMING DIAGRAM OF EEPROM 93C46 ..................................................... 32 FIGURE 7.1 - GL819 128 PIN LQFP PACKAGE ................................................................. 33 ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 5 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller LIST OF TABLES TABLE 3.1 - PIN LIST.......................................................................................................... 10 TABLE 3.2 - PIN DESCRIPTIONS ......................................................................................... 11 TABLE 6.1 - ABSOLUTE MAXIMUM RATINGS .................................................................... 16 TABLE 6.2 - OPERATING CONDITIONS .............................................................................. 16 TABLE 6.3 - DC CHARACTERISTICS .................................................................................. 16 TABLE 6.4 - PMOS DRIVING STRENGTH VERSUS JUNCTION TEMPERATURE ................. 17 TABLE 6.5 - PMOS DRIVING STRENGTH VERSUS JUNCTION TEMPERATURE ................. 17 TABLE 8.1 - ORDERING INFORMATION ............................................................................. 34 ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 6 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller CHAPTER 1 GENERAL DESCRIPTION The GL819 is the 3rd generation USB 2.0 Multi-Interface Flash Card Reader controller. It supports USB 2.0 high-speed transmission to: TM TM TM CompactFlash (CF) Type I/II, Micro Drive, Secure Digital (SD), Mini SDTM, MultiMediaCard (MMC), TM RS MultiMediaCardTM (RS MMC), HS-MMC, MMC-Mobile , Memory Stick (MS), Memory Stick DuoTM TM TM (MS Duo), High Speed Memory Stick (HS MS), Memory Stick PRO (MS PRO), Memory Stick PROTM TM TM Duo (MS PRO Duo) Memory Stick ROM, and SmartMedia (SM) 5V/3.3V and xD-Picture Card (xD)on one chip. Besides the flash card interface controller each, the GL819 integrates Genesys Logic own design USB 2.0 high-speed UTMI (USB 2.0 Transceiver Macrocell Interface) transceiver. As a single chip solution for USB 2.0 multi flash card reader, the GL819 complies with Universal Serial Bus specification rev. 2.0, USB Storage Class specification ver.1.0, and flash card interface specification each. The GL819 can support different kinds of multi-interface combinations. For the best performance consideration, the GL819 integrates high efficiency card interface hardware engine for data transfer. The GL819 also supports firmware upgrade via USB interface, and external flash read/ write for firmware upgrade and other applications. The GL819 pin assignment design fits to card sockets to provide easier PCB layout. Package type is 128-pin LQFP (14mm x 14mm), the GL819 can fit your various designs in both standalone and PC embedded USB 2.0 multi-interface flash card reader/ writer applications. ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 7 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller CHAPTER 2 FEATURES USB specification compliance - Comply with 480Mbps Universal Serial Bus specification rev. 2.0. - Comply with USB Storage Class specification rev. 1.0. Support 1 device address and up to 4 endpoints: Control (0)/ Bulk Read (1)/ Bulk Write (2)/Interrupt (3). Integrated USB building blocks - USB2.0 transceiver macro (UTM), Serial Interface Engine (SIE), Build-in power-on reset (POR) and low-voltage detector (LVD) Embedded 8051 micro-controller - Operate @ 60 MHz clock, 12 clocks per instruction cycle - Embedded 48K-byte mask ROM and internal 256 byte SRAM - Embedded 4K-byte external SRAM - Support up to external 48K code ROM Support firmware upgrade to external flash via USB ( ISP : in system programming ) USB 2.0 certified (Test ID=40002675) WHQL submission number 938163 Vista submission number 1220953 On-Chip power MOSFETs to control flash media card power. CompactFlashTM interface - Support CFA specification v2.1 / v3.0 - Support True IDE mode - Support 8 / 16 bit data mode and different timing SmartMediaTM interface - 8 bit data width and different speed Support different page size, and automatic append redundant area data (8 / 16 bytes) xD-Picture Interface ( Submission ID: AA-RG0435 ) - Compliant with xD-Picture specification v1.2B. - xD-Picture Type M/H card support. MemoryStickTM / MemoryStick PRO interface - Compliant with MemoryStick interface specification v1.40-00 - Compliant with MemoryStick PRO interface specification v1.00-01 - Support automatic CRC16 generation and verification Secure Digital and MultiMediaCard - Compliant with Secure Digital specification v2.0 - Compliant with MMC interface specification v4.2 (external flash) Support both SD / MMC mode access CLK/CMD/DAT0/DAT1/DAT2/DAT3/DAT4/DAT5/DAT6/DAT7 - Support SD specification v1.0 / v1.1 / v2.0 - Support MMC specification v4.0 / v4.1 / v4.2(ext flash support) x1 / x4 / x8 data transmission. - Automatic CRC7 generation for command and CRC7 verification for response on CMD - Support automatic CRC16 generation and verification on DAT0:7 TM TM - In addition to full packet transaction, optional single byte / bit operation on both CMD and DAT line / lines - Process data in block or byte High efficient hardware engine - Automatic data read / write with card by hardware engine - Easier firmware development On board 12 MHz Crystal driver circuit Available in 128-pin LQFP 14x14 mm package ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 8 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller CHAPTER 3 PIN ASSIGNMENT CF_D10 CF_D9 CF_D8 SM_CLE MS_INS MS_D1 VDD33_2 PMOSO2 NVMD0 NVMD1 NVMD2 NVMD3 CF_D2 CF_D1 CF_D0 DGND_3 SM_CDZ MS_D0 MS_D2 MS_D3 NC NVMA15 NVMA14 EXTRSTZ 93V46_DI 93C46_DO SM_ALE SD_D0 GPIO13 CF_A0 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 GPIO2/MMC_D6 GPIO1/MMC_D5 3.1 Pinout IORDY NVMA0 NVMA1 CF_D14 CF_D15 GPIO8 GPIO10/SM_D1 CF_D3 CF_D4 CF_CDZ SM_WPDZ MS_BS CF_D5 CF_D13 SD_CLK SD_CMD PMOSO3 VDD33_3 DGND_4 CF_D6 CF_D7 SD_D3 SD_D2 NC NVMA2 NVMA3 PMOSO1 VDD33_4 NVMD5 NVMD4 GPIO0/MMC_D4 GL819 LQFP - 128 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 AVDD1_1 AVDD1_2 RREF AGND1_1 AGND1_2 DM DP AVDD1_3 NC AGND1_3 DGND_1 NC NC GPIO9/SM_D0 GPIO12/SM_D3 CF_D11 CF_D12 GPIO5/SM_D5 GPIO6/SM_D6 CF_CS0Z CF_CS1Z CF_IORZ CF_IOWZ NVMA4 NVMA5 NVMA6 93C46_SK 93C46_CS GPIO15 XD_CDZ NVMA7 NVMA12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 GPIO7/SM_D7 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 Figure 3.1 - 128 Pin LQFP Pinout Diagram ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 9 CF_A1 CF_A2 GPIO14 GPIO4/SM_D4 GPIO3/MMC_D7 NVMA13 GPIO11/SM_D2 SM_WPZ MS_CLK MVMA8 NVMA9 NVMA11 NVMOEZ DGND_2 SM_RBZ SD_WEZ SD_CDZ SD_WP VDD33_1 PMOSO4 NVMA10 NVMCSZ NVMD7 NVMD6 SD_D1 SM_REZ CF_RST NVMWEZ AGND2 X1 X2 AVDD2 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller 3.2 Pin List Table 3.1 - Pin List Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type 1 CF_CS0Z O 33 AVDD2 P 65 CF_A0 O 97 IORDY I 2 CF_CS1Z O 34 X2 B 66 GPIO13 B 98 NVMA0 O 3 CF_IORZ O 35 X1 I 67 SD_D0 B 99 NVMA1 O 4 CF_IOWZ O 36 AGND2 P 68 SM_ALE O 100 CF_D14 B 5 NVMA4 O 37 NVMWEZ O 69 93C46_DO O 101 CF_D15 B 6 NVMA5 O 38 CF_RST O 70 93C46_DI I B 7 NVMA6 O 39 SM_REZ O 71 EXTRSTZ 8 93C46_SK O 40 SD_D1 B 72 NVMA14 102 GPIO8 GPIO10/ I,PU 103 SM_D1 O 104 CF_D3 9 93C46_CS B B O 41 NVMD6 B 73 NVMA15 O 105 CF_D4 B 10 GPIO15 B 42 NVMD7 B 74 NC 106 CF_CDZ I 11 XD_CDZ I 43 NVMCSZ O 75 MS_D3 B 107 SM_WPDZ I 12 NVMA7 O 44 NVMA10 O 76 MS_D2 B 108 MS_BS O 13 NVMA12 GPIO5/ 14 SM_D5 GPIO6/ 15 SM_D6 16 CF_D11 O 45 PMOSO4 P 77 MS_D0 B 109 CF_D5 B B 46 VDD33_1 P 78 SM_CDZ I 110 CF_D13 B B 47 SD_WP I 79 DGND_3 P 111 SD_CLK O B 48 SD_CDZ I 80 CF_D0 B 112 SD_CMD B 17 CF_D12 GPIO9 18 SM_D0 GPIO12/ 19 SM_D3 20 AVDD1_1 B 49 SM_WEZ O 81 CF_D1 B 113 PMOSO3 P B 50 SM_RBZ I 82 CF_D2 B 114 VDD33_3 P B 51 DGND_2 P 83 NVMD3 B 115 DGND_4 P P 52 NVMOEZ O 84 NVMD2 B 116 CF_D6 B 21 AVDD1_2 P 53 NVMA11 O 85 NVMD1 B 117 CF_D7 B 22 RREF A 54 NVMA9 O 86 NVMD0 B 118 SD_D3 B 23 AGND1_1 A 55 NVMA8 O 87 PMOSO2 P 119 SD_D2 B 24 AGND1_2 A 56 MS_CLK O 88 VDD33_2 P 120 NC 25 DM A B 89 MS_D1 B 121 NVMA2 O 26 DP A B 90 MS_INS I 122 NVMA3 O 27 AVDD1_3 P O 91 SM_CLE O 123 PMOSO1 P 28 NC B 92 CF_D8 B 124 VDD33_4 P 29 AGND1_3 A B 93 CF_D9 B 125 NVMD5 B 30 DGND_1 P 57 SM_WPZ GPIO11/ 58 SM_D2 59 NVMA13 GPIO3/ 60 MMC_D7 GPIO4/ 61 SM_D4 62 GPIO14 B B 63 CF_A2 O 32 NC 64 CF_A1 O 126 NVMD4 GPIO0/ 127 MMC_D4 GPIO7/ 128 SM_D7 B 31 NC 94 CF_D10 GPIO1/ 95 MMC_D5 GPIO2/ 96 MMC_D6 B B B B Note: For NC pins, please leave them unconnected (floating). ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 10 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller 3.3 Pin Descriptions Table 3.2 - Pin Descriptions Pin Name Pin# Type CF_CS0Z 1 O CF CS0# CF_CS1Z 2 O CF_CS1# CF_IORZ 3 O CF IOR# CF_IOWZ O CF IOW# O Ext. flash address 0~15 93C46_SK 4 98,99,121, 122,5~7,12, 55,54,44,53, 13,59,72,73 8 O 93C46 Clock 93C46_CS 9 O 93C46 CS I xD-Picture card detection pin, normal high, active low. B GPIO0~3 / MMC data 4~7 B GPIO4~7 / SM data 4~7 B GPIO9~12 / SM data 0~3 B GPIO8, 13~15 B CF data 8~12 20,21,27 P Analog power #1 22 A Reference resistor 23,24,29 A Analog ground 1~3 DM 25 A USB D- DP 26 A USB D+ 30,51,79,115 P Digital ground AVDD2 33 P X2 34 B X1 35 I AGND2 36 P Analog power #2 12MHz Crystal This is the other terminal of the crystal, or left open when an external clock source is used to drive XTAL/CLK. 12MHz Crystal This pin can be connected to one terminal of the crystal or can be connected to an external 12MHz clock when a crystal is not used. Analog ground #2 NVMWEZ 37 O Ext. flash WE# CF_RST 38 O CF reset (active-low) SM_REZ 39 67,40,119, 118, 86~83,126, 125,41,42 O SmartMedia RE# B SD DAT0~3 B Ext. flash data 0~7 NVMA0~15 xD_CDZ GPIO0~3/ MMC_D4~7 GPIO4~7/ SM_D4~7 GPIO9~12/ SM_D0~3 11 127,95,96, 60 61,14,15, 128 18,103,58, 19 102,66,62, GPIO8,13~15 10 CF_D8~12 92~94,16,17 AVDD1_1~3 RREF AGND1_1~3 DGND_1~4 SD_D0~3 NVMD0~7 Description ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 11 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller NVMCSZ 43 46,88,114, 124 O Ext. flash CS# P Digital power 3.3V SD_WP 47 I SD_CDZ 48 I SM_WEZ 49 O SD Card detection#, this is the card detection signal from SD device to indicate if the device is inserted, Normal high. SmartMedia WE# SM_RBZ 50 I SmartMedia RDY/BSY# NVMOEZ 52 O Ext. flash OE# MS_CLK 56 O Memory Stick SCLK output. SM_WPZ 57 B SmartMedia WP# CF_A0~2 65~63 O CF address 0~2 SM_ALE 68 O SmartMedia ALE 93C46_DO 69 O 93C46 Data out 93C46_DI 70 I EXTRSTZ 71 I,PU 93C46 Data in External reset #, the active low signal is used by the system to reset the chip, The active low pulse should be at least 1 us wide. VDD33_1~4 MSD0~3 28,31,32,74, 120 77,89,76,75 SM_CDZ 78 NC SD Write Protect Detection, this pin is an active high write protect signal for the SD device; Default high when card inserted. Not connected B MS DAT0~3 SmartMedia CD#, this is the card detection signal from SM device to indicate if the device is inserted, active low. I PMOSO1 80~82,104, 105,109, 116,117,110 123 PMOSO2 87 P PMOS2: MS Power MOS output(250mA output for idea) PMOSO3 113 P PMOSO4 45 P MS_INS 90 I PMOS3: SD Power MOS output(250mA output for idea) PMOS4: CF Power MOS output(250mA output for idea) or Access LED Memory Stick INS SM_CLE 91 O SmartMedia CLE IORDY 97 I CF IORDY 100,101 B CF_CDZ 106 I SM_WPDZ 107 I MS_BS 108 O CF data 14~15 CF CD# . CF card detection, this pin is connected to the ground on the CF card, when the CF device is inserted. SmartMedia Write Protect Detect, this pin is an active low write protect signal for the SM device, when SM is enable. Normal high. MemoryStick BS SD_CLK 111 O SD/MMC CLK SD_CMD 112 B SD/MMC CMD CF_D0~7,13 CF_D14~15 B CF Data 0~7, 13 P PMOS1: SM/XD Power MOS output (250mA output for idea) Note: ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 12 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller Type O I B IPU IPD P A Output Input Bi-directional Input with internal pull-up Input with internal pull-down Power / Ground Analog ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 13 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller CHAPTER 4 BLOCK DIAGRAM MHE EPFIFO MHE Control EP0 FIFO (64B) MS/MS-Pro MIF SIE EP3 FIFO (64B) BULK FIFO (512B*2) SM/XD MIF (With ECC) SD/MMC MIF CF MIF Register SIE/ FIFO/ MHE Control Mask ROM (48K) 8051 Core SRAM 256B UTMI LUT 4KB Figure 4.1 - Block Diagram ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 14 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller CHAPTER 5 FUNCTIONAL DESCRIPTION UTMI The USB 2.0 Transceiver Macrocell, it’s the analog circuitry that handles the low level USB protocol and signaling, and shifts the clock domain of the data from the USB 2.0 rate to one that is compatible with the general logic. SIE The Serial Interface Engine, which contains the USB PID and address recognition logic, and other sequencing and state machine logic to handle USB packets and transactions. EPFIFO Endpoint FIFO includes Control FIFO (FIFO0), interrupt FIFO (FIFO3), Bulk In/Out FIFO (BULKFIFO) Control FIFO FIFO of control endpoint 0. It is 64-byte FIFO, and it is used for endpoint 0 data transfer. Interrupt FIFO 64-byte depth FIFO of endpoint 3 for status interrupt Bulk In/Out FIFO It can be in the TX mode or RX mode: 1. It contains ping-pong FIFO (512 bytes each bank) for transmit/receive data continuously. 2. It can be directly accessed by Uc 3. Support automatic hardware SmartMedia ECC error correction MHE It contains 5 MIF (Media Interface) MIFs 1. CF/Micro Drive MIF 2. SmartMedia/xD/Flash MIF 3. SD/MMC MIF 4. MemoryStick MIF 5. MemoryStick PRO MIF 8051 Core/SRAM/LUT/Mask ROM An 8-bit Micro-controller to manage card operation, card power, USB Storage Class, data transfer between USB and card interface, and GPIOs control ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 15 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller CHAPTER 6 ELECTRICAL CHARACTERISTICS 6.1 Absolute Maximum Ratings Table 6.1 - Absolute Maximum Ratings Parameter Value Storage Temperature -40°C to + 125°C Ambient Temperature 0°C to + 70°C Supply Voltage to Ground Potential -0.5V to + 4.0V DC Input Voltage to Any Pin -0.5V to + 5.8V 6.2 Operating Conditions Table 6.2 - Operating Conditions Parameter Value Ta (Ambient Temperature Under Bias) 0°C to 70°C Supply Voltage +3.0V to +3.6V Ground Voltage 0V FOSC (Oscillator or Crystal Frequency) 12 MHz ± 0.05% 12 MHz ± 0.25% (for USB full-speed only) 6.3 DC Characteristics Table 6.3 - DC Characteristics Symbol Parameter Condition Min. Typ. Max. Unit VCC Supply Voltage 3.0 - 3.6 V VIH Input High Voltage 2.0 - 3.6 V VIL Input Low Voltage -0.3 - 0.8 V - 10 µA - - V - - 0.4 V 0 < VIN < VCC (The value is under without the pull-up or pull-down -10 resistance, It means it is the value that the pin state is Hi-z) 2.4 II Input Leakage current VOH Output High Voltage VOL Output Low Voltage IOH Output Current High VDD=3.3V VOH=2.4V - 8 - mA IOL Output Current Low VDD=3.3V VOL=0.4V 1.5K external pull-up included Connect to USB with 8051 operating without the card - 8 - mA - 450 µA - 90 mA ISUSP Suspend current ICC Supply current ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 16 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller 6.4 PMOS Characteristics Before over-current dectection: Table 6.4 - PMOS Driving Strength versus Junction Temperature (IO Power=3.3V, Register setting =250mA) Junction Temperature Max. Driving Strength (Ma), PMOS output voltage(V) 70 °C 190± 20% 2.81v± 5% 25 °C 202± 20% 2.84V± 5% 0 °C 218 ± 20% 2.85v± 5% When over-current dectection: Table 6.5 - PMOS Driving Strength versus Junction Temperature (IO Power=3.3V, Register setting =250mA) Junction Temperature Max. Driving Strength (Ma), PMOS output voltage(V) 70 °C 198± 20% 2.8v± 5% 25 °C 215± 20% 2.83V± 5% 0 °C 232 ± 20% 2.84v± 5% Figure 6.1 - Embedded PMOS Switch Architecture Figure 6.2 – V-I Curve of PMOS Switch @ 25 °C ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 17 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller 6.5 AC Characteristics 6.5.1 UTMI Transceiver The GL819 is fully compatible with Universal Serial Bus specification rev. 2.0 and USB 2.0 Transceiver Macercell Interface (UTMI) specification rev. 1.01. Please refer to the specifications for more information. 6.5.2 External Flash Figure 6.3 - Timing Diagram of External Flash ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 18 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller AC Characteristics of Flash Interface (CLOAD = 30pF) Symbol tACC Parameter Max Address to Output Delay (max) 83 NVMCSZ to Output Delay (max) 83 tDF NVMCEZ or NVMOEZ, whichever occurred first, to Output Float (max) 0 tOH Output Hold from NVMOEZ, NVMCSZ or Address, whichever occurred first (min) 0 tAS Address Setup Time (min) 760 tAH Address Hold Time (min) 760 tOES NVMOEZ Setup Time (min) 300 tCS NVMCSZ Setup Time (min) 0 tCH NVMCSZ Hold Time (min) 0 tWP Write Pulse Width (min) 66 Write Pulse Width High (min) 300 tDS Data Setup Time (min) 300 tDH Data Hold Time (min) 0 NVMOEZ Hold Time (min) 16 tCE tWPH tOEH ©2000-2007 Genesys Logic Inc. - All rights reserved. Unit ns Page 19 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller 6.5.3 SmartMedia Command Input Cycle SM_CLE tCLS tCLH SM_CEZ tCS tWP tCH SM_WEZ tALS tALH SM_ALE tDS tDH SM_D[0:7] Address Input Cycle SM_CLE tCLS tWC SM_CEZ tCS tWP tWH SM_WEZ tALH tALS SM_ALE tDS tDH SM_D[0:7] ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 20 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller Data Input Cycle SM_CLE tCLH SM_CEZ tCH SM_WEZ tALS SM_ALE tDS tDH SM_D[0:7] Serial Read Cycle tRC SM_CEZ tRP tREH SM_REZ tCHZ tREA tRHZ SM_D[0:7] tALS SM_RBZ ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 21 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 22 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller Figure 6.4 - Timing Diagram of SmartMedia ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 23 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller AC Characteristics of Smart Media Interface (CLOAD = 30 pF) SYMBOL PARAMETER MIN. MAX. UNIT tCLS CLE Setup Time 35 - ns tCLH CLE Hold Time 45 - ns tCS -CE Setup Time 160 - ns tCH -CE Hold Time 160 - ns tWP -WE Pulse Width 50 - ns tALS ALE Setup Time 35 - ns tALH ALE Hold Time 79 - ns tDS Data Setup Time 48 - ns tDH Data Hold Time 35 - ns tWC Write Cycle Time 83 - ns tWH -WE High Hold Time 33 - ns tWW -WP High to –WE Low 199 - ns tRR Ready to –RE Low 216 - ns tRP Read Pulse Width 67 - ns tRC Read cycle Time 100 - ns - 25 ns 400 - ns - 25 ns tREA -RE Access Time (Serial Data Access) tCEH -CE High Hold Time (At the Last Serial Read) tREAID -RE Access Time (ID Read) tRHZ -RE High to Output Hi-Z 10 15 ns tCHZ -CE High to Output Hi-Z - 10 ns tREH -RE High Hold Time 30 - ns tRSTO -RE Access Time - 42 ns tCSTO -CE Access Time - 42 ns tRHW -RE High to -WE Low 36 - ns tWHC -WE High to –CE Low 160 - ns tWHR -WE High to –RE Low 83 - ns tAR1 ALE Low to –RE Low (Address Register Read, ID Read) 330 - ns tCR -CE Low to –RE Low (Data Register Read, ID Read) 235 - ns tWB -WE High to Busy - 100 ns tAR2 ALE Low to RE Low (Read Cycle) tRB Last –RE High to Busy (at Sequential Read) - 32 ns -CE High to Ready - 1 µs tCRY ©2000-2007 Genesys Logic Inc. - All rights reserved. 330 ns Page 24 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller 6.5.4 xD The Timing diagrams are the same as SM. AC Characteristics: tCLS CLE Set up Time 20 GL819 (30pF) 35.2 tCLH CLE Hold Time 40 44.6 tCS CE Setup up Time 20 163.5 tCH CE Hold Time 40 163.5 tWP WE Pulse Width 40 51.9 tALS ALE Setup Time 20 35.2 tALH ALE Hold Time 40 95.2 tDS Data Setup Time 30 51.9 tDH Data Hold Time 20 35.5 tWC Write Cycle Time 80 83.2 tWH WE High Hold Time 20 31.7 tWW WP High to WE Low 100 199 tRR Ready to RE Low 20 232 tRP Read Pulse Width 60 68.6 tRC Read Cycle Time 80 100 Parameter Description tREA RE Access Time(Serial Data Access) tCEH CE High Hold Time tREAID Spec. Min Spec. Max 45 250 RE Access Time(ID Read) 90 25 30 26.9 30 26.9 RE High to Output Hi-Z tCHZ CE High to Output Hi-Z tREH RE High Hold Time tRSTO RE Access Time 45 10 tCSTO CE Access Time 55 10 tRHW RE High to WE Low 0 35.2 tWHC WE High to CE Low 50 163 tWHR WE High to RE Low 60 83 TAR1 ALE Low to RE Low 200 366 tCR CE Low to RE Low 200 235 tWB WE High to Busy TAR2 ALE LOW to RE LOW Last RE High to Busy ©2000-2007 Genesys Logic Inc. - All rights reserved. ns 400 tRHZ tRB 5 25 Unit 20 31.2 200 150 100 352 200 48 Page 25 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller 6.5.5 Memory Stick Figure 6.5 - Timing Diagram of MemoryStick Memory Stick Frequency Mode Parameter Description FSCLK Mode Typ 0 1.5M 1 6M 2 15M 3 20M SCLK frequency Unit Remark Hz AC Characteristics of Memory Stick Interface (CLOAD = 30 pF) PARAMETER tSCLKc DESCRIPTION SCLK Cycle H pulse FSCLK = FSCLK = FSCLK = FSCLK = UNIT 1.5 MHZ 6 MHZ 15 MHZ 20 MHZ 666.6 166.6 66.6 50.0 ns tSCLKwh SCLK (min) length 323.3 73.3 23.3 15 ns tSCLKwl SCLK L pulse length (min) 323.3 73.3 23.3 15 ns ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 26 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller tSCLKr SCLK rise time (min) 5 5 5 5 ns tSCLKr SCLK rise time (max) 10 10 10 10 ns tSCLKf SCLK Fall time (min) 5 5 5 5 ns tSCLKf SCLK Fall time (max) 10 10 10 10 ns tBSsu BS setup time (min) 5 5 5 5 ns tBSh BS hold time (min) 5 5 5 5 ns tDsu DATA setup time (min) 5 5 5 5 ns tDh DATA hold time (min) 5 5 5 5 ns tDd DATA output delay time (max) 5 5 5 5 ns 6.5.6 Memory Stick PRO Figure 6.6 - Timing Diagram of MemoryStick PRO ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 27 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller Memory Stick PRO Frequency Mode Parameter FSCLK Description SCLK frequency Mode Typ 0 1.5M 1 6M 2 15M 3 20M 4 30M 5 40M Unit Remark Same as Memory Stick Hz AC Characteristics of MS Interface (CLOAD = 15 pF) PARAMETER tSCLKc DESCRIPTION SCLK Cycle FSCLK = FSCLK = UNIT 30 MHZ 40 MHZ 33.3 25.0 ns tSCLKwh SCLK H pulse length (min) 9 5 ns tSCLKwl SCLK L pulse length (min) 9 5 ns tSCLKr SCLK rise time (min) 5 5 ns tSCLKr SCLK rise time (max) 7.5 7.5 ns tSCLKf SCLK Fall time (min) 5 5 ns tSCLKf SCLK Fall time (max) 7.5 7.5 ns tBSsu BS setup time (min) 8 8 ns tBSh BS hold time (min) 1 1 ns tDsu DATA setup time (min) 8 8 ns tDh DATA hold time (min) 1 1 ns tDd DATA output delay time (max) 5 5 ns ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 28 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller 6.5.7 Secure Digital / MultiMedia Card Normal Mode: fPP tWL tWH Clock tTHL tTLH tISU tIH Input tODLY Output Figure 6.7 - Timing Diagram of Secure Digital / MultiMedia Card SD Interface Timing (CL = 30PF) SYMBOL PARAMETER fPP Clock frequency Data Transfer Mode 24 20 15 6 MHz fOD Clock frequency Identification Mode 375 375 375 375 KHz tWL Clock low time (min) 18 22 30 80 ns tWH Clock high time (min) 18 22 30 80 ns tTLH Clock rise time (max) 3 3 3 3 ns tTHL Clock fall time (max) 3 3 3 3 ns tISU Input set-up time (min) 5 5 5 5 ns tIH Input hold time (min) 5 5 5 5 ns tODLY Output delay time (max) 14 14 14 14 ns ©2000-2007 Genesys Logic Inc. - All rights reserved. CLOCK RATE UNIT Page 29 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller High-Speed Mode: High-Speed Mode: SD Interface Timing (CL = 30PF) SYMBOL PARAMETER CLOCK RATE UNIT fPP Clock frequency Data Transfer Mode 48 MHz fOD Clock frequency Identification Mode 375 KHz tWL Clock low time (min) 7.4 ns tWH Clock high time (min) 7.4 ns tTLH Clock rise time (max) 3 ns tTHL Clock fall time (max) 3 ns tISU Input set-up time (min) 6 ns tIH Input hold time (min) 2 ns Output delay time (max) 14 ns tODLY ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 30 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller 6.5.8 CompactFlash Card Figure 6.8 - Timing Diagram of CompactFlash True IDE PIO Mode Read/Write Timing (with CLOAD = 30 pF) PARAMETER Tcyc MODE MODE MODE MODE MODE MODE MODE 0 1 2 3 4 5 6 600 399 249 183 133 100 83 ns 399 266 150 100 83 66 58 ns 199 132 99 83 49 33 24 ns ITEM Cycle Time (min) UNITS Read/Write Active Tw Width (min) Read/Write Recovery Trec Time (min) Td Write Data Setup (min) 0 0 0 0 0 0 0 ns Twh Write Data Hold (min) 208 142 109 90 55 40 24 ns Tsu Read Data Setup (min) 50 35 20 20 20 15 10 ns Thr Read Data Hold (min) 5 5 5 5 5 5 5 ns ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 31 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller 6.5.9 EEPROM 93C46 Timing Figure 6.9 - Timing Diagram of EEPROM 93C46 AC Characteristics of 93C46 Interface (with CLOAD = 15 pF) PARAMETER DESCRIPTION MINIMUM MAXIMUM UNIT 400k Hz fSK SK clock frequency 200k tWH SK H pulse length 500 ─ tWL SK L pulse length 500 ns tTLH SK rise time 10 ns tTHL SK fall time ─ ─ 5 10 ns tCSS CS setup time 1 tCSH CS hold time 1 tISU DI setup time 1 tIH DI hold time 1 tOSU DO setup time 5 tOH DO hold time 5 ©2000-2007 Genesys Logic Inc. - All rights reserved. ─ ─ ─ ─ ─ ─ ns µs µs µs µs ns ns Page 32 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller CHAPTER 7 PACKAGE DIMENSION D D1 A A2 D 96 65 64 97 Green Package Internal No. GL819 AAAAAAAGAA YWWXXXXXXXX Date Code B Code No. Lot Code 33 128 4X 32 1 4X e 0- 1 aaa C A B D L1 E2 E E1 A A1 0.05 S D2 bbb H A B D c b ddd M C A B s D s 0- C SEATING PLANE ccc C 0- 2 R1 R2 H GAGE PLANE 0.25mm S L 0- 3 NOTES : 1. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 mm PER SIDE. D1 AND E1 ARE MAXIMUM PLASTIC BODY SIZE DIMENSIONS INCLUDING MOLD MISMATCH. 2. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL NOT CAUSE THE LEAD WIDTH TO EXCEED THE MAXIMUM b DIMENSION BY MORE THAN 0.08mm. DAMBAR CAN NOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. CONTROL DIMENSIONS ARE IN MILLIMETERS. MILLIMETER INCH SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. 1.60 0.063 A 0.006 A1 0.05 0.15 0.002 1.35 1.40 1.45 0.053 0.055 0.057 A2 0.630 BASIC D 16.00 BASIC E 16.00 BASIC 0.630 BASIC 14.00 BASIC 0.551 BASIC D1 14.00 BASIC 0.551 BASIC E1 12.40 BASIC 0.488 BASIC D2 E2 12.40 BASIC 0.488 BASIC 0.08 0.003 R1 R2 0.08 0.20 0.003 0.008 03.5 7 0 3.5 7 0 0 0 0- 1 0- 2 11 12 13 11 12 13 0- 3 11 12 13 11 12 13 c 0.09 0.20 0.004 0.008 0.45 0.60 0.75 0.018 0.024 0.030 L 1.00 REF 0.039 REF L1 S 0.20 0.008 b 0.13 0.16 0.23 0.005 0.006 0.009 0.40 BASIC 0.016 BASIC e TOLERANCES OF FORM AND POSITION aaa 0.20 0.008 bbb 0.20 0.008 ccc 0.08 0.003 0.07 0.003 ddd Figure 7.1 - GL819 128 Pin LQFP Package ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 33 GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller CHAPTER 8 ORDERING INFORMATION Table 8.1 - Ordering Information Part Number Package Normal/Green Version Status GL819MXG 128-pin LQFP Green Package 11/13 Available ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 34