HCC/HCF40102B HCC/HCF40103B 8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS 40102B 2-DECADE BCD TYPE 40103B 8-BIT BINARY TYPE SYNCHRONOUS OR ASYNCHRONOUS PRESET MEDIUM-SPEED OPERATION : fCL = 3.6MHz (TYP.) @ VDD = 10V CASCADABLE QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE 5V, 10V AND 15V PARAMETRIC RATINGS INPUT CURRENT OF 100 nA AT 18V AND 25°C FOR HCC DEVICE 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC TENo TATIVE STANDARD N . 13 A, ”STANDARD SPECIFICATIONS FOR DESCRIPTION OF ”B” SERIES CMOS DEVICES” . . .. .. .. EY (Plastic Package) F (Ceramic Package) C1 (Chip Carrier) ORDER CODES : HCC401XXBF HCF401XXBEY HCF401XXBC1 DESCRIPTION The HCC40102B, HCC40103B, (extended temperature range) and the HCF40102B, HCF40103B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package. The HCC/HCF40102B, and HCC/HCF40103B consist of an 8-stage synchronous down counter with a single output which is active when the internal count is zero. The HCC/HCF40102B is configured as two cascaded 4-bit BCD counters, and the HCC/HCF40103B contains a single 8-bit binary counter. Each type has control inputs for enabling or disabling the clock, for clearing the counter to its maximum count, and for presetting the counter either synchronously or asynchronously. All control inputs and the CARRY-OUT/ZERO-DETECT output are active-low logic. In normal operation, the counter is decremented by one count on each positive transition of the CLOCK. Counting is inhibited when the CARRY-IN/COUNTER ENABLE (CI/CE) input is high. The CARRY-OUT/ZERO-DETEC (CO/ZD) output goes low when the count reaches zero if the CI/CE input is low, and remains low for one full clock period. When the SYNCHRONOUS PRESET-ENABLE (SPE) input is low, data at the JAM input is clocked into the counter on the next positive clock transition regardless of the state of the CI/CE input. When the ASYNCHRONOUS PRESET-ENABLE (APE) input is low, data at the June 1989 PIN CONNECTIONS 1/13 HCC/HCF40102B/40103B JAM inputs is asynchronously forced into the counter regardless of the state of the SPE, CI/CE, or CLOCK inputs. JAM inputs JO-J7 represent two 4-bit BCD words for the HCC/HCF40102B and a single 8-bit binary word for the HCC/HCF40103B. When the CLEAR (CLR) input is low, the counter is asynchronously cleared to its maximum count (9910 for the HCC/HCF40102B and 25510 for theHCC/HCF40103B) regardless of the state of any other input. The precedence relationship between control input is indicated in the truth table. If all control inputs are high at the tieme of zero count, the counters will jump to the maximum count, giving a counting sequence of 100 or 256 clock pulses long. The HCC/HCF40102B and HCC/HCF40103B may be cascaded using the CI/CE input and the FUNCTIONAL DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol V DD * Parameter Supply Voltage : HC C Types H C F Types Value Unit – 0.5 to + 20 – 0.5 to + 18 V V – 0.5 to V DD + 0.5 V Vi Input Voltage II DC Input Current (any one input) ± 10 mA Total Power Dissipation (per package) Dissipation per Output Transistor for T o p = Full Package-temperature Range 200 mW 100 mW Pto t T op Operating Temperature : HCC Types H CF Types – 55 to + 125 – 40 to + 85 °C °C T stg Storage Temperature – 65 to + 150 °C Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability. * All voltages are with respect to VSS (GND). RECOMMENDED OPERATING CONDITIONS Symbol V DD VI Top 2/13 Parameter Supply Voltage : H CC Types H C F Types Input Voltage Operating Temperature : HCC Types H CF Types Value Unit 3 to 18 3 to 15 V V 0 to V DD V – 55 to + 125 – 40 to + 85 °C °C HCC/HCF40102B/40103B LOGIC DIAGRAMS 40102B 40103B Detail logic diagram for flip-flops, FF0-FF7 used in logic diagrams for 40102B and 40103B. 3/13 HCC/HCF40102B/40103B LOGIC DIAGRAMS (continued) Timing Diagram for 40102B and 40103B 40102B TRUTH TABLE Control Inputs CLR APE SPE CI/CE 1 1 1 1 1 1 1 0 1 1 0 X 1 0 X X 0 X X X Notes : 4/13 Preset Mode Action Inhibit Counter Synchronous Count Down Preset on Next Positive Clock Transition Asynchronous Preset Asynchrounously Clear to Maximum Count 1. 0 = Low level 1 = High level X = Don’t care 2. Clock connected to clock input. 3. Synchronous operation : changes occur on negative-to-positive clock transitions.. JAM inputs : HCC/HCF010B ; MSD = J7, J6, J5, J4 (J7 is MSB) LSD = J3, J2, J1, J0 (J3 is MSB) HCC/HCF40103B Binary ; MSB = J7, LSB = J0 HCC/HCF40102B/40103B STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions) Test Conditions Symbol IL V OH V OL Parameter Quiescent Current VI (V) VO (V) 0/ 5 5 5 0.04 5 150 0/10 HCC Types 0/15 10 10 0.04 10 300 15 20 0.04 20 600 0/20 20 100 0.08 100 3000 0/ 5 HCF 0/10 Types 0/15 5 20 0.04 20 150 10 40 0.04 40 300 15 80 0.04 80 600 Output High Voltage Output Low Voltage 0/ 5 <1 5 4.95 4.95 4.95 0/10 <1 10 9.95 9.95 9.95 0/15 <1 15 14.95 5/0 <1 5 0.05 0.05 0.05 10/0 <1 10 0.05 0.05 0.05 15/0 V IH V IL I OH I OL Input High Voltage Input Low Voltage Output Drive Current Output Sink Current CI Input Leakage Current 14.95 <1 15 0.5/4.5 <1 5 0.05 1/9 <1 10 7 7 7 1.5/13.5 < 1 15 11 11 11 3.5 0.05 3.5 V <1 5 1.5 1.5 1.5 9/1 <1 10 3 3 3 13.5/1.5 < 1 15 4 4 4 5 – 2 – 1.6 – 3.2 – 1.15 HCC Types 0/10 4.6 5 – 0.64 – 0.51 – 1 – 0.36 9.5 10 – 1.6 – 1.3 – 2.6 – 0.9 0/15 13.5 15 – 4.2 – 3.4 – 6.8 – 2.4 0/ 5 2.5 5 – 1.53 – 1.36 – 3.2 – 1.1 0/ 5 HCF Types 0/10 4.6 5 – 0.52 – 0.44 – 1 – 0.36 9.5 10 – 1.3 – 1.1 – 2.6 – 0.9 0/15 13.5 15 – 3.6 – 3.0 – 6.8 – 2.4 0/ 5 0.4 5 0.64 0.51 1 0.36 HCC 0/10 Types 0/15 0.5 10 1.6 1.3 2.6 0.9 1.5 15 4.2 3.4 6.8 2.4 0/ 5 0.4 5 0.52 0.44 1 0.36 0.5 10 1.3 1.1 2.6 0.9 1.5 15 3.6 3.0 6.8 2.4 V mA mA 18 ± 0.1 ±10 – 5 ± 0.1 ± 1 15 ± 0.3 ±10 – 5 ± 0.3 ± 1 µA Any Input Any Input V 0.05 2.5 Input Capacitance V 4.5/0.5 HCF 0/15 Types µA 3.5 0/ 5 HCC 0/18 Types Unit 14.95 0/ 5 HCF 0/10 Types 0/15 I IH , I IL Value |I O | V D D T L o w* 25 °C T Hi g h * (µA) (V) Min. Max. Min. Typ. Max. Min. Max. 5 7.5 pF * TLow= – 55°C for HCC device : – 40°C for HCF device. * THigh= + 125°C for HCC device : + 85°C for HCF device. The Noise Margin for both ”1” and ”0” level is : 1V min. with VDD = 5V, 2V min. with VDD = 10V, 2.5 V min. with VDD = 15V. 5/13 HCC/HCF40102B/40103B DYNAMIC ELECTRICAL CHARACTERISTICS (T amb = 25°C, C L = 50pF, R L = 200kΩ, typical temperature coefficient for all V DD values is 0.3%/°C, all input rise and fall time = 20ns) Symbol t PHL , tP LH Parameter Propagation Delay Time Clock to-out Carry In/Counter Enable-to-output Asynchronous Preset Enable-to-output Clear-to-output t THL , t T L H Transition Time tW Pulse Width Clock Pulse Width CLR Pulse Width APE Pulse Width t se t u p Setup Time SPE Setup Time JAM Setup Time f CL 6/13 Maximum Clock Input Frequency Test Conditions Value V D D (V) Min. Typ. Max. 5 300 600 10 130 260 15 95 190 5 200 400 10 90 180 15 65 130 5 650 1300 10 300 600 15 200 400 5 375 750 10 180 360 15 100 200 5 100 200 10 50 100 15 40 80 5 300 150 10 180 90 15 80 40 5 320 160 10 160 80 15 100 50 5 360 180 10 160 80 15 120 60 5 280 140 10 140 70 15 100 50 5 200 100 10 80 40 15 60 30 5 0.7 1.4 10 1.8 3.6 15 2.4 4.8 Unit ns ns ns ns ns ns ns ns ns MHz HCC/HCF40102B/40103B Output Low (sink) Current Characteristics. Output High (source) Current Characteristics. Typical Transition Time vs. Load Capacitance. Typical Propagation Delay Time vs. Load Capacitance (clock to CO/ZD). Typical Maximum Clock Input Frequency vs. Supply Voltage. Typical Dynamic Power Dissipation vs. Frequency. 7/13 HCC/HCF40102B/40103B TYPICAL APPLICATIONS Divide-by-”N” Counter. Programmable Timer. Microprocessor Interrupt Timer. Synchronous Cascading. Microprocessor Interrupt Timer. 8/13 * An output spike (160ns @ VDD = 5V) occurs whenever two or more devices are cascaded in the parallel-clocked mode because the clock-to-carry out delay is greater than the carry-in-tocarry out delay. This spike is eliminated by gating the out put of the last device with the clock as shown. HCC/HCF40102B/40103B TEST CIRCUITS Quiescent Device Current. Input Voltage. Input Current. Maximum Clock Frequency. Dynamic Power Dissipation. 9/13 HCC/HCF40102B/40103B Plastic DIP16 (0.25) MECHANICAL DATA mm DIM. MIN. a1 0.51 B 0.77 TYP. inch MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 10/13 HCC/HCF40102B/40103B Ceramic DIP16/1 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 20 0.787 B 7 0.276 D E 3.3 0.130 0.38 e3 0.015 17.78 0.700 F 2.29 2.79 0.090 0.110 G 0.4 0.55 0.016 0.022 H 1.17 1.52 0.046 0.060 L 0.22 0.31 0.009 0.012 M 0.51 1.27 0.020 0.050 N P Q 10.3 7.8 8.05 5.08 0.406 0.307 0.317 0.200 P053D 11/13 HCC/HCF40102B/40103B PLCC20 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 9.78 10.03 0.385 0.395 B 8.89 9.04 0.350 0.356 D 4.2 4.57 0.165 0.180 d1 2.54 0.100 d2 0.56 0.022 E 7.37 8.38 0.290 0.330 e 1.27 0.050 e3 5.08 0.200 F 0.38 0.015 G 0.101 0.004 M 1.27 0.050 M1 1.14 0.045 P027A 12/13 HCC/HCF40102B/40103B Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 13/13