H 2.0 Amp IGBT Gate Drive Optocoupler with Integrated Over-current Protection and Fault Feedback Preliminary Technical Data HCPL-3160 Features Description • Integrated IGBT Desaturation Protection • Integrated Optically Isolated IGBT Fault Status Feedback • CMOS Compatible INPUT and FAULT Status Indicator HP 3160 9630 The HCPL-3160 provides low cost, area efficient IGBT gate drive that includes desaturation or over current detection and local IGBT shutdown. The integrated fault feedback optocoupler notifies the controller when the IGBT is shutdown due to a desaturation or over current condition. Actual Size • Small Printed Circuit Board Footprint (SO-16 Package) • -40°C to 100°C Operating Temperature • Suitable for Integration in Power Modules • 2.0 A Minimum Peak Output Current • 15 kV/µs Minimum Common Mode Rejection (CMR) at VCM = 1500 V • VIORM = 890 VPEAK Functional Diagram 1 16 2 15 3 14 4 13 12 5 SHIELD 6 11 7 10 8 9 This data sheet represents the latest information at the time of publication of this catalog. All specifications subject to change. Samples available Fall 1996. 1-212 Fault Circuit Operation A typical desaturation protected IGBT gate drive application circuit using the HCPL-3160 is shown in Figure 1. The IGBT collector to emitter voltage is monitored through DDESAT. When the IGPT is on and VDESAT exceeds the internal reference voltage of 7 V the IGBT gate is “softly” turned-off by M2 to prevent large di/dt generation. The LED2 driver is also activated, which drives the internal feedback LED2 and notifies the HCPL-3160 controller of the IGBT fault by bringing the FAULT output low. The FAULT output remains low until RESET is brought low. (Note if a separate reset line is not required, RESET can be connected to Vin on the circuit board. In this case, the FAULT output will be reset on the next PWM cycle that Vin goes low.) The FAULT output is an open collector which allows the FAULT outputs from all the HCPL-3160s in a drive to be connected together in a “wired OR” forming a single fault bus for interfacing with the micro-controller. The ENABLE input can also be connected to this fault bus. With this connection all IGBTs in a drive are shutdown without micro-controller intervention once a fault is detected on a single IGBT. CBLANK disables the fault detection circuitry for a time period sufficient for normal IGBT turn-on. CBLANK is held low by Q1 when the IGBT is off. CBLANK DETECTOR IC VE LIGHTGUIDE 1 GND DDESAT BUFFER IC LED1– 0.1 µF LED1+ VCC1 + – VIN RESET VCC1 FAULT LIGHTGUIDE 2 LED1 D R I V E R + – TRIPLE DARLINGTON UVLO + – ENABLE R2 (OPTIONAL) A3 VCC2 ICHG RG VUVLO 12 V/11 V VE R Q + – IDSCHG – + Q1 VE S Q M2 1X DESAT 7V M1 33X + – VE VEE Q R LED2 Q S GND VE SHIELD VE LED2 DRIVER SHIELD Figure 1. IGBT Gate Drive with Desaturation Protection and Fault Feedback. 1-213 Preliminary Electrical Specifications (DC) Over recommended operating conditions (TA = -40 to 100°C) unless otherwise specified. Parameter Symbol Min. Logic Low Voltages INPUT RESET FAULT ENABLE Logic High Voltages INPUT RESET FAULT ENABLE 2.0 High Level Output Current IOH 0.5 Low Level Output Current IOL High Level Output Voltage VOH Low Level Output Voltage VOL Typ.* Max. Units 0.8 V V 1.5 A VO = VCC2 -4 V A VO = VCC2 15 V A VO = VEE + 2.5 V A VO = VEE + 15 V IO = -100 mA 0.5 V IO = 100 mA 2.0 0.5 Conditions 2.0 2.0 VCC2-4 VCC2-3 0.1 High Level Supply Current ICC1H 12 mA Vin = 5 V, VCC1 = 5 V High Level Supply Current ICC1L 2 mA Vin = 0 V, VCC1 = 5 V High Level Supply Current ICC2H 3 7 mA output open Low Level Supply Current ICC2L 3 7 mA output open Blanking Capacitor Charging Current ICHG 0.32 0.45 mA Vdesat = 0 V Blanking Capacitor Discharge Current IDSCHG mA Vdesat = 7 V UVLO Threshold VUVLO+ VUVLO- UVLO Hysteresis VUVLO+ VUVLO- Desaturation Trip Voltage VDESAT 0.2 60 11.2 (8.7) 6.0 13.0 13.4 (10.9) (12.5) V VCC2 = 1.0 ms ramp, VO > 5 V 11.6 (9.5) V VCC2 = 1.0 ms ramp, VO > 5 V 1.4 V 7.0 8.0 V *All typical values at TA = 25°C and VCC2 - VEE = 30 V, unless otherwise noted. 1) V UVLO+ and VUVLO- are specified as the VCC2 at which VO exceeds 5 V. The approximate output voltage just prior/after the UVLO transition is given in parenthesis. 1-214 Preliminary Switching Specifications (AC) Over recommended operating conditions (TA = -40 to 100°C) unless otherwise specified. Parameter Symbol Min. Typ.* Max. Units Propagation Delay Time to High Output Level tPLH 0.10 0.30 0.50 µs Rg = 10 Ω, Cg = 10 nF, Propagation Delay Time to Low Output Level tPHL 0.10 0.50 µs f = 10 kHz, Duty Cycle = 50% Pulse Width Distortion pwd -0.1 0.1 µs tPHL - tPLH -0.4 0.4 µs Propagation Delay Difference Between Any Two Parts Rise Time tr 0.1 µs Fall Time tf 0.1 µs Conditions Propagation Delay Time from Desat to Low Level Output tP(DS) 1.5 µs Rg = 10 Ω, CG = 10 nF Propagation Delay Time from Desat to Low Level FAULT Signal tPF(DS) 10 µs RG = 10 Ω, CG = 10 nF Minimum FAULT Signal Pulse Width ∆tFAULT 2.0 µs UVLO Turn Off Delay tUVLO OFF 0.6 µs Output High Level Common Mode Transient Immunity |CMH| 15 30 kV/µs TA = 25°C, INPUT = 5 V, VCM = 1500 V, VCC = 30 V Output Low Level Common Mode Transient Immunity |CML| 15 30 kV/µs TA = 25°C, VCM = 1500 V, INPUT = 0 V, VCC2 = 30 V *All typical values at TA = 25°C and VCC2 - VEE = 30 V, unless otherwise noted. 1-215