SN65HVD3080E SN65HVD3083E SN65HVD3086E www.ti.com SLLS771A – NOVEMBER 2006 – REVISED DECEMBER 2006 LOW-POWER RS-485 FULL-DUPLEX DRIVERS/RECEIVERS FEATURES • • • • • • • SN65HVD308xE (TOP VIEW) Low Quiescent Power – 375 µA (Typical) Enabled Mode – 2 nA (Typical) Shutdown Mode Small MSOP Package 1/8 Unit-Load—Up to 256 Nodes per Bus 16 kV Bus-Pin ESD Protection, 6 kV All Pins Failsafe Receiver (Bus Open, Short, Idle) TIA/EIA-485A Standard Compliant RS-422 Compatible R RE DE D GND APPLICATIONS • • • • • • • Motion Controllers Point-of-Sale (POS) Terminals Rack-to-Rack Communications Industrial Networks Power Inverters Battery-Powered Applications Building Automation 1 10 2 9 3 8 4 7 5 6 VCC A B Z Y DEVICE SIGNAL RATE SN65HVD3080E 200 kbps SN65HVD3083E 1 Mbps SN65HVD3086E 20 Mbps DESCRIPTION Each of these devices is a balanced driver and receiver designed for full-duplex RS-485 or RS-422 data bus networks. Powered by a 5-V supply, they are fully compliant with the TIA/EIA-485A standard. With controlled bus output transition times, the devices are suitable for signaling rates from 200 kbps to 20 Mbps. The devices are designed to operate with a low supply current, less than 1 mA (typical), exclusive of the load. When in the inactive shutdown mode, the supply current drops to a few nanoamps, making these devices ideal for power-sensitive applications. The wide common-mode range and high ESD protection levels of these devices make them suitable for demanding applications such as motion controllers, electrical inverters, industrial networks, and cabled chassis interconnects where noise tolerance is essential. These devices are characterized for operation over the temperature range -40°C to 85°C Enabled ICC ISL MAX TI 350 370 390 410 430 450 470 490 510 530 550 Current - mA Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006, Texas Instruments Incorporated SN65HVD3080E SN65HVD3083E SN65HVD3086E www.ti.com SLLS771A – NOVEMBER 2006 – REVISED DECEMBER 2006 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION PACKAGE (1) PART NUMBER MARKED AS SN65HVD3080E BTT SN65HVD3083E DGS, DGSR (2) BTU SN65HVD3086E (1) (2) BTF For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. The R suffix indicated tape and reel. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) UNIT VCC Supply voltage range (2) –0.3 V to 7 V V(A), V(B), V(Y), V(Z) Voltage range at any bus terminal (A, B, Y, Z) –9 V to 14 V V(TRANS) Voltage input, transient pulse through 100 Ω. See Figure 10 (A, B, Y, Z) –50 to 50 V VI Input voltage range (D, DE, RE) PD Continuous total power dissipation TJ Junction temperature (1) (2) -0.3 V to VCC+0.3 V See the dissipation rating table 170°C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal. POWER DISSIPATION RATINGS (1) PACKAGE TA < 25°C DERATING FACTOR (1) ABOVE TA < 25°C TA = 85°C DGS-10 463 mW 3.71 mW/°C 241 mW This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow. ELECTROSTATIC DISCHARGE PROTECTION PARAMETER Human Body Model (1) Field-induced-Charged Device Mode (2) TEST CONDITIONS A,B,Y,Z, and GND (2) 2 TYP MAX UNIT 16k V All pins 6k V All pins 1.5k V 200 V Machine Model (1) MIN Tested in accordance JEDEC Standard 22, Test Method A114-A. Bus pin stressed with respect to a common connection of GND and VCC. Tested in accordance JEDEC Standard 22, Test Method C101. Submit Documentation Feedback SN65HVD3080E SN65HVD3083E SN65HVD3086E www.ti.com SLLS771A – NOVEMBER 2006 – REVISED DECEMBER 2006 SUPPLY CURRENT over recommended operating conditions unless otherwise noted PARAMETER ICC TYP MAX UNIT RE at 0 V, D and DE at VCC, No load Receiver enabled, Driver enabled TEST CONDITIONS 375 750 µA RE at 0 V, D and DE at 0 V, No load Receiver enabled, Driver disabled 300 680 µA RE at VCC, D and DE at VCC, No load Receiver disabled, Driver enabled 240 600 µA RE at VCC, D and DE at 0 V, No load Receiver disabled, Driver disabled 2 1000 nA UNIT Supply current MIN RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range unless otherwise noted VCC Supply voltage VI or VIC Voltage at any bus terminal (separately or common mode) VIH High-level input voltage D, DE, RE VIL Low-level input voltage D, DE, RE VID Differential input voltage IOH High-level output current IOL Low-level output current TJ Junction temperature TA Ambient still-air temperature (1) MIN NOM MAX 4.5 5 5.5 –7 (1) 12 2 VCC 0 0.8 –12 12 Driver –60 Receiver –10 V mA Driver 60 Receiver 10 150 –40 V 85 mA °C The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet. Submit Documentation Feedback 3 SN65HVD3080E SN65HVD3083E SN65HVD3086E www.ti.com SLLS771A – NOVEMBER 2006 – REVISED DECEMBER 2006 DRIVER ELECTRICAL CHARACTERISTICS over recommended operating conditions unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX 3 4.3 VCC RL = 54 Ω, See Figure 1 1.5 2.3 Vtest = –7 V to 12 V, See Figure 2 1.5 No load, IO = 0 |VOD| Differential output voltage ∆|VOD| Change in magnitude of differential output voltage VOC(SS) Steady-state common-mode output voltage ∆VOC(SS) Common-mode output voltage (Dominant) VOC(PP) Peak-to-peak common-mode output voltage RL = 100 Ω, See Figure 1 V 2 RL = 54 Ω, See Figure 1 and Figure 2 See Figure 3 –0.2 0 0.2 1 2.6 3 0 0.1 -0.1 V V 0.5 VCC = 0 V, V(Z) or V(Y) = 12 V Other input at 0 V IZ(Y) or IZ(Z) UNIT 1 VCC = 0 V, V(Z) or V(Y) = -7 V Other input at 0 V High-impedance state output current -1 µA VCC = 5 V, V(Z) or V(Y) = 12 V Other input at 0 V 1 VCC = 5 V, V(Z) or V(Y) = -7 V Other input at 0 V -1 II Input current D, DE -100 100 µA IOS Short-circuit output current –7 V ≤ VO ≤ 12 V -250 250 mA UNIT DRIVER SWITCHING CHARACTERISTICS over recommended operating conditions unless otherwise noted PARAMETER (1) tPLH, tPHL TEST CONDITIONS Propagation delay time, low-to-high-level output Propagation delay time, high-to-low-level output TYP MAX HVD3080E 0.7 1.3 µs HVD3083E 150 500 ns HVD3086E 12 20 ns 0.9 1.5 µs 200 300 ns 7 15 ns HVD3080E 20 200 ns HVD3083E 5 50 ns HVD3086E 1.4 5 ns HVD3080E 2.5 7 µs 1 2.5 µs 13 30 ns 80 200 ns HVD3083E 60 100 ns HVD3086E 12 30 ns HVD3080E 2.5 7 µs HVD3080E tr, tf Differential output signal rise time Differential output signal fall time HVD3083E HVD3086E tsk(p) tPZH Pulse skew (|tPHL– tPLH|) Propagation delay time, high-impedance-to-high-level output HVD3083E HVD3086E HVD3080E tPHZ tPZL Propagation delay time, high-level-to-high-impedance output Propagation delay time, high-impedance-to-low-level output 1 2.5 µs 30 ns 80 200 ns HVD3083E 60 100 ns HVD3086E 12 30 ns 3.5 7 µs tPZH, Propagation delay time, standby-to-high-level output (See Figure 5) tPZL Propagation delay time, standby-to-low-level output (See Figure 6) (1) 4 0.5 13 HVD3080E Propagation delay time, low-level-to-high-impedance output RL = 110 Ω, RE at 0 V, See Figure 5 HVD3083E HVD3086E tPLZ RL = 54 Ω, CL = 50 pF, See Figure 4 MIN RL = 110 Ω, RE at 0 V, See Figure 6 RL = 110 Ω, RE at 3 V SNHVD3080 and SNHVD3083 are in the Product Preview state of development. Submit Documentation Feedback SN65HVD3080E SN65HVD3083E SN65HVD3086E www.ti.com SLLS771A – NOVEMBER 2006 – REVISED DECEMBER 2006 RECEIVER ELECTRICAL CHARACTERISTICS over recommended operating conditions unless otherwise noted PARAMETER TEST CONDITIONS VIT+ Positive-going differential input threshold voltage IO = –10 mA VIT- Negative-going differential input threshold voltage Vhys Hysteresis voltage (VIT+ - VIT-) MIN TYP (1) -0.08 IO = 10 mA UNIT V –0.2 -0.1 30 VOH High-level output voltage VID = 200 mV, IOH = –10 mA, See Figure 7 and Figure 8 VOL Low-level output voltage VID = –200 mV, IOH = 10 mA, See Figure 7 and Figure 8 IOZ High-impedance-state output current VO = 0 or VCC Other input at 0V mV 4 4.6 V 0.15 –1 0.4 V 1 µA VA or VB = 12 V 0.04 0.11 VA or VB = 12 V, VCC = 0 V 0.06 0.13 II Bus input current IIH High-level input current VIH = 2 V –60 IIL Low-level input current VIL = 0.8 V -60 CID Differential input capacitance VI = 0.4 sin (4E6πt) + 0.5 V VA or VB = -7 V VA or VB = -7 V, VCC = 0 V (1) MAX –0.01 –0.1 –0.04 –0.05 –0.03 mA -30 µA -30 µA 7 pF All typical values are at 25°C and with a 3.3-V supply. RECEIVER SWITCHING CHARACTERISTICS over recommended operating conditions unless otherwise noted PARAMETER TEST CONDITIONS tPLH Propagation delay time, low-to-high-level output tPHL Propagation delay time, high-to-low-level output tsk(p) Pulse skew (|tPHL– tPLH|) tr Output signal rise time tf Output signal fall time tPZH VID = -1.5 V to 1.5 V, CL = 15 pF, See Figure 8 Output disable time to high level From standby tPHZ tPZL Output enable time from high level Output disable time to low level From standby tPLZ Output enable time from low level Submit Documentation Feedback MIN TYP MAX 75 100 79 100 4 10 1.5 3 UNIT ns 1.8 3 DE at 5 V, See Figure 9 5 50 ns DE at 5 V, See Figure 9 1.6 3.5 µs DE at 5 V, See Figure 9 5 50 ns DE at 0 V, See Figure 9 10 50 ns DE at 5 V, See Figure 9 1.7 3.5 µs DE at 5 V, See Figure 9 8 50 ns 5 SN65HVD3080E SN65HVD3083E SN65HVD3086E www.ti.com SLLS771A – NOVEMBER 2006 – REVISED DECEMBER 2006 PARAMETER MEASUREMENT INFORMATION VCC DE RL 2 IO Y D 0 or 5 V VOD RL 2 IO Z VI VOC VO VO Figure 1. Driver VOD Test Circuit and Current Definitions 375 Ω ±1% VCC DE D Y VOD 0 or 5 V 60 Ω ±1% + _ −7 V < V(test) < 12 V Z 375 Ω ±1% Figure 2. Driver VOD With Common-Mode Loading Test Circuit VCC 27 Ω ± 1% DE Input D Y VY Z VZ Y 27 Ω ± 1% Z 50 pF ±20% VOC Input: PRR = 500 kHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, ZO = 50 W CL Includes Fixture and Instrumentation Capacitance VOC VOC(SS) VOC(PP) Figure 3. Test Circuit and Definitions for the Driver Common-Mode Output Voltage 3V VI Y VI W Z RL = 54 W 1.5 V 1.5 V CL = 50 pF ±20% ±1% 90% VOD 0V 10% Generator: PRR = 500 kHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, ZO = 50 W Figure 4. Driver Switching Test Circuit and Voltage Waveforms 6 Submit Documentation Feedback VOD(H) 90% 0V 10% VOD(L) SN65HVD3080E SN65HVD3083E SN65HVD3086E www.ti.com SLLS771A – NOVEMBER 2006 – REVISED DECEMBER 2006 PARAMETER MEASUREMENT INFORMATION (continued) Y 3V 1.5 V RL = 110 W CL = 50 pF 0.5 V tPZH ±1% ±20% 50 W VI 0V V OH VO Generator: PRR = 500 kHz, 50% Duty Cycle, tr < 6 ns, 1.5 V VI Z DE Input Generator 3V S1 VO D 2.5 V »0V tPHZ CL Includes Fixture and Instrumentation Capacitance tf < 6 ns, ZO = 50 W Figure 5. Driver High-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms 3V RL = 110 W Y 50 W VI 1.5 V VI VO DE Input Generator S1 D 0V 3V ±1% 1.5 V tPZL Z 0V tPLZ CL = 50 pF VO ±20% 5V 0.5 V 2.5 V VOL Generator: PRR = 500 kHz, 50% Duty Cycle, tr < 6 ns, CL Includes Fixture and Instrumentation Capacitance tf < 6 ns, ZO = 50 W Figure 6. Driver Low-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms IA A IO R VA VA + VB 2 VID VIC B VO IB VB Figure 7. Receiver Voltage and Current Definitions A Input Generator R VI 50 Ω 1.5 V B 3V VO 1.5 V 0V CL = 15 pF RE 1.5 V VI t PLH ±20% t PHL VOH 90% 90% Generator: PRR = 500 kHz, 50% Duty Cycle,tr < 6 ns, tf < 6 ns, ZO = 50 W CL Includes Fixture and Instrumentation Capacitance VO 1.5 V 10% tr 1.5 V 10% VOL tf Figure 8. Receiver Switching Test Circuit and Voltage Waveforms Submit Documentation Feedback 7 SN65HVD3080E SN65HVD3083E SN65HVD3086E www.ti.com SLLS771A – NOVEMBER 2006 – REVISED DECEMBER 2006 PARAMETER MEASUREMENT INFORMATION (continued) VCC 0 or 2.5 V A VO R 2.5 or 0 V B CL = 15 pF RE Input Generator VI C 1 kW ±1% 3V VI S1 tPHZ tPZH ±20% A at 2.5 V B at 0 V S1 to D VOH + 0.5 V 1.5 V VO CL Includes Fixture and Instrumentation Capacitance tPZL A at 0 V B at 2.5 V S1 to C Generator: PRR = 500 kHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, ZO = 50 W 1.5 V 0V D 50 W 1.5 V VO tPLZ 1.5 V VOL A Y D R Z + - A. 100 W 100 W ±1% ±1% Pulse Generator 15 ms duration 1% Duty Cycle tr, tf £ 100 ns B + - This test is conducted to test survivability only. Data stability at the R output is not specified. Figure 10. Transient Overvoltage Test Circuit 8 »0V »5V VOL + 0.5 V Figure 9. Receiver Enable and Disable Test Circuit and Voltage Waveforms 0 V or 3 V DE VOH Submit Documentation Feedback RE 0 V or 3 V SN65HVD3080E SN65HVD3083E SN65HVD3086E www.ti.com SLLS771A – NOVEMBER 2006 – REVISED DECEMBER 2006 DEVICE INFORMATION FUNCTION TABLES DRIVER (1) (1) INPUT Enable D DE Y OUTPUTS Z H H H L L H L H X L Z Z Open H H L H = high level, L = low level, Z = high impedance, X = irrelevant, ? = indeterminate RECEIVER (1) DIFFERENTIAL INPUTS VID = V(A) - V(B) ENABLE RE OUTPUT R VID ≤ –0.2 V L L –0.2 V < VID < –0.01 V L ? –0.01 V ≤ VID L H X H Z Open Circuit L H BUS Idle L H Short Circuit L H (1) H = high level, L = low level, Z = high impedance, X = irrelevant, ? = indeterminate DEVICE ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETERS P(AVG) Average power dissipation TEST CONDITIONS RL = 60 Ω, Input to D a 500-kHz 50% duty cycle square-wave Submit Documentation Feedback MIN TYP MAX UNIT 85 109 136 mW 9 SN65HVD3080E SN65HVD3083E SN65HVD3086E www.ti.com SLLS771A – NOVEMBER 2006 – REVISED DECEMBER 2006 Equivalent Input and Output Schematic Diagrams D and RE Input DE Input VCC VCC 50 kW 500 500 Input Input 9V 50 kΩ 9V A Input B Input VCC 16 V VCC 16 V 36 kW 180 kW 36 kW 180 kW Input Input 16 V 36 kW 16 V 36 kW Y and Z Outputs R Outputs VCC VCC 16 V 5W Output 16 V 10 Output 9V Submit Documentation Feedback SN65HVD3080E SN65HVD3083E SN65HVD3086E www.ti.com SLLS771A – NOVEMBER 2006 – REVISED DECEMBER 2006 TYPICAL CHARACTERISTICS INPUT BIAS CURRENT vs BUS INPUT VOLTAGE SUPPLY CURRENT vs SIGNALING RATE 10 80 No Load VCC = 5 V TA = 25°C 50% Square wave input ICC − Supply Current − mA II − Input Bias Current − µA 60 40 20 VCC = 0 V VCC = 5 V 0 −20 Driver and Receiver 1 Receiver Only −40 0.1 −60 −8 −6 −4 −2 0 2 4 6 8 10 12 1 10 VI − Bus Input Voltage − V Figure 11. Figure 12. SUPPLY CURRENT vs SIGNALING RATE SUPPLY CURRENT vs SIGNALING RATE 100 100 No Load VCC = 5 V TA = 25°C 50% Square wave input ICC − Supply Current − mA No Load VCC = 5 V TA = 25°C 50% Square wave input ICC − Supply Current − mA 100 Signaling Rate − kbps 10 Driver and Receiver 1 Receiver Only 10 Driver and Receiver 1 Receiver Only 0.1 1 10 100 1k 0.1 0.001 Signaling Rate − kbps 0.01 0.1 1 10 100 Signaling Rate − Mbps Figure 13. Figure 14. Submit Documentation Feedback 11 SN65HVD3080E SN65HVD3083E SN65HVD3086E www.ti.com SLLS771A – NOVEMBER 2006 – REVISED DECEMBER 2006 TYPICAL CHARACTERISTICS (continued) DIFFERENTIAL OUTPUT VOLTAGE vs DIFFERENTIAL OUTPUT CURRENT RECEIVER OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE 5.0 5.0 TA = 25°C VCC = 5 V 4.5 RL = 120 Ω 4.0 VO − Receiver Output Voltage − V VOD − Differential Output Voltage − V 4.5 3.5 3.0 RL = 60 Ω 2.5 2.0 1.5 1.0 0.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 10 20 30 40 50 0.0 −200−180 −160 −140−120 −100 −80 −60 −40 −20 IO − Differential Output Current − mA Figure 15. 12 TA = 25°C VCC = 5 V VIC = 0.75 V VID − Differential Input Voltage − V Figure 16. Submit Documentation Feedback 0 PACKAGE OPTION ADDENDUM www.ti.com 8-Jan-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) SN65HVD3080EDGS ACTIVE MSOP DGS 10 80 TBD Call TI Call TI SN65HVD3080EDGSR ACTIVE MSOP DGS 10 2500 TBD Call TI Call TI SN65HVD3083EDGS ACTIVE MSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN65HVD3083EDGSG4 ACTIVE MSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN65HVD3083EDGSR ACTIVE MSOP DGS 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN65HVD3083EDGSRG4 ACTIVE MSOP DGS 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN65HVD3086EDGS ACTIVE MSOP DGS 10 80 TBD Call TI Call TI SN65HVD3086EDGSR ACTIVE MSOP DGS 10 2500 TBD Call TI Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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