Preliminary Data Sheet No. PD60030-M IR2213(S) HIGH AND LOW SIDE DRIVER Features • • • • Product Summary Floating channel designed for bootstrap operation Fully operational to +1200V Tolerant to negative transient voltage dV/dt immune Gate drive supply range from 12 to 20V Undervoltage lockout for both channels 3.3V logic compatible Separate logic supply range from 3.3V to 20V Logic and power ground ±5V offset CMOS Schmitt-triggered inputs with pull-down Cycle by cycle edge-triggered shutdown logic Matched propagation delay for both channels • • • • Outputs in phase with inputs VOFFSET 1200V max. IO+/- 1.7A / 2A VOUT 12 - 20V ton/off (typ.) 280 & 225 ns Delay Matching 30 ns Packages Description The IR2213(S) is a high voltage, high speed power MOSFET and IGBT driver with independent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable 16-Lead SOIC (wide body) ruggedized monolithic construction. Logic inputs are 14-Lead PDIP compatible with standard CMOS or LSTTL outputs, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 1200 volts. Typical Connection up to 1200V HO V DD V DD VB HIN HIN VS SD SD LIN LIN V CC V SS V SS COM VCC TO LOAD LO (Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1 IR2213(S) Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units VB High Side Floating Supply Voltage -0.3 1225 VS High Side Floating Supply Offset Voltage VB - 25 VB + 0.3 VHO High Side Floating Output Voltage VS - 0.3 VB + 0.3 VCC Low Side Fixed Supply Voltage -0.3 25 VLO Low Side Output Voltage -0.3 VCC + 0.3 VDD Logic Supply Voltage -0.3 VSS + 25 VSS Logic Supply Offset Voltage VCC - 25 VCC + 0.3 VIN Logic Input Voltage (HIN, LIN & SD) VSS - 0.3 VDD + 0.3 dVs/dt PD RTHJA Allowable Offset Supply Voltage Transient (Figure 2) — 50 Package Power Dissipation @ TA ≤ +25° C (14 Lead PDIP) — 1.6 (16 Lead SOIC) — 1.25 Thermal Resistance, Junction to Ambient (14 Lead PDIP) — 75 (16 Lead SOIC) — 100 TJ Junction Temperature — 125 TS Storage Temperature -55 150 TL Lead Temperature (Soldering, 10 seconds) — 300 V V/ns W °C/W °C Recommended Operating Conditions The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The V S and VSS offset ratings are tested with all supplies biased at 15V differential. Symbol Definition Min. Max. VB High Side Floating Supply Absolute Voltage VS + 12 VS + 20 VS High Side Floating Supply Offset Voltage Note 1 1200 VB VHO High Side Floating Output Voltage VS VCC Low Side Fixed Supply Voltage 12 20 VLO Low Side Output Voltage 0 VCC VDD Logic Supply Voltage VSS Logic Supply Offset Voltage VIN Logic Input Voltage (HIN, LIN & SD) VSS + 3 VSS + 20 -5 (Note 2) 5 VSS VDD Units V Note 1: Logic operational for V S of -5 to +1200V. Logic state held for VS of -5V to -V BS. (Please refer to the Design Tip DT97-3 for more details). Note 2: When VDD<5V, the minimum V SS offset is limited to -VDD 2 www.irf.com IR2213(S) Dynamic Electrical Characteristics VBIAS (VCC, V BS, VDD ) = 15V, CL = 1000 pF, TA = 25°C and V SS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3. Symbol Definition Min. Typ. Max. Units Test Conditions ton Turn-On Propagation Delay — 280 — VS = 0V toff Turn-Off Propagation Delay — 225 — VS = 1200V tsd Shutdown Propagation Delay — 230 — tr Turn-On Rise Time — 25 — tf Turn-Off Fall Time — 17 — Delay Matching, HS & LS Turn-On/Off — — 30 MT ns VS = 1200V Figure 5 Static Electrical Characteristics VBIAS (VCC, V BS, VDD) = 15V, TA = 25°C and VSS = COM unless otherwise specified. The V IN, VTH and IIN parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN and SD. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Definition Min. Typ. Max. Units Test Conditions VIH Logic “1” Input Voltage 9.5 — — VIL Logic “0” Input Voltage — — 6.0 VOH High Level Output Voltage, VBIAS - VO — — 1.2 VOL Low Level Output Voltage, VO — — 0.1 IO = 0A VB = VS = 1200V V IO = 0A ILK Offset Supply Leakage Current — — 50 IQBS Quiescent VBS Supply Current — 125 230 VIN = 0V or VDD IQCC Quiescent VCC Supply Current — 180 340 VIN = 0V or VDD IQDD Quiescent VDD Supply Current — 15 30 IIN+ Logic “1” Input Bias Current — 20 40 VIN = VDD IIN- — 8.7 — 10.2 1.0 11.7 VIN = 0V 7.9 9.3 10.7 8.7 10.2 11.7 7.9 9.3 10.7 IO+ Logic “0” Input Bias Current VBS Supply Undervoltage Positive Going Threshold VBS Supply Undervoltage Negative Going Threshold VCC Supply Undervoltage Positive Going Threshold VCC Supply Undervoltage Negative Going Threshold Output High Short Circuit Pulsed Current 1.7 2.0` — IO- Output Low Short Circuit Pulsed Current 2.0 2.5 — VBSUV+ VBSUVVCCUV+ VCCUV- www.irf.com µA VIN = 0V or VDD V A VO = 0V, VIN = VDD PW ≤ 10 µs VO = 15V, VIN = 0V PW ≤ 10 µs 3 IR2213(S) Functional Block Diagram VB UV DETECT VDD R Q S HIN HV LEVEL SHIFT VDD /VCC LEVEL SHIFT PULSE FILTER R R Q HO S PULSE GEN VS SD VCC LIN S UV DETECT VDD /VCC LEVEL SHIFT LO R Q DELAY COM VSS Lead Definitions Symbol Description VDD Logic supply HIN Logic input for high side gate driver output (HO), in phase SD Logic input for shutdown LIN Logic input for low side gate driver output (LO), in phase VSS Logic ground VB High side floating supply HO High side gate drive output VS High side floating supply return VCC Low side supply LO Low side gate drive output COM Low side return Lead Assignments 14 Lead PDIP 16 Lead SOIC (Wide Body) IR2213 IR2213S Part Number 4 www.irf.com IR2213(S) HV =10 to 1200V <50 V/ns Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit (0 to 1200V) 50% 50% HIN LIN ton toff tr 90% HO LO Figure 3. Switching Time Test Circuit 10% 50% SD 10% 50% LO tsd HO LO 90% Figure 4. Switching Time Waveform Definition HIN LIN 50% tf 90% HO 10% MT MT 90% LO Figure 5. Shutdown Waveform Definitions www.irf.com HO Figure 6. Delay Matching Waveform Definitions 5 IR2213(S) 80 80 Turn-On Rise Time (ns) 100 Turn-On Rise Time (ns) 100 60 40 M ax. 60 Max. 40 Typ. Typ. 20 20 0 0 -50 -25 0 25 50 75 100 125 10 12 14 Temperature (°C) 50 50 40 40 30 Max. 20 Typ. 10 20 30 20 Max. Typ. 10 0 0 -50 -25 0 25 50 75 100 125 10 12 14 Temperature (°C) 16 18 20 VBIAS Supply Voltage (V) Figure 11A. Turn-Off Fall Time vs. Temperature Figure 11B. Turn-Off Fall Time vs. Voltage 15.0 Logic " 1" Input Threshold (V) 15 12.0 Logic "1" Input Threshold (V) 18 Figure 10B. Turn-On Rise Time vs. Voltage Turn-Off Fall Time (ns) Turn-Off Fall Time (ns) Figure 10A. Turn-On Rise Time vs. Temperature Min. 9.0 6.0 3.0 12 Max. 9 6 3 0 0.0 -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 12A. Logic “1” Input Threshold vs. Temperature 6 16 VBIAS Supply Voltage (V) 0 2 4 6 8 10 12 14 16 18 20 VDD Logic Supply Voltage (V) Figure 12B. Logic “1” Input Threshold vs. Voltage www.irf.com 15.0 15 12.0 12 Logic "0" Input Threshold (V) Logic "0" Input Threshold (V) IR2213(S) 9.0 Max. 6.0 3.0 9 Min. 6 3 0 0.0 -50 -25 0 25 50 75 100 0 125 2 4 8 10 12 14 16 18 20 Figure 13B. Logic “0” Input Threshold vs. Voltage 5.00 5.00 4.00 4.00 High Level Output Voltage (V) High Level Output Voltage (V) Figure 13A. Logic “0” Input Threshold vs. Temperature 3.00 2.00 Max. 1.00 3.00 2.00 M ax. 1.00 0.00 0.00 -50 -25 0 25 50 75 100 125 10 12 Temperature (°C) 14 16 18 20 VBIAS Supply Voltage (V) Figure 14A. High Level Output vs. Temperature Figure 14B. High Level Output vs. Voltage 1.00 1.00 0.80 0.80 Low Level Output Voltage (V) Low Level Output Voltage (V) 6 VDD Logic Supply Voltage (V) Temperature (°C) 0.60 0.40 0.20 0.60 0.40 0.20 Max. M ax. 0.00 0.00 -50 -25 0 25 50 75 100 Temperature (°C) Figure 15A. Low Level Output vs. Temperature www.irf.com 125 10 12 14 16 18 20 VBIAS Supply Voltage (V) Figure 15B. Low Level Output vs. Voltage 7 500 500 400 400 Offset Supply Leakage Current (µA) Offset Supply Leakage Current (µA) IR2213(S) 300 200 100 300 200 100 Max. Max. 0 0 -50 -25 0 25 50 75 100 0 125 200 Figure 16A. Offset Supply Current vs. Temperature 600 800 1000 1200 Figure 16B. Offset Supply Current vs. Voltage 500 500 400 400 VBS Supply Current (µA) VBS Supply Current (µA) 400 VB Boost Voltage (V) Temperature (°C) 300 Max. 200 300 200 Max. Typ. 100 100 0 Typ. 0 -50 -25 0 25 50 75 100 125 10 12 Temperature (°C) Figure 17A. VBS Supply Current vs. Temperature 16 18 20 Figure 17B. VBS Supply Current vs. Voltage 625 625 500 500 VCC Supply Current (µA) VCC Supply Current (µA) 14 VBS Floating Supply Voltage (V) 375 Max. 250 375 250 Max. Typ. 125 125 0 0 -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 18A. VCC Supply Current vs. Temperature 8 Typ. 10 12 14 16 18 20 VCC Fixed Supply Voltage (V) Figure 18B. VCC Supply Current vs. Voltage www.irf.com IR2213(S) 60 100 50 VDD Supply Current (µA) VDD Supply Current (µA) 80 60 40 Max. 40 30 max 20 10 20 Typ. typ. 0 0 -50 -25 0 25 50 75 100 0 125 2 4 Temperature (°C) 8 10 12 14 16 18 20 Figure 19B. VDD Supply Current vs. VDD Voltage Figure 19A. VDD Supply Current vs. Temperature 60 Logic “1” Input Bias Current (µA) 100 80 Logic "1" Input Bias Current (µA) 6 VDD Logic Supply Voltage (V) 60 40 Max. 50 40 30 20 max 10 20 Typ. typ. 0 0 -50 -25 0 25 50 75 100 0 125 2 4 Temperature (°C) Figure 20A. Logic “1” Input Current vs. Temperature 10 12 14 16 18 20 5 Logic “0” Input Bias Current (µA) 4.00 Logic "0" Input Bias Current (µA) 8 Figure 20B. Logic “1” Input Current vs. VDD Voltage 5.00 3.00 2.00 1.00 6 VDD Logic Supply Voltage (V) 4 3 2 max 1 Max. 0 0 0.00 -50 -25 0 25 50 75 100 125 2 4 6 8 10 12 14 16 18 20 VDD Logic Supply Voltage (V) Temperature (°C) Figure 21A. Logic “0” Input Current vs. Temperature www.irf.com Figure 21B. Logic “0” Input Current vs. VDD Voltage 9 IR2213(S) VS Offset Supply Voltage (V) -3.0 20.0 VSS Logic Supply Offset Voltage (V) 0.0 Typ. -6.0 -9.0 -12.0 -15.0 16.0 12.0 8.0 Typ. 4.0 0.0 10 12 14 16 18 20 10 VBS Floating Supply Voltage (V) Figure 36. Maximum VS Negative Offset vs. VBS Supply Voltage 12 14 16 18 20 VCC Fixed Supply Voltage (V) Figure 37. Maximum VSS Positive Offset vs. VCC Supply Voltage Case outlines 14-Lead PDIP 10 01-6010 01-3002 03 (MS-001AC) www.irf.com IR2213(S) 16-Lead SOIC (wide body) 01 6015 01-3014 03 (MS-013AA) IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 2/11/2002 www.irf.com 11